mirror of
https://gitlab.com/skmp/dca3-game.git
synced 2025-01-16 21:08:22 +01:00
279 lines
9.9 KiB
C++
279 lines
9.9 KiB
C++
/* KallistiOS ##version##
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pvr_init_shutdown.c
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Copyright (C) 2002, 2004 Megan Potter
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*/
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#include "emu/emu.h"
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#include <assert.h>
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#include <stdio.h>
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#include <string.h>
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#include "dc/pvr.h"
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#define dbglog(channel, ...) printf(__VA_ARGS__)
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// #include <dc/video.h>
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// #include <dc/asic.h>
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// #include <dc/vblank.h>
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#include "pvr_internal.h"
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/*
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Initialization and shutdown: stuff you should only ever have to do
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once in your program.
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*/
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/* Simpler function which initializes the PVR using 16/16 for the opaque
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and translucent lists, and 0's for everything else; 512k of vertex
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buffer. This is equivalent to the old ta_init_defaults() for now. */
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int pvr_init_defaults(void) {
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pvr_init_params_t params = {
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/* Enable opaque and translucent polygons with size 16 */
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{ PVR_BINSIZE_16, PVR_BINSIZE_0, PVR_BINSIZE_16, PVR_BINSIZE_0, PVR_BINSIZE_0 },
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/* Vertex buffer size 512K */
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512 * 1024,
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/* No DMA */
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0,
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/* No FSAA */
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0,
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/* Translucent Autosort enabled. */
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0,
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/* Extra OPBs */
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3
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};
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return pvr_init(¶ms);
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}
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/* Initialize the PVR chip to ready status, enabling the specified lists
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and using the specified parameters; note that bins and vertex buffers
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come from the texture memory pool! Expects that a 2D mode was
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initialized already using the vid_* API. */
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int pvr_init(pvr_init_params_t *params) {
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emu_init();
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/* If we're already initialized, fail */
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if(pvr_state.valid == 1) {
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dbglog(DBG_WARNING, "pvr: pvr_init called twice!\n");
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return -1;
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}
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/* Make sure we got valid parameters */
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assert(params != NULL);
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// /* Make sure that a video mode has been initialized */
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// assert(vid_mode != NULL);
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// assert(vid_mode->width != 0 && vid_mode->height != 0);
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// /* Check for compatibility with 3D stuff */
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// if((vid_mode->width % 32) != 0) {
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// dbglog(DBG_WARNING, "pvr: mode %dx%d isn't usable for 3D (width not multiples of 32)\n",
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// vid_mode->width, vid_mode->height);
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// return -1;
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// }
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/* Clear out video memory */
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// vid_empty();
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memset(emu_vram, 0, sizeof(emu_vram));
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/* Reset all PVR systems (in case it's still doing something) */
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PVR_SET(PVR_RESET, PVR_RESET_ALL);
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PVR_SET(PVR_RESET, PVR_RESET_NONE);
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/* Start off with a nice empty structure */
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memset((void *)&pvr_state, 0, sizeof(pvr_state));
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// Enable DMA if the user wants that.
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pvr_state.dma_mode = params->dma_enabled;
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// Copy over FSAA setting.
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pvr_state.fsaa = params->fsaa_enabled;
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/* Everything's clear, do the initial buffer pointer setup */
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pvr_allocate_buffers(params);
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// Initialize tile matrices
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pvr_init_tile_matrices(!!params->autosort_disabled);
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// Setup all pipeline targets. Yes, this is redundant. :) I just
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// like to have it explicit.
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pvr_state.ram_target = 0;
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pvr_state.ta_target = 0;
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pvr_state.view_target = 0;
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pvr_state.list_reg_open = -1;
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// Sync all the hardware registers with our pipeline state.
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pvr_sync_view();
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pvr_sync_reg_buffer();
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// Clear out our stats
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pvr_state.vbl_count = 0;
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pvr_state.frame_last_time = 0;
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pvr_state.buf_start_time = 0;
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pvr_state.reg_start_time = 0;
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pvr_state.rnd_start_time = 0;
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pvr_state.frame_last_len = -1;
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pvr_state.buf_last_len = -1;
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pvr_state.reg_last_len = -1;
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pvr_state.rnd_last_len = -1;
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pvr_state.vtx_buf_used = 0;
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pvr_state.vtx_buf_used_max = 0;
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pvr_state.dr_used = 0;
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/* If we're on a VGA box, disable vertical smoothing */
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if(1 /*vid_mode->cable_type == CT_VGA*/) {
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#if !defined(DC_TEXCONV)
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dbglog(DBG_KDEBUG, "pvr: disabling vertical scaling for VGA\n");
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#endif
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if(pvr_state.fsaa)
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PVR_SET(PVR_SCALER_CFG, 0x10400);
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else
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PVR_SET(PVR_SCALER_CFG, 0x400);
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//TODO: these are some vid_ function?
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PVR_SET(PVR_FB_SIZE, ((640-1)/2 << 0) | ((480-1) << 10) | (1 << 20 ) );
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PVR_SET(PVR_FB_CFG_1, (1<<0) | (0<<1) | (1 << 2));
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// PVR_SET(PVR_FB_ADDR);
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}
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else {
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dbglog(DBG_KDEBUG, "pvr: enabling vertical scaling for non-VGA\n");
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if(pvr_state.fsaa)
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PVR_SET(PVR_SCALER_CFG, 0x10401);
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else
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PVR_SET(PVR_SCALER_CFG, 0x401);
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}
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// TODO: hookup reicast's interrupts here
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// /* Hook the PVR interrupt events on G2 */
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// pvr_state.vbl_handle = vblank_handler_add(pvr_int_handler, NULL);
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// asic_evt_set_handler(ASIC_EVT_PVR_OPAQUEDONE, pvr_int_handler, NULL);
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// asic_evt_enable(ASIC_EVT_PVR_OPAQUEDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_set_handler(ASIC_EVT_PVR_OPAQUEMODDONE, pvr_int_handler, NULL);
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// asic_evt_enable(ASIC_EVT_PVR_OPAQUEMODDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_set_handler(ASIC_EVT_PVR_TRANSDONE, pvr_int_handler, NULL);
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// asic_evt_enable(ASIC_EVT_PVR_TRANSDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_set_handler(ASIC_EVT_PVR_TRANSMODDONE, pvr_int_handler, NULL);
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// asic_evt_enable(ASIC_EVT_PVR_TRANSMODDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_set_handler(ASIC_EVT_PVR_PTDONE, pvr_int_handler, NULL);
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// asic_evt_enable(ASIC_EVT_PVR_PTDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_set_handler(ASIC_EVT_PVR_RENDERDONE_TSP, pvr_int_handler, NULL);
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// asic_evt_enable(ASIC_EVT_PVR_RENDERDONE_TSP, ASIC_IRQ_DEFAULT);
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#ifdef PVR_RENDER_DBG
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/* Hook up interrupt handlers for error events */
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asic_evt_set_handler(ASIC_EVT_PVR_ISP_OUTOFMEM, pvr_int_handler, NULL);
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asic_evt_enable(ASIC_EVT_PVR_ISP_OUTOFMEM, ASIC_IRQ_DEFAULT);
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asic_evt_set_handler(ASIC_EVT_PVR_STRIP_HALT, pvr_int_handler, NULL);
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asic_evt_enable(ASIC_EVT_PVR_STRIP_HALT, ASIC_IRQ_DEFAULT);
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asic_evt_set_handler(ASIC_EVT_PVR_OPB_OUTOFMEM, pvr_int_handler, NULL);
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asic_evt_enable(ASIC_EVT_PVR_OPB_OUTOFMEM, ASIC_IRQ_DEFAULT);
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asic_evt_set_handler(ASIC_EVT_PVR_TA_INPUT_ERR, pvr_int_handler, NULL);
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asic_evt_enable(ASIC_EVT_PVR_TA_INPUT_ERR, ASIC_IRQ_DEFAULT);
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asic_evt_set_handler(ASIC_EVT_PVR_TA_INPUT_OVERFLOW, pvr_int_handler, NULL);
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asic_evt_enable(ASIC_EVT_PVR_TA_INPUT_OVERFLOW, ASIC_IRQ_DEFAULT);
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#endif
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/* 3d-specific parameters; these are all about rendering and
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nothing to do with setting up the video; some stuff in here
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is still unknown. */
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PVR_SET(PVR_UNK_00A8, 0x15d1c951); /* M (Unknown magic value) */
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PVR_SET(PVR_UNK_00A0, 0x00000020); /* M */
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PVR_SET(PVR_FB_CFG_2, 0x00000009); /* alpha config */
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PVR_SET(PVR_UNK_0110, 0x00093f39); /* M */
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PVR_SET(PVR_UNK_0098, 0x00800408 | (params->autosort_disabled?1:0)); /* M */ // this is a hack for refsw limitations
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PVR_SET(PVR_TEXTURE_CLIP, 0x00000000); /* texture clip distance */
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PVR_SET(PVR_SPANSORT_CFG, 0x00000101); /* M */
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PVR_SET(PVR_FOG_TABLE_COLOR, 0x007f7f7f); /* Fog table color */
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PVR_SET(PVR_FOG_VERTEX_COLOR, 0x007f7f7f); /* Fog vertex color */
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PVR_SET(PVR_COLOR_CLAMP_MIN, 0x00000000); /* color clamp min */
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PVR_SET(PVR_COLOR_CLAMP_MAX, 0xffffffff); /* color clamp max */
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PVR_SET(PVR_UNK_0080, 0x00000007); /* M */
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PVR_SET(PVR_CHEAP_SHADOW, 0x00000001); /* cheap shadow */
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PVR_SET(PVR_UNK_007C, 0x0027df77); /* M */
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PVR_SET(PVR_TEXTURE_MODULO, 0x00000000); /* stride width */
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PVR_SET(PVR_FOG_DENSITY, 0x0000ff07); /* fog density */
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PVR_SET(PVR_UNK_0118, 0x00008040); /* M */
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/* Initialize PVR DMA */
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// mutex_init((mutex_t *)&pvr_state.dma_lock, MUTEX_TYPE_NORMAL);
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pvr_dma_init();
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/* Setup our wait-ready semaphore */
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sem_init((semaphore_t *)&pvr_state.ready_sem, 1);
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// TODO: This has been hacked to be 1 from 0 in kos
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/* Set us as valid and return success */
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pvr_state.valid = 1;
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/* Validate our memory pool */
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pvr_mem_reset();
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/* This doesn't work right now... */
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/*#ifndef NDEBUG
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dbglog(DBG_KDEBUG, "pvr: free memory is %08lx bytes\n",
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pvr_mem_available());
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#endif*//* !NDEBUG */
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return 0;
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}
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/* Shut down the PVR chip from ready status, leaving it in 2D mode as it
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was before the init. */
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int pvr_shutdown(void) {
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if(!pvr_state.valid)
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return -1;
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/* Set us invalid */
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pvr_state.valid = 0;
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/* Stop anything that might be going on */
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PVR_SET(PVR_RESET, PVR_RESET_ALL);
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PVR_SET(PVR_RESET, PVR_RESET_NONE);
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/* Unhook any int handlers */
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// vblank_handler_remove(pvr_state.vbl_handle);
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// asic_evt_remove_handler(ASIC_EVT_PVR_OPAQUEDONE);
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// asic_evt_disable(ASIC_EVT_PVR_OPAQUEDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_remove_handler(ASIC_EVT_PVR_OPAQUEMODDONE);
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// asic_evt_disable(ASIC_EVT_PVR_OPAQUEMODDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_remove_handler(ASIC_EVT_PVR_TRANSDONE);
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// asic_evt_disable(ASIC_EVT_PVR_TRANSDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_remove_handler(ASIC_EVT_PVR_TRANSMODDONE);
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// asic_evt_disable(ASIC_EVT_PVR_TRANSMODDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_remove_handler(ASIC_EVT_PVR_PTDONE);
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// asic_evt_disable(ASIC_EVT_PVR_PTDONE, ASIC_IRQ_DEFAULT);
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// asic_evt_remove_handler(ASIC_EVT_PVR_RENDERDONE_TSP);
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// asic_evt_disable(ASIC_EVT_PVR_RENDERDONE_TSP, ASIC_IRQ_DEFAULT);
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/* Shut down PVR DMA */
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pvr_dma_shutdown();
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/* Invalidate our memory pool */
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pvr_mem_reset();
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/* Destroy the semaphore */
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sem_destroy((semaphore_t *)&pvr_state.ready_sem);
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// mutex_destroy((mutex_t *)&pvr_state.dma_lock);
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// /* Clear video memory */
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// vid_empty();
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memset(emu_vram, 0, sizeof(emu_vram));
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// /* Reset the frame buffer offset */
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// vid_waitvbl();
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// vid_set_start(0);
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emu_term();
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/* Return success */
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return 0;
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}
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