Update to v106r71 release.

byuu says:

I started working on the Toshiba TLCS900H CPU core today.

It's basically, "what if we took the Z80, added in 32-bit support, added
in SPARC register windows, added a ton of additional addressing modes,
added control registers, and added a bunch of additional instructions?"
-- or in other words, it's basically hell for me.

It took several hours just to wrap my head around the way the opcode
decoder needed to function, but I think I have a decent strategy for
implementing it now.

I should have all of the first-byte register/memory address decoding in
place, although I'm sure there's lots of bugs. I don't have anything in
the way of a disassembler yet.

nall/endian.hpp

@@ -4,6 +4,7 @@
 
 #if defined(ENDIAN_LSB)
   //little-endian: uint8_t[] { 0x01, 0x02, 0x03, 0x04 } == 0x04030201
+  #define order_lsb1(a)               a
   #define order_lsb2(a,b)             a,b
   #define order_lsb3(a,b,c)           a,b,c
   #define order_lsb4(a,b,c,d)         a,b,c,d
@@ -11,6 +12,7 @@
   #define order_lsb6(a,b,c,d,e,f)     a,b,c,d,e,f
   #define order_lsb7(a,b,c,d,e,f,g)   a,b,c,d,e,f,g
   #define order_lsb8(a,b,c,d,e,f,g,h) a,b,c,d,e,f,g,h
+  #define order_msb1(a)               a
   #define order_msb2(a,b)             b,a
   #define order_msb3(a,b,c)           c,b,a
   #define order_msb4(a,b,c,d)         d,c,b,a
@@ -20,6 +22,7 @@
   #define order_msb8(a,b,c,d,e,f,g,h) h,g,f,e,d,c,b,a
 #elif defined(ENDIAN_MSB)
   //big-endian:    uint8_t[] { 0x01, 0x02, 0x03, 0x04 } == 0x01020304
+  #define order_lsb1(a)               a
   #define order_lsb2(a,b)             b,a
   #define order_lsb3(a,b,c)           c,b,a
   #define order_lsb4(a,b,c,d)         d,c,b,a
@@ -27,6 +30,7 @@
   #define order_lsb6(a,b,c,d,e,f)     f,e,d,c,b,a
   #define order_lsb7(a,b,c,d,e,f,g)   g,f,e,d,c,b,a
   #define order_lsb8(a,b,c,d,e,f,g,h) h,g,f,e,d,c,b,a
+  #define order_msb1(a)               a
   #define order_msb2(a,b)             a,b
   #define order_msb3(a,b,c)           a,b,c
   #define order_msb4(a,b,c,d)         a,b,c,d

nall/platform.hpp

@@ -1,5 +1,7 @@
 #pragma once
 
+#define register $register
+
 #include <nall/intrinsics.hpp>
 
 namespace Math {