mirror of
https://github.com/bsnes-emu/bsnes.git
synced 2025-02-23 14:42:33 +01:00
41c478ac4a
byuu says:
Changelog:
- entire GBA core ported to auto function() -> return; syntax
- fixed GBA BLDY bug that was causing flickering in a few games
- replaced nall/config usage with nall/string/markup/node
- this merges all configuration files to a unified settings.bml file
- added "Ignore Manifests" option to the advanced setting tab
- this lets you keep a manifest.bml for an older version of higan; if
you want to do regression testing
Be sure to remap your controller/hotkey inputs, and for SNES, choose
"Gamepad" from "Controller Port 1" in the system menu. Otherwise you
won't get any input. No need to blow away your old config files, unless
you want to.
86 lines
1.8 KiB
C++
86 lines
1.8 KiB
C++
auto APU::runsequencer() -> void {
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auto& r = sequencer;
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if(r.base == 0) { //512hz
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if(r.step == 0 || r.step == 2 || r.step == 4 || r.step == 6) { //256hz
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square1.clocklength();
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square2.clocklength();
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wave.clocklength();
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noise.clocklength();
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}
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if(r.step == 2 || r.step == 6) { //128hz
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square1.clocksweep();
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}
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if(r.step == 7) { //64hz
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square1.clockenvelope();
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square2.clockenvelope();
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noise.clockenvelope();
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}
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r.step++;
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}
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r.base++;
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if(r.enable[0]) square1.run();
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if(r.enable[1]) square2.run();
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if(r.enable[2]) wave.run();
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if(r.enable[3]) noise.run();
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}
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auto APU::Sequencer::read(uint addr) const -> uint8 {
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switch(addr) {
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case 0: return (rvolume << 0) | (lvolume << 4);
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case 1: return (
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(renable[0] << 0)
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| (renable[1] << 1)
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| (renable[2] << 2)
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| (renable[3] << 3)
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| (lenable[0] << 4)
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| (lenable[1] << 5)
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| (lenable[2] << 6)
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| (lenable[3] << 7)
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);
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case 2: return (masterenable << 7);
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}
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}
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auto APU::Sequencer::write(uint addr, uint8 byte) -> void {
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switch(addr) {
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case 0: //NR50
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rvolume = byte >> 0;
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lvolume = byte >> 4;
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break;
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case 1: //NR51
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renable[0] = byte >> 0;
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renable[1] = byte >> 1;
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renable[2] = byte >> 2;
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renable[3] = byte >> 3;
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lenable[0] = byte >> 4;
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lenable[1] = byte >> 5;
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lenable[2] = byte >> 6;
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lenable[3] = byte >> 7;
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break;
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case 2: //NR52
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enable[0] = byte >> 0;
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enable[1] = byte >> 1;
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enable[2] = byte >> 2;
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enable[3] = byte >> 3;
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masterenable = byte >> 7;
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break;
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}
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}
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auto APU::Sequencer::power() -> void {
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lvolume = 0;
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rvolume = 0;
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for(auto& n : lenable) n = 0;
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for(auto& n : renable) n = 0;
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for(auto& n : enable) n = 0;
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masterenable = 0;
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base = 0;
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step = 0;
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lsample = 0;
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rsample = 0;
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}
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