mirror of
https://github.com/bsnes-emu/bsnes.git
synced 2025-10-04 16:31:34 +02:00
970dcea0ac
bsnes now supports SPC700 emulation (no DSP or sound support, however), and has greatly improved compatibility. It also now contains a keyboard-only joypad configuration tool.
296 lines
6.2 KiB
C++
296 lines
6.2 KiB
C++
//op_read
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inline void bCPU::op_adc_b() {
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int32 r = regs.a.l + rd.l + regs.p.c;
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//bcd
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if(regs.p.d) {
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if(((r ) & 15) > 9)r += 6;
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if(((r >> 4) & 15) > 9)r += 6 << 4;
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}
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regs.p.n = !!(r & 0x80);
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regs.p.v = !!(~(regs.a.l ^ rd.l) & (regs.a.l ^ r) & 0x80);
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regs.p.z = ((uint8)r == 0);
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regs.p.c = (r > 0xff);
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regs.a.l = r;
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}
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inline void bCPU::op_adc_w() {
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int32 r = regs.a.w + rd.w + regs.p.c;
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//bcd
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if(regs.p.d) {
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if(((r ) & 15) > 9)r += 6;
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if(((r >> 4) & 15) > 9)r += 6 << 4;
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if(((r >> 8) & 15) > 9)r += 6 << 8;
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if(((r >> 12) & 15) > 9)r += 6 << 12;
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}
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regs.p.n = !!(r & 0x8000);
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regs.p.v = !!(~(regs.a.w ^ rd.w) & (regs.a.w ^ r) & 0x8000);
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regs.p.z = ((uint16)r == 0);
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regs.p.c = (r > 0xffff);
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regs.a.w = r;
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}
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inline void bCPU::op_and_b() {
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regs.a.l &= rd.l;
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regs.p.n = !!(regs.a.l & 0x80);
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regs.p.z = (regs.a.l == 0);
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}
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inline void bCPU::op_and_w() {
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regs.a.w &= rd.w;
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regs.p.n = !!(regs.a.w & 0x8000);
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regs.p.z = (regs.a.w == 0);
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}
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inline void bCPU::op_bit_b() {
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regs.p.n = !!(rd.l & 0x80);
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regs.p.v = !!(rd.l & 0x40);
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regs.p.z = ((rd.l & regs.a.l) == 0);
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}
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inline void bCPU::op_bit_w() {
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regs.p.n = !!(rd.w & 0x8000);
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regs.p.v = !!(rd.w & 0x4000);
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regs.p.z = ((rd.w & regs.a.w) == 0);
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}
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inline void bCPU::op_cmp_b() {
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int32 r = regs.a.l - rd.l;
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regs.p.n = !!(r & 0x80);
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regs.p.z = ((uint8)r == 0);
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regs.p.c = (r >= 0);
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}
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inline void bCPU::op_cmp_w() {
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int32 r = regs.a.w - rd.w;
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regs.p.n = !!(r & 0x8000);
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regs.p.z = ((uint16)r == 0);
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regs.p.c = (r >= 0);
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}
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inline void bCPU::op_cpx_b() {
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int32 r = regs.x.l - rd.l;
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regs.p.n = !!(r & 0x80);
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regs.p.z = ((uint8)r == 0);
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regs.p.c = (r >= 0);
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}
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inline void bCPU::op_cpx_w() {
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int32 r = regs.x.w - rd.w;
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regs.p.n = !!(r & 0x8000);
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regs.p.z = ((uint16)r == 0);
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regs.p.c = (r >= 0);
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}
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inline void bCPU::op_cpy_b() {
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int32 r = regs.y.l - rd.l;
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regs.p.n = !!(r & 0x80);
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regs.p.z = ((uint8)r == 0);
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regs.p.c = (r >= 0);
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}
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inline void bCPU::op_cpy_w() {
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int32 r = regs.y.w - rd.w;
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regs.p.n = !!(r & 0x8000);
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regs.p.z = ((uint16)r == 0);
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regs.p.c = (r >= 0);
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}
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inline void bCPU::op_eor_b() {
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regs.a.l ^= rd.l;
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regs.p.n = !!(regs.a.l & 0x80);
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regs.p.z = (regs.a.l == 0);
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}
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inline void bCPU::op_eor_w() {
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regs.a.w ^= rd.w;
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regs.p.n = !!(regs.a.w & 0x8000);
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regs.p.z = (regs.a.w == 0);
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}
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inline void bCPU::op_lda_b() {
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regs.a.l = rd.l;
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regs.p.n = !!(regs.a.l & 0x80);
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regs.p.z = (regs.a.l == 0);
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}
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inline void bCPU::op_lda_w() {
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regs.a.w = rd.w;
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regs.p.n = !!(regs.a.w & 0x8000);
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regs.p.z = (regs.a.w == 0);
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}
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inline void bCPU::op_ldx_b() {
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regs.x.l = rd.l;
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regs.p.n = !!(regs.x.l & 0x80);
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regs.p.z = (regs.x.l == 0);
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}
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inline void bCPU::op_ldx_w() {
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regs.x.w = rd.w;
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regs.p.n = !!(regs.x.w & 0x8000);
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regs.p.z = (regs.x.w == 0);
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}
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inline void bCPU::op_ldy_b() {
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regs.y.l = rd.l;
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regs.p.n = !!(regs.y.l & 0x80);
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regs.p.z = (regs.y.l == 0);
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}
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inline void bCPU::op_ldy_w() {
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regs.y.w = rd.w;
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regs.p.n = !!(regs.y.w & 0x8000);
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regs.p.z = (regs.y.w == 0);
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}
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inline void bCPU::op_ora_b() {
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regs.a.l |= rd.l;
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regs.p.n = !!(regs.a.l & 0x80);
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regs.p.z = (regs.a.l == 0);
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}
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inline void bCPU::op_ora_w() {
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regs.a.w |= rd.w;
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regs.p.n = !!(regs.a.w & 0x8000);
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regs.p.z = (regs.a.w == 0);
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}
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inline void bCPU::op_sbc_b() {
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int32 r = regs.a.l - rd.l - !regs.p.c;
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//bcd
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if(regs.p.d) {
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if(((r ) & 15) > 9)r -= 6;
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if(((r >> 4) & 15) > 9)r -= 6 << 4;
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}
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regs.p.n = !!(r & 0x80);
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regs.p.v = !!((regs.a.l ^ rd.l) & (regs.a.l ^ r) & 0x80);
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regs.p.z = ((byte)r == 0);
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regs.p.c = (r >= 0);
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regs.a.l = r;
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}
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inline void bCPU::op_sbc_w() {
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int32 r = regs.a.w - rd.w - !regs.p.c;
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//bcd
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if(regs.p.d) {
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if(((r ) & 15) > 9)r -= 6;
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if(((r >> 4) & 15) > 9)r -= 6 << 4;
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if(((r >> 8) & 15) > 9)r -= 6 << 8;
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if(((r >> 12) & 15) > 9)r -= 6 << 12;
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}
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regs.p.n = !!(r & 0x8000);
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regs.p.v = !!((regs.a.w ^ rd.w) & (regs.a.w ^ r) & 0x8000);
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regs.p.z = ((word)r == 0);
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regs.p.c = (r >= 0);
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regs.a.w = r;
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}
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//op_rmw
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inline void bCPU::op_inc_b() {
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rd.l++;
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regs.p.n = !!(rd.l & 0x80);
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regs.p.z = (rd.l == 0);
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}
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inline void bCPU::op_inc_w() {
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rd.w++;
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regs.p.n = !!(rd.w & 0x8000);
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regs.p.z = (rd.w == 0);
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}
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inline void bCPU::op_dec_b() {
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rd.l--;
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regs.p.n = !!(rd.l & 0x80);
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regs.p.z = (rd.l == 0);
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}
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inline void bCPU::op_dec_w() {
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rd.w--;
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regs.p.n = !!(rd.w & 0x8000);
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regs.p.z = (rd.w == 0);
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}
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inline void bCPU::op_asl_b() {
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regs.p.c = !!(rd.l & 0x80);
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rd.l <<= 1;
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regs.p.n = !!(rd.l & 0x80);
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regs.p.z = (rd.l == 0);
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}
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inline void bCPU::op_asl_w() {
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regs.p.c = !!(rd.w & 0x8000);
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rd.w <<= 1;
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regs.p.n = !!(rd.w & 0x8000);
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regs.p.z = (rd.w == 0);
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}
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inline void bCPU::op_lsr_b() {
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regs.p.c = rd.l & 1;
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rd.l >>= 1;
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regs.p.n = !!(rd.l & 0x80);
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regs.p.z = (rd.l == 0);
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}
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inline void bCPU::op_lsr_w() {
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regs.p.c = rd.w & 1;
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rd.w >>= 1;
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regs.p.n = !!(rd.w & 0x8000);
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regs.p.z = (rd.w == 0);
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}
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inline void bCPU::op_rol_b() {
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uint16 c = regs.p.c;
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regs.p.c = !!(rd.l & 0x80);
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rd.l <<= 1;
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rd.l |= c;
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regs.p.n = !!(rd.l & 0x80);
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regs.p.z = (rd.l == 0);
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}
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inline void bCPU::op_rol_w() {
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uint16 c = regs.p.c;
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regs.p.c = !!(rd.w & 0x8000);
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rd.w <<= 1;
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rd.w |= c;
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regs.p.n = !!(rd.w & 0x8000);
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regs.p.z = (rd.w == 0);
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}
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inline void bCPU::op_ror_b() {
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uint16 c = (regs.p.c)?0x80:0;
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regs.p.c = rd.l & 1;
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rd.l >>= 1;
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rd.l |= c;
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regs.p.n = !!(rd.l & 0x80);
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regs.p.z = (rd.l == 0);
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}
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inline void bCPU::op_ror_w() {
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uint16 c = (regs.p.c)?0x8000:0;
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regs.p.c = rd.w & 1;
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rd.w >>= 1;
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rd.w |= c;
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regs.p.n = !!(rd.w & 0x8000);
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regs.p.z = (rd.w == 0);
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}
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inline void bCPU::op_trb_b() {
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regs.p.z = ((rd.l & regs.a.l) == 0);
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rd.l &= ~regs.a.l;
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}
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inline void bCPU::op_trb_w() {
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regs.p.z = ((rd.w & regs.a.w) == 0);
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rd.w &= ~regs.a.w;
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}
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inline void bCPU::op_tsb_b() {
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regs.p.z = ((rd.l & regs.a.l) == 0);
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rd.l |= regs.a.l;
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}
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inline void bCPU::op_tsb_w() {
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regs.p.z = ((rd.w & regs.a.w) == 0);
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rd.w |= regs.a.w;
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}
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