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423a6c6bf8
byuu says: Commands can be prefixed with: (cpu|smp|ppu|dsp|apu|vram|oam|cgram)/ to set their source. Eg "vram/hex 0800" or "smp/breakpoints.append execute ffc0"; default is cpu. These overlap a little bit in odd ways, but that's just the way the SNES works: it's not a very orthogonal system. CPU is both a processor and the main bus (ROM, RAM, WRAM, etc), APU is the shared memory by the SMP+DSP (eg use it to catch writes from either chip); PPU probably won't ever be used since it's broken down into three separate buses (VRAM, OAM, CGRAM), but DSP could be useful for tracking bugs like we found in Koushien 2 with the DSP echo buffer corrupting SMP opcodes. Technically the PPU memory pools are only ever tripped by the CPU poking at them, as the PPU doesn't ever write. I now have run.for, run.to, step.for, step.to. The difference is that run only prints the next instruction after running, whereas step prints all of the instructions along the way as well. run.to acts the same as "step over" here. Although it's not quite as nice, since you have to specify the address of the next instruction. Logging the Field/Vcounter/Hcounter on instruction listings now, good for timing information. Added in the tracer mask, as well as memory export, as well as VRAM/OAM/CGRAM/SMP read/write/execute breakpoints, as well as an APU usage map (it tracks DSP reads/writes separately, although I don't currently have debugger callbacks on DSP accesses just yet.) Have not hooked up actual SMP debugging just yet, but I plan to soon. Still thinking about how I want to allow / block interleaving of instructions (terminal output and tracing.) So ... remaining tasks at this point: - full SMP debugging - CPU+SMP interleave support - aliases - hotkeys - save states (will be kind of tricky ... will have to suppress breakpoints during synchronization, or abort a save in a break event.) - keep track of window geometry between runs
75 lines
2.1 KiB
C++
75 lines
2.1 KiB
C++
struct Debugger {
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enum class Source : unsigned { CPU, SMP, PPU, DSP, APU, VRAM, OAM, CGRAM };
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struct Breakpoint {
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Source source = Source::CPU;
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enum class Mode : unsigned { Disabled, Read, Write, Execute } mode = Mode::Disabled;
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unsigned addr = 0;
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optional<uint8> data = false;
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unsigned triggered = 0; //counter for number of times breakpoint was hit
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};
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struct Usage {
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enum : unsigned {
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Read = 0x01,
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Write = 0x02,
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Execute = 0x04,
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//CPU
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FlagE = 0x08,
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FlagM = 0x10,
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FlagX = 0x20,
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//APU
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DspRead = 0x08,
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DspWrite = 0x10,
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};
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};
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Debugger();
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void load();
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void unload();
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void main();
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void run();
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void stop();
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void leave();
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bool breakpointTest(Source source, Breakpoint::Mode mode, unsigned addr, uint8 data = 0x00);
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string cpuDisassemble();
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string cpuDisassemble(unsigned addr, bool e, bool m, bool x);
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void cpuExec(uint24 addr);
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void cpuRead(uint24 addr, uint8 data);
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void cpuWrite(uint24 addr, uint8 data);
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void echoBreakpoints();
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void echoDisassemble(unsigned addr, signed size);
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void echoHex(Source source, unsigned addr, signed size);
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void memoryExport(Source source, string filename);
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uint8 memoryRead(Source source, unsigned addr);
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unsigned memorySize(Source source);
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void memoryWrite(Source source, unsigned addr, uint8 data);
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void ppuCgramRead(uint16 addr, uint8 data);
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void ppuCgramWrite(uint16 addr, uint8 data);
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void ppuOamRead(uint16 addr, uint8 data);
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void ppuOamWrite(uint16 addr, uint8 data);
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void ppuVramRead(uint16 addr, uint8 data);
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void ppuVramWrite(uint16 addr, uint8 data);
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void smpExec(uint16 addr);
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void smpRead(uint16 addr, uint8 data);
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void smpWrite(uint16 addr, uint8 data);
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string sourceName(Source source);
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bool running = false;
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vector<Breakpoint> breakpoints;
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optional<unsigned> cpuRunFor = false;
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optional<unsigned> cpuRunTo = false;
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optional<unsigned> cpuStepFor = false;
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optional<unsigned> cpuStepTo = false;
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file tracerFile;
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bitvector tracerMask;
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uint8* usageCPU = nullptr;
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uint8* usageAPU = nullptr;
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};
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extern Debugger* debugger;
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