bsnes/higan/md/apu/apu.cpp
Tim Allen 55f19c3e0d Update to v103r32 release.
byuu says:

Changelog:

  - Master System: merged Bus into CPU
  - Mega Drive: merged BusCPU into CPU; BusAPU into AU
  - Mega Drive: added TMSS emulation; disabled by default [hex\_usr]
      - VDP lockout not yet emulated
  - processor/arm7tdmi: renamed interrupt() to exception()
  - processor/arm7tdmi: CPSR.F (FIQ disable) flag is set on reset
  - processor/arm7tdmi: pipeline decode stage caches CPSR.T (THUMB mode)
    [MerryMage]
      - fixes `msr_tests.gba` test F
  - processor/arm7tdmi/disassembler: add PC address to left of currently
    executing instruction
  - processor/arm7tdmi: stop forcing CPSR.M (mode flags) bit 4 high (I
    don't know what really happens here)
  - processor/arm7tdmi: undefined instructions now generate Undefined
    0x4 exception
  - processor/arm7tdmi: thumbInstructionAddRegister masks PC by &~3
    instead of &~2
      - hopefully this is correct; &~2 felt very wrong
  - processor/arm7tdmi: thumbInstructionStackMultiple can use sequential
    timing for PC/LR PUSH/POP [Cydrak]
  - systems/Mega Drive.sys: added tmss.rom; enable with cpu version=1
  - tomoko: detect when a ruby video/audio/input driver crashes higan;
    disable it on next program startup

v104 blockers:

  - Mega Drive: support 8-bit SRAM (even if we don't support 16-bit;
    don't force 8-bit to 16-bit)
  - Mega Drive: add region detection support to icarus
  - ruby: add default audio device information so certain drivers won't
    default to silence out of the box
2017-08-12 02:02:09 +10:00

71 lines
1.2 KiB
C++

#include <md/md.hpp>
namespace MegaDrive {
APU apu;
#include "bus.cpp"
#include "serialization.cpp"
auto APU::Enter() -> void {
while(true) scheduler.synchronize(), apu.main();
}
auto APU::main() -> void {
if(!state.enabled) {
return step(1);
}
if(state.nmiLine) {
state.nmiLine = 0; //edge-sensitive
irq(0, 0x0066, 0xff);
}
if(state.intLine) {
//level-sensitive
irq(1, 0x0038, 0xff);
}
instruction();
}
auto APU::step(uint clocks) -> void {
Thread::step(clocks);
synchronize(cpu);
}
auto APU::synchronizing() const -> bool {
return scheduler.synchronizing();
}
auto APU::setNMI(bool value) -> void {
state.nmiLine = value;
}
auto APU::setINT(bool value) -> void {
state.intLine = value;
}
auto APU::enable(bool value) -> void {
//68K cannot disable the Z80 without bus access
if(!bus->granted() && !value) return;
if(state.enabled && !value) reset();
state.enabled = value;
}
auto APU::power() -> void {
Z80::bus = this;
Z80::power();
bus->grant(false);
create(APU::Enter, system.frequency() / 15.0);
state = {};
}
auto APU::reset() -> void {
Z80::power();
bus->grant(false);
create(APU::Enter, system.frequency() / 15.0);
state = {};
}
}