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e7806dd6e8
byuu says:
Changelog:
- processor/gsu: minor code cleanup
- processor/hg51b: renamed reg(Read,Write) to register(Read,Write)
- processor/lr35902: minor code cleanup
- processor/spc700: completed code cleanup (sans disassembler)
- no longer uses internal global state inside instructions
- processor/spc700: will no longer hang the emulator if stuck in a WAI
(SLEEP) or STP (STOP) instruction
- processor/spc700: fixed bug in handling of OR1 and AND1 instructions
- processor/z80: minor code cleanup
- sfc/dsp: revert to initializing registers to 0x00; save for
ENDX=random(), FLG=0xe0 [Jonas Quinn]
Major testing of the SNES game library would be appreciated, now that
its CPU cores have all been revised.
We know the DSP registers read back as randomized data ... mostly, but
there are apparently internal latches, which we can't emulate with the
current DSP design. So until we know which registers have separate
internal state that actually *is* initialized, I'm going to play it safe
and not break more games.
Thanks again to Jonas Quinn for the continued research into this issue.
EDIT: that said ... `MD works if((ENDX&0x30) > 0)` is only a 3:4 chance
that the game will work. That seems pretty unlikely that the odds of it
working are that low, given hardware testing by others in the past :/ I
thought if worked if `PITCH != 0` before, which would have been way more
likely.
The two remaining CPU cores that need major cleanup efforts are the
LR35902 and ARM cores. Both are very large, complicated, annoying cores
that will probably be better off as full rewrites from scratch. I don't
think I want to delay v103 in trying to accomplish that, however.
So I think it'll be best to focus on allowing the Mega Drive core to not
lock when processors are frozen waiting on a response from other
processors during a save state operation. Then we should be good for a
new release.
56 lines
981 B
C++
56 lines
981 B
C++
#pragma once
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//Hitachi HG51B169 (HG51BS family/derivative?)
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namespace Processor {
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struct HG51B {
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auto exec(uint24 addr) -> void;
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virtual auto read(uint24 addr) -> uint8 = 0;
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virtual auto write(uint24 addr, uint8 data) -> void = 0;
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auto power() -> void;
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auto serialize(serializer&) -> void;
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//uint16 programROM[2][256];
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uint24 dataROM[1024];
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uint8 dataRAM[3072];
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protected:
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auto push() -> void;
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auto pull() -> void;
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auto sa() -> uint;
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auto ri() -> uint;
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auto np() -> uint;
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auto instruction() -> void;
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//registers.cpp
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auto registerRead(uint8 addr) const -> uint24;
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auto registerWrite(uint8 addr, uint24 data) -> void;
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struct Registers {
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bool halt;
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uint24 pc;
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uint16 p;
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bool n;
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bool z;
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bool c;
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uint24 a;
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uint24 acch;
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uint24 accl;
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uint24 busdata;
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uint24 romdata;
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uint24 ramdata;
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uint24 busaddr;
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uint24 ramaddr;
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uint24 gpr[16];
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} regs;
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uint24 stack[8];
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uint16 opcode;
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};
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}
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