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https://github.com/bsnes-emu/bsnes.git
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40802b0b9f
byuu says:
Changelog:
- fc/controller: added ControllerPort class; removed Peripherals class
- md/controller/gamepad: removed X,Y,Z buttons since this isn't a
6-button controller
- ms/controller: added ControllerPort class (not used in Game Gear
mode); removed Peripherals class
- pce/controller: added ControllerPort class; removed Peripherals
class
- processor/spc700: idle(address) is part of SMP class again, contains
flag to detect mov (x)+ edge case
- sfc/controller/super-scope,justifier: use CPU frequency instead of
hard-coding NTSC frequency
- sfc/cpu: move 4x8-bit SMP ports to SMP class
- sfc/smp: move APU RAM to DSP class
- sfc/smp: improved emulation of TEST registers bits 4-7 [information
from nocash]
- d4,d5 is RAM wait states (1,2,5,10)
- d6,d7 is ROM/IO wait states (1,2,5,10)
- sfc/smp: code cleanup to new style (order from lowest to highest
bits; use .bit(s) functions)
- sfc/smp: $00f8,$00f9 are P4/P5 auxiliary ports; named the registers
better
38 lines
880 B
C++
38 lines
880 B
C++
auto CPU::idle() -> void {
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status.clockCount = 6;
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dmaEdge();
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step(6);
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aluEdge();
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}
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auto CPU::read(uint24 addr) -> uint8 {
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status.clockCount = speed(addr);
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dmaEdge();
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step(status.clockCount - 4);
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auto data = bus.read(addr, r.mdr);
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step(4);
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aluEdge();
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//$00-3f,80-bf:4000-43ff reads are internal to CPU, and do not update the MDR
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if((addr & 0x40fc00) != 0x4000) r.mdr = data;
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return data;
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}
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auto CPU::write(uint24 addr, uint8 data) -> void {
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aluEdge();
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status.clockCount = speed(addr);
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dmaEdge();
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step(status.clockCount);
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bus.write(addr, r.mdr = data);
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}
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auto CPU::speed(uint24 addr) const -> uint {
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if(addr & 0x408000) return addr & 0x800000 ? io.romSpeed : 8;
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if(addr + 0x6000 & 0x4000) return 8;
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if(addr - 0x4000 & 0x7e00) return 6;
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return 12;
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}
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auto CPU::readDisassembler(uint24 addr) -> uint8 {
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return bus.read(addr, r.mdr);
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}
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