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a59ecb3dd4
byuu describes the changes since v067: This release officially introduces the accuracy and performance cores, alongside the previously-existing compatibility core. The accuracy core allows the most accurate SNES emulation ever seen, with every last processor running at the lowest possible clock synchronization level. The performance core allows slower computers the chance to finally use bsnes. It is capable of attaining 60fps in standard games even on an entry-level Intel Atom processor, commonly found in netbooks. The accuracy core is absolutely not meant for casual gaming at all. It is meant solely for getting as close to 100% perfection as possible, no matter the cost to speed. It should only be used for testing, development or debugging. The compatibility core is identical to bsnes v067 and earlier, but is now roughly 10% faster. This is the default and recommended core for casual gaming. The performance core contains an entirely new S-CPU core, with range-tested IRQs; and uses blargg's heavily-optimized S-DSP core directly. Although there are very minor accuracy tradeoffs to increase speed, I am confident that the performance core is still more accurate and compatible than any other SNES emulator. The S-CPU, S-SMP, S-DSP, SuperFX and SA-1 processors are all clock-based, just as in the accuracy and compatibility cores; and as always, there are zero game-specific hacks. Its compatibility is still well above 99%, running even the most challenging games flawlessly. If you have held off from using bsnes in the past due to its system requirements, please give the performance core a try. I think you will be impressed. I'm also not finished: I believe performance can be increased even further. I would also strongly suggest Windows Vista and Windows 7 users to take advantage of the new XAudio2 driver by OV2. Not only does it give you a performance boost, it also lowers latency and provides better sound by way of skipping an API emulation layer. Changelog: - Split core into three profiles: accuracy, compatibility and performance - Accuracy core now takes advantage of variable-bitlength integers (eg uint24_t) - Performance core uses a new S-CPU core, written from scratch for speed - Performance core uses blargg's snes_dsp library for S-DSP emulation - Binaries are now compiled using GCC 4.5 - Added a workaround in the SA-1 core for a bug in GCC 4.5+ - The clock-based S-PPU renderer has greatly improved OAM emulation; fixing Winter Gold and Megalomania rendering issues - Corrected pseudo-hires color math in the clock-based S-PPU renderer; fixing Super Buster Bros backgrounds - Fixed a clamping bug in the Cx4 16-bit triangle operation [Jonas Quinn]; fixing Mega Man X2 "gained weapon" star background effect - Updated video renderer to properly handle mixed-resolution screens with interlace enabled; fixing Air Strike Patrol level briefing screen - Added mightymo's 2010-08-19 cheat code pack - Windows port: added XAudio2 output support [OV2] - Source: major code restructuring; virtual base classes for processor - cores removed, build system heavily modified, etc.
61 lines
1.8 KiB
C
Executable File
61 lines
1.8 KiB
C
Executable File
/* Bra.h -- Branch converters for executables
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2008-10-04 : Igor Pavlov : Public domain */
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#ifndef __BRA_H
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#define __BRA_H
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#include "Types.h"
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/*
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These functions convert relative addresses to absolute addresses
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in CALL instructions to increase the compression ratio.
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In:
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data - data buffer
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size - size of data
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ip - current virtual Instruction Pinter (IP) value
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state - state variable for x86 converter
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encoding - 0 (for decoding), 1 (for encoding)
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Out:
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state - state variable for x86 converter
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Returns:
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The number of processed bytes. If you call these functions with multiple calls,
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you must start next call with first byte after block of processed bytes.
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Type Endian Alignment LookAhead
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x86 little 1 4
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ARMT little 2 2
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ARM little 4 0
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PPC big 4 0
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SPARC big 4 0
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IA64 little 16 0
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size must be >= Alignment + LookAhead, if it's not last block.
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If (size < Alignment + LookAhead), converter returns 0.
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Example:
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UInt32 ip = 0;
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for ()
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{
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; size must be >= Alignment + LookAhead, if it's not last block
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SizeT processed = Convert(data, size, ip, 1);
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data += processed;
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size -= processed;
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ip += processed;
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}
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*/
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#define x86_Convert_Init(state) { state = 0; }
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SizeT x86_Convert(Byte *data, SizeT size, UInt32 ip, UInt32 *state, int encoding);
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SizeT ARM_Convert(Byte *data, SizeT size, UInt32 ip, int encoding);
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SizeT ARMT_Convert(Byte *data, SizeT size, UInt32 ip, int encoding);
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SizeT PPC_Convert(Byte *data, SizeT size, UInt32 ip, int encoding);
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SizeT SPARC_Convert(Byte *data, SizeT size, UInt32 ip, int encoding);
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SizeT IA64_Convert(Byte *data, SizeT size, UInt32 ip, int encoding);
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#endif
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