mirror of
https://github.com/bsnes-emu/bsnes.git
synced 2025-02-24 07:02:27 +01:00
6d9f43a37b
byuu says: Changelog: - GBA: lots of emulation improvements - PPU PRAM is 16-bits wide - DMA masks &~1/Half, &~3/Word - VRAM OBJ 8-bit writes are ignored - OAM 8-bit writes are ignored - BGnCNT unused bits are writable* - BG(0,1)CNT can't set the d13 - BLDALPHA is readable (fixes Donkey Kong Country, etc) - SNES: lots of code cleanups - sfc/chip => sfc/coprocessor - UI: save most recent controller selection GBA test scores: 1552/1552, 37/38, 1020/1260 (* forgot to add the value to the read function, so endrift's I/O tests for them will fail. Fixed locally.) Note: SNES is the only system with multiple controller/expansion port options, and as such is the only one with a "None" option. Because it's shared by the controller and expansion port, it ends up sorted first in the list. This means that on your first run, you'll need to go to Super Famicom->Controller Port 1 and select "Gamepad", otherwise input won't work. Also note that changing the expansion port device requires loading a new cart. Unlike controllers, you aren't meant to hotplug expansion port devices.
166 lines
4.3 KiB
C++
166 lines
4.3 KiB
C++
public:
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auto mmio_read(uint addr) -> uint8;
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auto mmio_write(uint addr, uint8 data) -> void;
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privileged:
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struct {
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uint8 ppu1_mdr;
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uint8 ppu2_mdr;
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uint16 vram_readbuffer;
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uint8 oam_latchdata;
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uint8 cgram_latchdata;
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uint8 bgofs_latchdata;
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uint8 mode7_latchdata;
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bool counters_latched;
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bool latch_hcounter;
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bool latch_vcounter;
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uint10 oam_iaddr;
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uint9 cgram_iaddr;
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//$2100 INIDISP
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bool display_disable;
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uint4 display_brightness;
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//$2102 OAMADDL
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//$2103 OAMADDH
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uint10 oam_baseaddr;
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uint10 oam_addr;
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bool oam_priority;
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//$2105 BGMODE
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bool bg3_priority;
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uint8 bgmode;
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//$210d BG1HOFS
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uint16 mode7_hoffset;
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//$210e BG1VOFS
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uint16 mode7_voffset;
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//$2115 VMAIN
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bool vram_incmode;
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uint2 vram_mapping;
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uint8 vram_incsize;
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//$2116 VMADDL
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//$2117 VMADDH
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uint16 vram_addr;
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//$211a M7SEL
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uint2 mode7_repeat;
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bool mode7_vflip;
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bool mode7_hflip;
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//$211b M7A
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uint16 m7a;
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//$211c M7B
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uint16 m7b;
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//$211d M7C
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uint16 m7c;
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//$211e M7D
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uint16 m7d;
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//$211f M7X
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uint16 m7x;
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//$2120 M7Y
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uint16 m7y;
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//$2121 CGADD
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uint9 cgram_addr;
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//$2133 SETINI
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bool mode7_extbg;
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bool pseudo_hires;
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bool overscan;
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bool interlace;
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//$213c OPHCT
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uint16 hcounter;
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//$213d OPVCT
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uint16 vcounter;
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} regs;
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alwaysinline auto get_vram_address() -> uint16;
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alwaysinline auto vram_read(uint addr) -> uint8;
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alwaysinline auto vram_write(uint addr, uint8 data) -> void;
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alwaysinline auto oam_read(uint addr) -> uint8;
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alwaysinline auto oam_write(uint addr, uint8 data) -> void;
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alwaysinline auto cgram_read(uint addr) -> uint8;
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alwaysinline auto cgram_write(uint addr, uint8 data) -> void;
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auto mmio_update_video_mode() -> void;
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auto mmio_w2100(uint8) -> void; //INIDISP
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auto mmio_w2101(uint8) -> void; //OBSEL
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auto mmio_w2102(uint8) -> void; //OAMADDL
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auto mmio_w2103(uint8) -> void; //OAMADDH
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auto mmio_w2104(uint8) -> void; //OAMDATA
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auto mmio_w2105(uint8) -> void; //BGMODE
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auto mmio_w2106(uint8) -> void; //MOSAIC
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auto mmio_w2107(uint8) -> void; //BG1SC
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auto mmio_w2108(uint8) -> void; //BG2SC
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auto mmio_w2109(uint8) -> void; //BG3SC
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auto mmio_w210a(uint8) -> void; //BG4SC
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auto mmio_w210b(uint8) -> void; //BG12NBA
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auto mmio_w210c(uint8) -> void; //BG34NBA
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auto mmio_w210d(uint8) -> void; //BG1HOFS
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auto mmio_w210e(uint8) -> void; //BG1VOFS
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auto mmio_w210f(uint8) -> void; //BG2HOFS
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auto mmio_w2110(uint8) -> void; //BG2VOFS
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auto mmio_w2111(uint8) -> void; //BG3HOFS
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auto mmio_w2112(uint8) -> void; //BG3VOFS
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auto mmio_w2113(uint8) -> void; //BG4HOFS
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auto mmio_w2114(uint8) -> void; //BG4VOFS
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auto mmio_w2115(uint8) -> void; //VMAIN
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auto mmio_w2116(uint8) -> void; //VMADDL
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auto mmio_w2117(uint8) -> void; //VMADDH
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auto mmio_w2118(uint8) -> void; //VMDATAL
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auto mmio_w2119(uint8) -> void; //VMDATAH
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auto mmio_w211a(uint8) -> void; //M7SEL
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auto mmio_w211b(uint8) -> void; //M7A
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auto mmio_w211c(uint8) -> void; //M7B
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auto mmio_w211d(uint8) -> void; //M7C
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auto mmio_w211e(uint8) -> void; //M7D
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auto mmio_w211f(uint8) -> void; //M7X
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auto mmio_w2120(uint8) -> void; //M7Y
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auto mmio_w2121(uint8) -> void; //CGADD
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auto mmio_w2122(uint8) -> void; //CGDATA
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auto mmio_w2123(uint8) -> void; //W12SEL
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auto mmio_w2124(uint8) -> void; //W34SEL
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auto mmio_w2125(uint8) -> void; //WOBJSEL
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auto mmio_w2126(uint8) -> void; //WH0
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auto mmio_w2127(uint8) -> void; //WH1
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auto mmio_w2128(uint8) -> void; //WH2
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auto mmio_w2129(uint8) -> void; //WH3
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auto mmio_w212a(uint8) -> void; //WBGLOG
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auto mmio_w212b(uint8) -> void; //WOBJLOG
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auto mmio_w212c(uint8) -> void; //TM
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auto mmio_w212d(uint8) -> void; //TS
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auto mmio_w212e(uint8) -> void; //TMW
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auto mmio_w212f(uint8) -> void; //TSW
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auto mmio_w2130(uint8) -> void; //CGWSEL
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auto mmio_w2131(uint8) -> void; //CGADDSUB
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auto mmio_w2132(uint8) -> void; //COLDATA
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auto mmio_w2133(uint8) -> void; //SETINI
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auto mmio_r2134() -> uint8; //MPYL
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auto mmio_r2135() -> uint8; //MPYM
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auto mmio_r2136() -> uint8; //MPYH
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auto mmio_r2137() -> uint8; //SLHV
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auto mmio_r2138() -> uint8; //OAMDATAREAD
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auto mmio_r2139() -> uint8; //VMDATALREAD
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auto mmio_r213a() -> uint8; //VMDATAHREAD
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auto mmio_r213b() -> uint8; //CGDATAREAD
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auto mmio_r213c() -> uint8; //OPHCT
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auto mmio_r213d() -> uint8; //OPVCT
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auto mmio_r213e() -> uint8; //STAT77
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auto mmio_r213f() -> uint8; //STAT78
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auto mmio_reset() -> void;
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