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https://github.com/bsnes-emu/bsnes.git
synced 2025-02-23 14:42:33 +01:00
byuu says: Changelog: - fc/controller: added ControllerPort class; removed Peripherals class - md/controller/gamepad: removed X,Y,Z buttons since this isn't a 6-button controller - ms/controller: added ControllerPort class (not used in Game Gear mode); removed Peripherals class - pce/controller: added ControllerPort class; removed Peripherals class - processor/spc700: idle(address) is part of SMP class again, contains flag to detect mov (x)+ edge case - sfc/controller/super-scope,justifier: use CPU frequency instead of hard-coding NTSC frequency - sfc/cpu: move 4x8-bit SMP ports to SMP class - sfc/smp: move APU RAM to DSP class - sfc/smp: improved emulation of TEST registers bits 4-7 [information from nocash] - d4,d5 is RAM wait states (1,2,5,10) - d6,d7 is ROM/IO wait states (1,2,5,10) - sfc/smp: code cleanup to new style (order from lowest to highest bits; use .bit(s) functions) - sfc/smp: $00f8,$00f9 are P4/P5 auxiliary ports; named the registers better
50 lines
950 B
C++
50 lines
950 B
C++
auto CPU::readRAM(uint11 addr) -> uint8 {
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return ram[addr];
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}
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auto CPU::writeRAM(uint11 addr, uint8 data) -> void {
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ram[addr] = data;
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}
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auto CPU::readIO(uint16 addr) -> uint8 {
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switch(addr) {
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case 0x4016: {
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auto data = controllerPort1.device->data();
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return (mdr() & 0xc0) | data.bit(2) << 4 | data.bit(1) << 3 | data.bit(0) << 0;
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}
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case 0x4017: {
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auto data = controllerPort2.device->data();
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return (mdr() & 0xc0) | data.bit(2) << 4 | data.bit(1) << 3 | data.bit(0) << 0;
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}
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}
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return apu.readIO(addr);
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}
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auto CPU::writeIO(uint16 addr, uint8 data) -> void {
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switch(addr) {
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case 0x4014: {
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io.oamdmaPage = data;
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io.oamdmaPending = true;
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return;
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}
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case 0x4016: {
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controllerPort1.device->latch(data.bit(0));
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controllerPort2.device->latch(data.bit(0));
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return;
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}
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}
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return apu.writeIO(addr, data);
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}
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auto CPU::readDebugger(uint16 addr) -> uint8 {
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return bus.read(addr);
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}
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