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byuu says: Changelog: - PCE: restructured VCE, VDCs to run one scanline at a time - PCE: bound VDCs to 1365x262 timing (in order to decouple the VDCs from the VCE) - PCE: the two changes above allow save states to function; also grants a minor speed boost - PCE: added cheat code support (uses 21-bit bus addressing; compare byte will be useful here) - 68K: fixed `mov *,ccr` to read two bytes instead of one [Cydrak] - Z80: emulated /BUSREQ, /BUSACK; allows 68K to suspend the Z80 [Cydrak] - MD: emulated the Z80 executing instructions [Cydrak] - MD: emulated Z80 interrupts (triggered during each Vblank period) [Cydrak] - MD: emulated Z80 memory map [Cydrak] - MD: added stubs for PSG, YM2612 accesses [Cydrak] - MD: improved bus emulation [Cydrak] The PCE core is pretty much ready to go. The only major feature missing is FM modulation. The Mega Drive improvements let us start to see the splash screens for Langrisser II, Shining Force, Shining in the Darkness. I was hoping I could get them in-game, but no such luck. My Z80 implementation is probably flawed in some way ... now that I think about it, I believe I missed the BusAPU::reset() check for having been granted access to the Z80 first. But I doubt that's the problem. Next step is to implement Cydrak's PSG core into the Master System emulator. Once that's in, I'm going to add save states and cheat code support to the Master System core. Next, I'll add the PSG core into the Mega Drive. Then I'll add the 'easy' PCM part of the YM2612. Then the rest of the beastly YM2612 core. Then finally, cap things off with save state and cheat code support. Should be nearing a new release at that point.
73 lines
1.4 KiB
C++
73 lines
1.4 KiB
C++
//Hudson Soft HuC6280
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struct CPU : Processor::HuC6280, Thread {
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static auto Enter() -> void;
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auto main() -> void;
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auto step(uint clocks) -> void override;
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auto power() -> void;
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auto lastCycle() -> void override;
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//memory.cpp
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auto load() -> void;
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auto save() -> void;
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//io.cpp
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auto read(uint8 bank, uint13 addr) -> uint8 override;
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auto read_(uint8 bank, uint13 addr) -> uint8;
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auto write(uint8 bank, uint13 addr, uint8 data) -> void override;
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auto store(uint2 addr, uint8 data) -> void override;
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//timer.cpp
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auto timerStep(uint clocks) -> void;
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//serialization.cpp
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auto serialize(serializer&) -> void;
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vector<Thread*> peripherals;
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private:
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uint8 ram[0x8000]; //PC Engine = 8KB, SuperGrafx = 32KB
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uint8 bram[0x800]; //PC Engine CD-ROM Backup RAM = 2KB
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struct IRQ {
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//irq.cpp
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auto pending() const -> bool;
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auto vector() const -> uint16;
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auto poll() -> void;
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private:
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bool disableExternal;
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bool disableVDC;
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bool disableTimer;
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bool pendingIRQ;
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uint16 pendingVector;
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friend class CPU;
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} irq;
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struct Timer {
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inline auto irqLine() const { return line; }
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//timer.cpp
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auto start() -> void;
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auto step(uint clocks) -> void;
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private:
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bool enable;
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uint7 latch;
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uint7 value;
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uint clock;
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bool line;
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friend class CPU;
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} timer;
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struct IO {
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uint8 mdr;
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} io;
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};
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extern CPU cpu;
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