bsnes/higan/pce/cpu/cpu.hpp
Tim Allen d76c0c7e82 Update to v102r08 release.
byuu says:

Changelog:

  - PCE: restructured VCE, VDCs to run one scanline at a time
  - PCE: bound VDCs to 1365x262 timing (in order to decouple the VDCs
    from the VCE)
  - PCE: the two changes above allow save states to function; also
    grants a minor speed boost
  - PCE: added cheat code support (uses 21-bit bus addressing; compare
    byte will be useful here)
  - 68K: fixed `mov *,ccr` to read two bytes instead of one [Cydrak]
  - Z80: emulated /BUSREQ, /BUSACK; allows 68K to suspend the Z80
    [Cydrak]
  - MD: emulated the Z80 executing instructions [Cydrak]
  - MD: emulated Z80 interrupts (triggered during each Vblank period)
    [Cydrak]
  - MD: emulated Z80 memory map [Cydrak]
  - MD: added stubs for PSG, YM2612 accesses [Cydrak]
  - MD: improved bus emulation [Cydrak]

The PCE core is pretty much ready to go. The only major feature missing
is FM modulation.

The Mega Drive improvements let us start to see the splash screens for
Langrisser II, Shining Force, Shining in the Darkness. I was hoping I
could get them in-game, but no such luck. My Z80 implementation is
probably flawed in some way ... now that I think about it, I believe I
missed the BusAPU::reset() check for having been granted access to the
Z80 first. But I doubt that's the problem.

Next step is to implement Cydrak's PSG core into the Master System
emulator. Once that's in, I'm going to add save states and cheat code
support to the Master System core.

Next, I'll add the PSG core into the Mega Drive. Then I'll add the
'easy' PCM part of the YM2612. Then the rest of the beastly YM2612 core.
Then finally, cap things off with save state and cheat code support.

Should be nearing a new release at that point.
2017-02-20 19:13:10 +11:00

73 lines
1.4 KiB
C++

//Hudson Soft HuC6280
struct CPU : Processor::HuC6280, Thread {
static auto Enter() -> void;
auto main() -> void;
auto step(uint clocks) -> void override;
auto power() -> void;
auto lastCycle() -> void override;
//memory.cpp
auto load() -> void;
auto save() -> void;
//io.cpp
auto read(uint8 bank, uint13 addr) -> uint8 override;
auto read_(uint8 bank, uint13 addr) -> uint8;
auto write(uint8 bank, uint13 addr, uint8 data) -> void override;
auto store(uint2 addr, uint8 data) -> void override;
//timer.cpp
auto timerStep(uint clocks) -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
vector<Thread*> peripherals;
private:
uint8 ram[0x8000]; //PC Engine = 8KB, SuperGrafx = 32KB
uint8 bram[0x800]; //PC Engine CD-ROM Backup RAM = 2KB
struct IRQ {
//irq.cpp
auto pending() const -> bool;
auto vector() const -> uint16;
auto poll() -> void;
private:
bool disableExternal;
bool disableVDC;
bool disableTimer;
bool pendingIRQ;
uint16 pendingVector;
friend class CPU;
} irq;
struct Timer {
inline auto irqLine() const { return line; }
//timer.cpp
auto start() -> void;
auto step(uint clocks) -> void;
private:
bool enable;
uint7 latch;
uint7 value;
uint clock;
bool line;
friend class CPU;
} timer;
struct IO {
uint8 mdr;
} io;
};
extern CPU cpu;