mirror of
https://github.com/bsnes-emu/bsnes.git
synced 2025-02-24 07:02:27 +01:00
4e2eb23835
byuu says: Changelog: - added Cocoa target: higan can now be compiled for OS X Lion [Cydrak, byuu] - SNES/accuracy profile hires color blending improvements - fixes Marvelous text [AWJ] - fixed a slight bug in SNES/SA-1 VBR support caused by a typo - added support for multi-pass shaders that can load external textures (requires OpenGL 3.2+) - added game library path (used by ananke->Import Game) to Settings->Advanced - system profiles, shaders and cheats database can be stored in "all users" shared folders now (eg /usr/share on Linux) - all configuration files are in BML format now, instead of XML (much easier to read and edit this way) - main window supports drag-and-drop of game folders (but not game files / ZIP archives) - audio buffer clears when entering a modal loop on Windows (prevents audio repetition with DirectSound driver) - a substantial amount of code clean-up (probably the biggest refactoring to date) One highly desired target for this release was to default to the optimal drivers instead of the safest drivers, but because AMD drivers don't seem to like my OpenGL 3.2 driver, I've decided to postpone that. AMD has too big a market share. Hopefully with v093 officially released, we can get some public input on what AMD doesn't like.
558 lines
10 KiB
C++
558 lines
10 KiB
C++
#define call (this->*op)
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template<uint8 (SPC700::*op)(uint8)>
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void SPC700::op_adjust(uint8& r) {
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op_io();
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r = call(r);
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}
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template<uint8 (SPC700::*op)(uint8)>
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void SPC700::op_adjust_addr() {
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dp.l = op_readpc();
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dp.h = op_readpc();
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rd = op_read(dp);
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rd = call(rd);
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op_write(dp, rd);
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}
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template<uint8 (SPC700::*op)(uint8)>
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void SPC700::op_adjust_dp() {
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dp = op_readpc();
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rd = op_readdp(dp);
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rd = call(rd);
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op_writedp(dp, rd);
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}
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void SPC700::op_adjust_dpw(signed n) {
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dp = op_readpc();
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rd.w = op_readdp(dp) + n;
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op_writedp(dp++, rd.l);
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rd.h += op_readdp(dp);
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op_writedp(dp++, rd.h);
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regs.p.n = rd & 0x8000;
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regs.p.z = rd == 0;
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}
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template<uint8 (SPC700::*op)(uint8)>
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void SPC700::op_adjust_dpx() {
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dp = op_readpc();
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op_io();
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rd = op_readdp(dp + regs.x);
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rd = call(rd);
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op_writedp(dp + regs.x, rd);
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}
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void SPC700::op_branch(bool condition) {
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rd = op_readpc();
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if(condition == false) return;
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op_io();
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op_io();
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regs.pc += (int8)rd;
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}
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void SPC700::op_branch_bit() {
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dp = op_readpc();
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sp = op_readdp(dp);
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rd = op_readpc();
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op_io();
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if((bool)(sp & (1 << (opcode >> 5))) == (bool)(opcode & 0x10)) return;
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op_io();
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op_io();
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regs.pc += (int8)rd;
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}
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void SPC700::op_pull(uint8& r) {
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op_io();
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op_io();
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r = op_readsp();
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}
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void SPC700::op_push(uint8 r) {
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op_io();
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op_io();
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op_writesp(r);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_read_addr(uint8& r) {
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dp.l = op_readpc();
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dp.h = op_readpc();
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rd = op_read(dp);
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r = call(r, rd);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_read_addri(uint8& r) {
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dp.l = op_readpc();
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dp.h = op_readpc();
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op_io();
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rd = op_read(dp + r);
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regs.a = call(regs.a, rd);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_read_const(uint8& r) {
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rd = op_readpc();
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r = call(r, rd);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_read_dp(uint8& r) {
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dp = op_readpc();
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rd = op_readdp(dp);
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r = call(r, rd);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_read_dpi(uint8& r, uint8& i) {
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dp = op_readpc();
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op_io();
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rd = op_readdp(dp + i);
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r = call(r, rd);
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}
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template<uint16 (SPC700::*op)(uint16, uint16)>
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void SPC700::op_read_dpw() {
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dp = op_readpc();
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rd.l = op_readdp(dp++);
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if(op != &SPC700::op_cpw) op_io();
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rd.h = op_readdp(dp++);
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regs.ya = call(regs.ya, rd);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_read_idpx() {
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dp = op_readpc() + regs.x;
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op_io();
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sp.l = op_readdp(dp++);
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sp.h = op_readdp(dp++);
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rd = op_read(sp);
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regs.a = call(regs.a, rd);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_read_idpy() {
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dp = op_readpc();
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op_io();
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sp.l = op_readdp(dp++);
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sp.h = op_readdp(dp++);
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rd = op_read(sp + regs.y);
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regs.a = call(regs.a, rd);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_read_ix() {
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op_io();
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rd = op_readdp(regs.x);
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regs.a = call(regs.a, rd);
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}
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void SPC700::op_set_addr_bit() {
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dp.l = op_readpc();
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dp.h = op_readpc();
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bit = dp >> 13;
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dp &= 0x1fff;
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rd = op_read(dp);
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switch(opcode >> 5) {
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case 0: //orc addr:bit
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case 1: //orc !addr:bit
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op_io();
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regs.p.c |= (rd & (1 << bit)) ^ (bool)(opcode & 0x20);
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break;
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case 2: //and addr:bit
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case 3: //and !addr:bit
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regs.p.c &= (rd & (1 << bit)) ^ (bool)(opcode & 0x20);
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break;
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case 4: //eor addr:bit
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op_io();
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regs.p.c ^= (bool)(rd & (1 << bit));
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break;
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case 5: //ldc addr:bit
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regs.p.c = (rd & (1 << bit));
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break;
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case 6: //stc addr:bit
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op_io();
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rd = (rd & ~(1 << bit)) | (regs.p.c << bit);
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op_write(dp, rd);
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break;
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case 7: //not addr:bit
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rd ^= 1 << bit;
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op_write(dp, rd);
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break;
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}
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}
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void SPC700::op_set_bit() {
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dp = op_readpc();
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rd = op_readdp(dp) & ~(1 << (opcode >> 5));
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op_writedp(dp, rd | (!(opcode & 0x10) << (opcode >> 5)));
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}
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void SPC700::op_set_flag(bool& flag, bool data) {
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op_io();
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if(&flag == ®s.p.i) op_io();
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flag = data;
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}
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void SPC700::op_test_addr(bool set) {
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dp.l = op_readpc();
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dp.h = op_readpc();
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rd = op_read(dp);
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regs.p.n = (regs.a - rd) & 0x80;
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regs.p.z = (regs.a - rd) == 0;
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op_read(dp);
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op_write(dp, set ? rd | regs.a : rd & ~regs.a);
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}
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void SPC700::op_transfer(uint8& from, uint8& to) {
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op_io();
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to = from;
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if(&to == ®s.s) return;
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regs.p.n = (to & 0x80);
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regs.p.z = (to == 0);
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}
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void SPC700::op_write_addr(uint8& r) {
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dp.l = op_readpc();
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dp.h = op_readpc();
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op_read(dp);
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op_write(dp, r);
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}
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void SPC700::op_write_addri(uint8& i) {
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dp.l = op_readpc();
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dp.h = op_readpc();
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op_io();
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dp += i;
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op_read(dp);
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op_write(dp, regs.a);
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}
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void SPC700::op_write_dp(uint8& r) {
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dp = op_readpc();
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op_readdp(dp);
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op_writedp(dp, r);
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}
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void SPC700::op_write_dpi(uint8& r, uint8& i) {
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dp = op_readpc() + i;
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op_io();
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op_readdp(dp);
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op_writedp(dp, r);
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_write_dp_const() {
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rd = op_readpc();
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dp = op_readpc();
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wr = op_readdp(dp);
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wr = call(wr, rd);
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op != &SPC700::op_cmp ? op_writedp(dp, wr) : op_io();
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_write_dp_dp() {
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sp = op_readpc();
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rd = op_readdp(sp);
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dp = op_readpc();
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if(op != &SPC700::op_st) wr = op_readdp(dp);
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wr = call(wr, rd);
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op != &SPC700::op_cmp ? op_writedp(dp, wr) : op_io();
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}
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template<uint8 (SPC700::*op)(uint8, uint8)>
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void SPC700::op_write_ix_iy() {
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op_io();
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rd = op_readdp(regs.y);
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wr = op_readdp(regs.x);
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wr = call(wr, rd);
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op != &SPC700::op_cmp ? op_writedp(regs.x, wr) : op_io();
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}
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//
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void SPC700::op_bne_dp() {
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dp = op_readpc();
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sp = op_readdp(dp);
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rd = op_readpc();
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op_io();
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if(regs.a == sp) return;
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op_io();
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op_io();
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regs.pc += (int8)rd;
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}
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void SPC700::op_bne_dpdec() {
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dp = op_readpc();
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wr = op_readdp(dp);
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op_writedp(dp, --wr);
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rd = op_readpc();
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if(wr == 0) return;
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op_io();
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op_io();
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regs.pc += (int8)rd;
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}
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void SPC700::op_bne_dpx() {
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dp = op_readpc();
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op_io();
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sp = op_readdp(dp + regs.x);
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rd = op_readpc();
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op_io();
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if(regs.a == sp) return;
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op_io();
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op_io();
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regs.pc += (int8)rd;
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}
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void SPC700::op_bne_ydec() {
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rd = op_readpc();
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op_io();
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op_io();
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if(--regs.y == 0) return;
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op_io();
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op_io();
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regs.pc += (int8)rd;
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}
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void SPC700::op_brk() {
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rd.l = op_read(0xffde);
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rd.h = op_read(0xffdf);
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op_io();
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op_io();
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op_writesp(regs.pc.h);
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op_writesp(regs.pc.l);
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op_writesp(regs.p);
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regs.pc = rd;
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regs.p.b = 1;
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regs.p.i = 0;
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}
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void SPC700::op_clv() {
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op_io();
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regs.p.v = 0;
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regs.p.h = 0;
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}
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void SPC700::op_cmc() {
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op_io();
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op_io();
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regs.p.c = !regs.p.c;
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}
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void SPC700::op_daa() {
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op_io();
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op_io();
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if(regs.p.c || (regs.a) > 0x99) {
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regs.a += 0x60;
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regs.p.c = 1;
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}
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if(regs.p.h || (regs.a & 15) > 0x09) {
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regs.a += 0x06;
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}
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regs.p.n = (regs.a & 0x80);
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regs.p.z = (regs.a == 0);
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}
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void SPC700::op_das() {
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op_io();
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op_io();
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if(!regs.p.c || (regs.a) > 0x99) {
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regs.a -= 0x60;
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regs.p.c = 0;
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}
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if(!regs.p.h || (regs.a & 15) > 0x09) {
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regs.a -= 0x06;
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}
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regs.p.n = (regs.a & 0x80);
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regs.p.z = (regs.a == 0);
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}
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void SPC700::op_div_ya_x() {
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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ya = regs.ya;
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//overflow set if quotient >= 256
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regs.p.v = (regs.y >= regs.x);
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regs.p.h = ((regs.y & 15) >= (regs.x & 15));
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if(regs.y < (regs.x << 1)) {
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//if quotient is <= 511 (will fit into 9-bit result)
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regs.a = ya / regs.x;
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regs.y = ya % regs.x;
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} else {
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//otherwise, the quotient won't fit into regs.p.v + regs.a
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//this emulates the odd behavior of the S-SMP in this case
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regs.a = 255 - (ya - (regs.x << 9)) / (256 - regs.x);
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regs.y = regs.x + (ya - (regs.x << 9)) % (256 - regs.x);
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}
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//result is set based on a (quotient) only
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regs.p.n = (regs.a & 0x80);
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regs.p.z = (regs.a == 0);
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}
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void SPC700::op_jmp_addr() {
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rd.l = op_readpc();
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rd.h = op_readpc();
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regs.pc = rd;
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}
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void SPC700::op_jmp_iaddrx() {
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dp.l = op_readpc();
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dp.h = op_readpc();
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op_io();
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dp += regs.x;
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rd.l = op_read(dp++);
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rd.h = op_read(dp++);
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regs.pc = rd;
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}
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void SPC700::op_jsp_dp() {
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rd = op_readpc();
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op_io();
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op_io();
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op_writesp(regs.pc.h);
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op_writesp(regs.pc.l);
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regs.pc = 0xff00 | rd;
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}
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void SPC700::op_jsr_addr() {
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rd.l = op_readpc();
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rd.h = op_readpc();
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op_io();
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op_io();
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op_io();
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op_writesp(regs.pc.h);
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op_writesp(regs.pc.l);
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regs.pc = rd;
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}
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void SPC700::op_jst() {
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dp = 0xffde - ((opcode >> 4) << 1);
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rd.l = op_read(dp++);
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rd.h = op_read(dp++);
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op_io();
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op_io();
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op_io();
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op_writesp(regs.pc.h);
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op_writesp(regs.pc.l);
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regs.pc = rd;
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}
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void SPC700::op_lda_ixinc() {
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op_io();
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regs.a = op_readdp(regs.x++);
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op_io();
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regs.p.n = regs.a & 0x80;
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regs.p.z = regs.a == 0;
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}
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void SPC700::op_mul_ya() {
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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op_io();
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ya = regs.y * regs.a;
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regs.a = ya;
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regs.y = ya >> 8;
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//result is set based on y (high-byte) only
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regs.p.n = (regs.y & 0x80);
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regs.p.z = (regs.y == 0);
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}
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void SPC700::op_nop() {
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op_io();
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}
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void SPC700::op_plp() {
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op_io();
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op_io();
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regs.p = op_readsp();
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}
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void SPC700::op_rti() {
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regs.p = op_readsp();
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rd.l = op_readsp();
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rd.h = op_readsp();
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op_io();
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op_io();
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regs.pc = rd;
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}
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void SPC700::op_rts() {
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rd.l = op_readsp();
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rd.h = op_readsp();
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op_io();
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op_io();
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regs.pc = rd;
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}
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void SPC700::op_sta_idpx() {
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sp = op_readpc() + regs.x;
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op_io();
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dp.l = op_readdp(sp++);
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dp.h = op_readdp(sp++);
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op_read(dp);
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op_write(dp, regs.a);
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}
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|
|
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void SPC700::op_sta_idpy() {
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sp = op_readpc();
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|
dp.l = op_readdp(sp++);
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dp.h = op_readdp(sp++);
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|
op_io();
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|
dp += regs.y;
|
|
op_read(dp);
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|
op_write(dp, regs.a);
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|
}
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|
|
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void SPC700::op_sta_ix() {
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|
op_io();
|
|
op_readdp(regs.x);
|
|
op_writedp(regs.x, regs.a);
|
|
}
|
|
|
|
void SPC700::op_sta_ixinc() {
|
|
op_io();
|
|
op_io();
|
|
op_writedp(regs.x++, regs.a);
|
|
}
|
|
|
|
void SPC700::op_stw_dp() {
|
|
dp = op_readpc();
|
|
op_readdp(dp);
|
|
op_writedp(dp++, regs.a);
|
|
op_writedp(dp++, regs.y);
|
|
}
|
|
|
|
void SPC700::op_wait() {
|
|
while(true) {
|
|
op_io();
|
|
op_io();
|
|
}
|
|
}
|
|
|
|
void SPC700::op_xcn() {
|
|
op_io();
|
|
op_io();
|
|
op_io();
|
|
op_io();
|
|
regs.a = (regs.a >> 4) | (regs.a << 4);
|
|
regs.p.n = regs.a & 0x80;
|
|
regs.p.z = regs.a == 0;
|
|
}
|
|
|
|
#undef call
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