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(there was no r03 release posted to the WIP thread) byuu says: This should provide hardware-accurate mosaic support in the accurate renderer, with the exception that I'm still not sure what mid-frame vertical mosaic or mid-scanline horizontal mosaic writes do. Either the code I have is correct, or it bypasses the mosaic adjust and gives the exact H/V positions. I've also renamed the fast folder to alternative (thinking about naming it simply alt instead), and started on a brand new PPU renderer. So far it's just a barebones setup with some MMIO support and VRAM/OAM/CGRAM writing. I'm not even confident that I can get this to be faster than the current scanline renderer, but it's the only avenue that we have left for any kind of significant bsnes speedup, so I have to try. I'm going to finish up the MMIO stuff first, that way we have a clean slate with no actual rendering. And then from here we can try various different approaches.
31 lines
744 B
C++
Executable File
31 lines
744 B
C++
Executable File
class PPUDebugger : public PPU, public ChipDebugger {
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public:
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bool property(unsigned id, string &name, string &value);
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bool bg1_enabled[2];
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bool bg2_enabled[2];
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bool bg3_enabled[2];
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bool bg4_enabled[2];
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bool oam_enabled[4];
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uint8 vram_mmio_read(uint16 addr);
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void vram_mmio_write(uint16 addr, uint8 data);
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uint8 oam_mmio_read(uint16 addr);
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void oam_mmio_write(uint16 addr, uint8 data);
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uint8 cgram_mmio_read(uint16 addr);
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void cgram_mmio_write(uint16 addr, uint8 data);
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void render_line_mode0();
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void render_line_mode1();
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void render_line_mode2();
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void render_line_mode3();
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void render_line_mode4();
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void render_line_mode5();
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void render_line_mode6();
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void render_line_mode7();
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PPUDebugger();
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};
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