openscad/Mendel90
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Can now make a single STL regardless of whether it is on the BOM.

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This commit is contained in:
Chris Palmer
2012-03-14 23:15:12 +00:00
parent 3e16e05231
commit 1e86cd17aa
1 changed files with 17 additions and 14 deletions
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15
stls.py
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@@ -11,7 +11,9 @@ def stls(machine, parts = None):
# #
target_dir = machine + "/stls" target_dir = machine + "/stls"
if os.path.isdir(target_dir): if os.path.isdir(target_dir):
if not parts:
shutil.rmtree(target_dir) shutil.rmtree(target_dir)
else:
os.makedirs(target_dir) os.makedirs(target_dir)
# #
@@ -24,16 +26,16 @@ def stls(machine, parts = None):
# #
# Make a list of all the stls in the BOM # Make a list of all the stls in the BOM
# #
if parts:
targets = parts
else:
targets = [] targets = []
for line in open(machine + "/bom/bom.txt", "rt").readlines(): for line in open(machine + "/bom/bom.txt", "rt").readlines():
words = line.split() words = line.split()
if words: if words:
last_word = words[-1] last_word = words[-1]
if len(last_word) > 4 and last_word[-4:] == ".stl": if len(last_word) > 4 and last_word[-4:] == ".stl":
if not parts or (last_word in parts): targets.append(last_word)
targets.append(last_word.replace(".stl", "_stl"))
# #
# Find all the scad files # Find all the scad files
# #
@@ -46,7 +48,8 @@ def stls(machine, parts = None):
words = line.split() words = line.split()
if(len(words) and words[0] == "module"): if(len(words) and words[0] == "module"):
module = words[1].split('(')[0] module = words[1].split('(')[0]
if module in targets: stl = module.replace("_stl", ".stl")
if stl in targets:
# #
# make a file to use the module # make a file to use the module
# #
@@ -60,7 +63,7 @@ def stls(machine, parts = None):
# #
stl_name = target_dir + "/" + module[:-4] + ".stl" stl_name = target_dir + "/" + module[:-4] + ".stl"
openscad.run("-o", stl_name, stl_maker_name) openscad.run("-o", stl_name, stl_maker_name)
targets.remove(module) targets.remove(stl)
# #
# List the ones we didn't find # List the ones we didn't find