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https://github.com/glest/glest-source.git
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Added FPU Safety check method
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@ -24,6 +24,7 @@
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#include "network_manager.h"
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#include "checksum.h"
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#include "auto_test.h"
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#include "FPUCheck.h"
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#include "leak_dumper.h"
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using namespace Shared::Graphics;
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@ -98,6 +99,7 @@ void Game::load(){
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}
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Config &config = Config::getInstance();
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good_fpu_control_registers(NULL,__FILE__,__FUNCTION__,__LINE__);
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string scenarioDir = "";
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if(gameSettings.getScenarioDir() != "") {
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@ -212,6 +214,8 @@ void Game::load(){
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Lang::getInstance().loadScenarioStrings(gameSettings.getScenarioDir(), scenarioName);
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world.loadScenario(gameSettings.getScenarioDir(), &checksum);
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}
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good_fpu_control_registers(NULL,__FILE__,__FUNCTION__,__LINE__);
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}
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void Game::init()
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@ -243,6 +247,8 @@ void Game::init()
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gameCamera.setPos(Vec2f(v.x, v.y));
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scriptManager.init(&world, &gameCamera);
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good_fpu_control_registers(NULL,__FILE__,__FUNCTION__,__LINE__);
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SystemFlags::OutputDebug(SystemFlags::debugSystem,"In [%s::%s] creating AI's\n",__FILE__,__FUNCTION__);
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//create IAs
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@ -280,6 +286,8 @@ void Game::init()
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logger.add("Initializing renderer", true);
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renderer.initGame(this);
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good_fpu_control_registers(NULL,__FILE__,__FUNCTION__,__LINE__);
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//sounds
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SoundRenderer &soundRenderer= SoundRenderer::getInstance();
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@ -356,6 +364,8 @@ void Game::update(){
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weatherParticleSystem->setPos(gameCamera.getPos());
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}
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renderer.updateParticleManager(rsGame);
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good_fpu_control_registers(NULL,__FILE__,__FUNCTION__,__LINE__);
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}
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//call the chat manager
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119
source/shared_lib/include/streflop/FPUCheck.h
Normal file
119
source/shared_lib/include/streflop/FPUCheck.h
Normal file
@ -0,0 +1,119 @@
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/**
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* @file FPUCheck.h
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* @brief good_fpu_control_registers function
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* @author Tobi Vollebregt
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*
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* Assertions on floating point unit control registers.
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* For now it only defines the good_fpu_control_registers() function.
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*
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* Copyright (C) 2006. Licensed under the terms of the
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* GNU GPL, v2 or later
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*/
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#ifndef FPUCHECK_H
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#define FPUCHECK_H
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//#include "LogOutput.h"
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#include "util.h"
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#include "streflop_cond.h"
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/**
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@brief checks FPU control registers.
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@return true if everything is fine, false otherwise
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Can be used in an assert() to check the FPU control registers MXCSR and FPUCW,
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e.g. `assert(good_fpu_control_registers());'
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For reference, the layout of the MXCSR register:
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FZ:RC:RC:PM:UM:OM:ZM:DM:IM:Rsvd:PE:UE:OE:ZE:DE:IE
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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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Spring1: 0 0 0 1 1 1 0 1 0 0 0 0 0 0 0 0 = 0x1D00 = 7424
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Spring2: 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 = 0x1F80 = 8064
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Default: 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 = 0x1F80 = 8064
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MaskRsvd:1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 = 0xFF80
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And the layout of the 387 FPU control word register:
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Rsvd:Rsvd:Rsvd:X:RC:RC:PC:PC:Rsvd:Rsvd:PM:UM:OM:ZM:DM:IM
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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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Spring1: 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 = 0x003A = 58
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Spring2: 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 = 0x003F = 63
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Default: 0 0 0 0 0 0 1 1 0 0 1 1 1 1 1 1 = 0x033F = 831
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MaskRsvd: 0 0 0 1 1 1 1 1 0 0 1 1 1 1 1 1 = 0x1F3F
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Where:
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Rsvd - Reserved
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FZ - Flush to Zero
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RC - Rounding Control
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PM - Precision Mask
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UM - Underflow Mask
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OM - Overflow Mask
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ZM - Zerodivide Mask
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DM - Denormal Mask
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IM - Invalid Mask
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PE - Precision Exception
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UE - Underflow Exception
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OE - Overflow Exception
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ZE - Zerodivide Exception
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DE - Denormal Exception
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IE - Invalid Exception
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X - Infinity control (unused on 387 and higher)
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PC - Precision Control
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Spring1 - Control word used by spring in code in CGame::SimFrame().
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Spring2 - Control word used by spring in code everywhere else.
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Default - Default control word according to Intel.
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MaskRsvd - Masks out the reserved bits.
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Source: Intel Architecture Software Development Manual, Volume 1, Basic Architecture
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*/
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static inline void good_fpu_control_registers(const char* text, const char *file=NULL, const char *classname=NULL, const int line=-1)
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{
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const char *outText = text;
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char szBuf[256]="";
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if(outText == NULL) {
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sprintf(szBuf,"In [%s::%s Line: %d]",file=NULL, classname, line);
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outText = &szBuf[0];
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}
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// We are paranoid.
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// We don't trust the enumeration constants from streflop / (g)libc.
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#if defined(STREFLOP_SSE)
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fenv_t fenv;
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fegetenv(&fenv);
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#if defined(__SUPPORT_SNAN__) && !defined(USE_GML) // -fsignaling-nans
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bool ret = ((fenv.sse_mode & 0xFF80) == (0x1937 & 0xFF80) || (fenv.sse_mode & 0xFF80) == (0x1925 & 0xFF80)) &&
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((fenv.x87_mode & 0x1F3F) == (0x0072 & 0x1F3F) || (fenv.x87_mode & 0x1F3F) == 0x003F);
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#else
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bool ret = ((fenv.sse_mode & 0xFF80) == 0x1D00 || (fenv.sse_mode & 0xFF80) == 0x1F80) &&
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((fenv.x87_mode & 0x1F3F) == 0x003A || (fenv.x87_mode & 0x1F3F) == 0x003F);
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#endif
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if (!ret) {
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SystemFlags::OutputDebug(SystemFlags::debugSystem,"Sync warning: MXCSR 0x%04X instead of 0x1D00 or 0x1F80 (\"%s\")", fenv.sse_mode, outText);
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SystemFlags::OutputDebug(SystemFlags::debugSystem,"Sync warning: FPUCW 0x%04X instead of 0x003A or 0x003F (\"%s\")", fenv.x87_mode, outText);
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// Set single precision floating point math.
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streflop_init<streflop::Simple>();
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#if defined(__SUPPORT_SNAN__) && !defined(USE_GML)
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feraiseexcept(streflop::FPU_Exceptions(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW));
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#endif
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}
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#elif defined(STREFLOP_X87)
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fenv_t fenv;
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fegetenv(&fenv);
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#if defined(__SUPPORT_SNAN__) && !defined(USE_GML)
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bool ret = (fenv & 0x1F3F) == 0x0072 || (fenv & 0x1F3F) == 0x003F;
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#else
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bool ret = (fenv & 0x1F3F) == 0x003A || (fenv & 0x1F3F) == 0x003F;
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#endif
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if (!ret) {
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SystemFlags::OutputDebug(SystemFlags::debugSystem,"Sync warning: FPUCW 0x%04X instead of 0x003A or 0x003F (\"%s\")", fenv, outText);
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// Set single precision floating point math.
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streflop_init<streflop::Simple>();
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#if defined(__SUPPORT_SNAN__) && !defined(USE_GML)
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feraiseexcept(streflop::FPU_Exceptions(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW));
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#endif
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}
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#endif
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}
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#endif // !FPUCHECK_H
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