Update to bsnes v041 release.

I apologize for posting a new version so quickly. This is mostly a maintenance release: joypad analog axes can once again be mapped to the mouse / super scope axis controls, the input capture window has been rewritten to be much more compact, and I've omitted all unneeded features of Qt 4.5 to reduce the final binary size as much as possible (from ~3.33MB to ~2.3MB.) The source archive is also ~20% smaller.
Barring any unforseen problems, this will likely be the last official release for a while.
Also, I finally have dedicated hosting for byuu.org. I ask that you please update any bookmarks to point here, rather than to byuu.cinnamonpirate.com from this point on, as we'd like to free up the cinnamonpirate sub-domain slot.

license.txt

@@ -1,86 +0,0 @@
-bsnes (TM) Open Source Reference License
-Copyright (C) 2004 - 2007 byuu
-All rights reserved
-
-1. Definitions
-
-The terms "reproduce", "reproduction", "distribute" and "distribution" have the
-same meaning here as under U.S. copyright law.
-
-"The software" means this software package as a whole, including, but not
-limited to, this license, binaries, source code, documentation, and data.
-
-"You" means the licensee of the software.
-
-"The licensor" means the copyright holder of the software, byuu.
-
-2. Grant of Rights
-
-Subject to the terms of this license, the licensor grants you a
-non-transferable, non-exclusive, worldwide, royalty-free copyright license to
-reproduce the software for non-commercial use only, provided the software
-remains unmodified, and there is no charge for the software itself, its' use,
-nor for the medium upon which the software is distributed. The reproduction of
-modified or derivative works of the software is strictly prohibited, except when
-transmitted solely to the licensor.
-
-3. Limitations
-
-This license does not grant you any rights to use the licensor's name, logo or
-trademarks.
-
-The software is provided "as is", and any express or implied warranties,
-including, but not limited to, the implied warranties of merchantability and
-fitness for a particular purpose are disclaimed. In no event shall the licensor
-be liable for any direct, indirect, incidental, special, exemplary, or
-consequential damages (including, but not limited to, procurement of substitute
-goods or services; loss of use, data, or profits; or business interruption)
-however caused and on any theory of liability, whether in contract, strict
-liability, or tort (including negligence or otherwise) arising in any way out of
-the use of the software, even if advised of the possibility of such damage.
-
-In the event that this license is determined to be invalid or unenforceable, the
-Grant of Rights will become null and void, and no rights shall be granted to the
-licensee, within the scope of U.S. copyright law.
-
-4. Exemptions
-
-The software includes the work of other copyright holders, which is licensed
-under different agreements, and exempt from this license. Below is a complete
-list of all such software, and their respective copyright holders and licenses.
-Further, respective source code files are labeled with their correct licensing
-information in the header. The lack of such a header indicates said file falls
-under the bsnes license.
-
-HQ2x filter, author: MaxST, license: LGPL
-JMA decompressor, author: NSRT Team, license: GPL (*)
-NTSC filter, author: blargg, license: LGPL
-zlib decompressor, license: zlib license
-
-(*) bsnes has received an exemption from the copyright holder to use this work.
-
-The software also includes works which have been released to the public domain,
-which are not bound to any licensing agreements. Below is a complete list of all
-such software.
-
-libco, author: byuu
-libui, author: byuu
-OBC-1 emu, author: byuu
-S-DD1 emu, author: Andreas Naive
-S-RTC emu, author: byuu
-
-Any software listed above as exemptions may be relicensed individually from
-bsnes under their respective terms. However, no bsnes licensed portions can be
-combined with such a derivative work.
-
-The software also includes the work of other copyright holders, which is
-licensed under the terms of the bsnes license, with permission to do so from the
-respective authors. Below is a complete list of all such software.
-
-Cx4 emu, authors: anomie, Overload, zsKnight, Nach
-DSP-1 emu, authors: Overload, John Weidman, Neviksti, Andreas Naive
-DSP-2 emu, author: Overload
-DSP-3 emu, authors: John Weidman, Kris Bleakley, Lancer, z80 gaiden
-DSP-4 emu, authors: Dreamer Nom, John Weidman, Kris Bleakley, Nach, z80 gaiden
-S-DSP emu, author: blargg
-ST-010 emu, authors: John Weidman, Matthew Kendora, Overload, Feather

readme.txt

@@ -1,91 +0,0 @@
-bsnes
-Version 0.025
-Author: byuu
-
---------
-General:
---------
-bsnes is a Super Nintendo / Super Famicom emulator that began on
-October 14th, 2004.
-
-The latest version can be downloaded from:
-http://byuu.org/
-
-Please see license.txt for important licensing information.
-
---------------
-Shortcut Keys:
---------------
-Esc - Toggle menubar visibility
-F11 - Toggle fullscreen mode
-
-------------------
-Known Limitations:
-------------------
-S-CPU
-- Invalid DMA / HDMA transfers not fully emulated
-- Multiply / Divide register delays not implemented
-
-S-PPU
-- Uses scanline-based renderer. This is very inaccurate, but few (if any)
-  games rely on mid-scanline writes to function correctly
-- Does not support FirstSprite+Y priority
-- OAM / CGRAM accesses during active display not supported correctly
-- RTO flags are not calculated on frames that are skipped when frameskipping
-  is enabled. This provides a major speedup, however it will cause in issues
-  in games that test these flags, eg the SNES Test Program Electronics Test.
-  Turning frameskipping off will allow RTO flag calculation on every frame
-
-Hardware Bugs
-- S-CPU.r1 HDMA crashing bug not emulated
-- S-CPU<>S-SMP communication bus conflicts not emulated
-
----------------------
-Unsupported Hardware:
----------------------
-SA-1
-Coprocessor used in many popular games, including:
-- Dragon Ball Z Hyper Dimension
-- Kirby Super Star
-- Kirby's Dreamland 3
-- Marvelous
-- SD Gundam G-NEXT
-- Super Mario RPG
-
-Super FX
-Coprocessor used in many popular games, including:
-- Doom
-- Star Fox
-- Star Fox 2 (unreleased beta)
-- Super Mario World 2: Yoshi's Island
-
-SPC7110
-Coprocessor used only by the following games:
-- Far East of Eden Zero
-- Far East of Eden Zero: Shounen Jump no Shou
-- Momotarou Densetsu Happy
-- Super Power League 4
-
-ST-011
-SETA DSP used only by Quick-move Shogi Match with Nidan Rank-holder Morita
-
-ST-018
-SETA RISC CPU used only by Quick-move Shogi Match with Nidan Rank-holder Morita 2
-
-BS-X (Broadcast Satellite)
-Add-on unit sold only in Japan that played specially-made games that were
-downloaded via satellite
-
-BS-X Flashcart
-Flash cartridge used by BS-X, as well as some standalone games by Asciisoft
-
-Super Gameboy
-Cartridge passthrough used for playing Gameboy games
-
-------------------------
-Unsupported Controllers:
-------------------------
-Mouse
-Super Scope
-Justifier
-Multitap (4-port and 5-port)

src/Makefile

@@ -1,315 +1,272 @@
-######################
-### bsnes makefile ###
-######################
-
-ifeq ($(PLATFORM),)
-_null_: help
-endif
-
-##################################
-### platform-specific settings ###
-##################################
-
-ifeq ($(PLATFORM),x-gcc-lui)
-OS = unix
-CC = gcc
-CFLAGS = -O3 -fomit-frame-pointer -DPLATFORM_X -DCOMPILER_GCC -DPROCESSOR_X86 -DUI_LUI `pkg-config --cflags gtk+-2.0`
-AS = nasm
-ASFLAGS = -f elf
-LIBS = `pkg-config --libs gtk+-2.0` -lXv -lao
-LIBCO = libco_x86
-LIBUI = libui_gtk
-endif
-
-ifeq ($(PLATFORM),x-gcc-lui-x64)
-OS = unix
-CC = gcc
-CFLAGS = -O3 -fomit-frame-pointer -DPLATFORM_X -DCOMPILER_GCC -DPROCESSOR_X86_64 -DUI_LUI `pkg-config --cflags gtk+-2.0`
-AS = yasm
-ASFLAGS = -f elf64
-LIBS = `pkg-config --libs gtk+-2.0` -lXv -lao
-LIBCO = libco_x86_64
-LIBUI = libui_gtk
-endif
-
-ifeq ($(PLATFORM),win-visualc-lui)
-OS = win
-CC = cl
-CFLAGS = /nologo /wd4996 /O2 /EHsc /DPLATFORM_WIN /DCOMPILER_VISUALC /DPROCESSOR_X86 /DUI_LUI
-AS = nasm
-ASFLAGS = -f win32 -DWIN32
-LIBS = d3d9.lib ddraw.lib dsound.lib dinput8.lib dxguid.lib kernel32.lib user32.lib gdi32.lib shell32.lib winmm.lib comdlg32.lib comctl32.lib
-LIBCO = libco_x86
-LIBUI = libui_win
-endif
-
-ifeq ($(PLATFORM),win-visualc-lui-pgi)
-OS = win
-CC = cl
-CFLAGS = /nologo /wd4996 /O2 /GL /EHsc /DPLATFORM_WIN /DCOMPILER_VISUALC /DPROCESSOR_X86 /DUI_LUI
-AS = nasm
-ASFLAGS = -f win32 -DWIN32
-LIBS = d3d9.lib ddraw.lib dsound.lib dinput8.lib dxguid.lib kernel32.lib user32.lib gdi32.lib shell32.lib winmm.lib comdlg32.lib comctl32.lib
-LINK = /link /PGD:bsnes.pgd /LTCG:PGINSTRUMENT
-LIBCO = libco_x86
-LIBUI = libui_win
-endif
-
-ifeq ($(PLATFORM),win-visualc-lui-pgo)
-OS = win
-CC = cl
-CFLAGS = /nologo /wd4996 /O2 /GL /EHsc /DPLATFORM_WIN /DCOMPILER_VISUALC /DPROCESSOR_X86 /DUI_LUI
-AS = nasm
-ASFLAGS = -f win32 -DWIN32
-LIBS = d3d9.lib ddraw.lib dsound.lib dinput8.lib dxguid.lib kernel32.lib user32.lib gdi32.lib shell32.lib winmm.lib comdlg32.lib comctl32.lib
-LINK = /link /PGD:bsnes.pgd /LTCG:PGOPTIMIZE
-LIBCO = libco_x86
-LIBUI = libui_win
-endif
-
-ifeq ($(PLATFORM),win-mingw-lui)
-OS = win
-CC = mingw32-gcc
-CFLAGS = -mwindows -O3 -fomit-frame-pointer -DPLATFORM_WIN -DCOMPILER_GCC -DPROCESSOR_X86 -DUI_LUI
-AS = nasm
-ASFLAGS = -f win32 -DWIN32
-LIBS = -ld3d9 -lddraw -ldsound -ldinput8 -ldxguid -luuid -lkernel32 -luser32 -lgdi32 -lshell32 -lwinmm -lcomdlg32 -lcomctl32
-LIBCO = libco_x86
-LIBUI = libui_win
-endif
-
-ifeq ($(PLATFORM),win-mingw4-lui)
-OS = win
-CC = mingw32-gcc-sjlj
-CFLAGS = -mconsole -O3 -fomit-frame-pointer -DPLATFORM_WIN -DCOMPILER_GCC -DPROCESSOR_X86 -DUI_LUI
-AS = nasm
-ASFLAGS = -f win32 -DWIN32
-LIBS = -ld3d9 -lddraw -ldsound -ldinput8 -ldxguid -luuid -lkernel32 -luser32 -lgdi32 -lshell32 -lwinmm -lcomdlg32 -lcomctl32
-LIBCO = libco_x86
-LIBUI = libui_win
-endif
-
-#####################################
-### compiler / assembler switches ###
-#####################################
-
-ifeq ($(CC),gcc)
-OUT = -obsnes
-CPP = g++
-OBJ = o
-CARGS = -c $< -o $@
-DEFINE = -D
-endif
-
-ifeq ($(CC),mingw32-gcc)
-OUT = -obsnes
-CPP = mingw32-g++
-OBJ = o
-CARGS = -c $< -o $@
-DEFINE = -D
-endif
-
-ifeq ($(CC),mingw32-gcc-sjlj)
-OUT = -obsnes
-CPP = mingw32-g++-sjlj
-OBJ = o
-CARGS = -c $< -o $@
-DEFINE = -D
-endif
-
-ifeq ($(CC),cl)
-OUT = /Febsnes
-CPP = cl
-OBJ = obj
-CARGS = /c $< /Fo$@
-DEFINE = /D
-endif
-
-ifeq ($(AS),nasm)
-ASARGS = $< -o $@
-endif
-
-ifeq ($(AS),yasm)
-ASARGS = $< -o $@
-endif
-
-###################
-### OS switches ###
-###################
-
-ifeq ($(OS),unix)
-RM = rm -f
-endif
-
-ifeq ($(OS),win)
-OUT := $(OUT).exe
-RM = del
-endif
-
-####################################
-### main target and dependencies ###
-####################################
-
-OBJECTS = main.$(OBJ) $(LIBCO).$(OBJ) $(LIBUI).$(OBJ) \
-  libstring.$(OBJ) \
-  reader.$(OBJ) cart.$(OBJ) cheat.$(OBJ) memory.$(OBJ) bmemory.$(OBJ) \
-  cpu.$(OBJ) scpu.$(OBJ) smp.$(OBJ) ssmp.$(OBJ) bdsp.$(OBJ) ppu.$(OBJ) \
-  bppu.$(OBJ) snes.$(OBJ) superfx.$(OBJ) srtc.$(OBJ) sdd1.$(OBJ) c4.$(OBJ) \
-  dsp1.$(OBJ) dsp2.$(OBJ) dsp3.$(OBJ) dsp4.$(OBJ) obc1.$(OBJ) st010.$(OBJ)
-
-ifeq ($(GZIP_SUPPORT),true)
-  OBJECTS += adler32.$(OBJ) compress.$(OBJ) crc32.$(OBJ) deflate.$(OBJ) \
-    gzio.$(OBJ) inffast.$(OBJ) inflate.$(OBJ) inftrees.$(OBJ) ioapi.$(OBJ) \
-    trees.$(OBJ) unzip.$(OBJ) zip.$(OBJ) zutil.$(OBJ)
-  CFLAGS += $(DEFINE)GZIP_SUPPORT
-endif
-
-ifeq ($(JMA_SUPPORT),true)
-  OBJECTS += jma.$(OBJ) jcrc32.$(OBJ) lzmadec.$(OBJ) 7zlzma.$(OBJ) \
-    iiostrm.$(OBJ) inbyte.$(OBJ) lzma.$(OBJ) winout.$(OBJ)
-  CFLAGS += $(DEFINE)JMA_SUPPORT
-endif
-
-ifeq ($(OS),win)
-  ifeq ($(CC),cl)
-    OBJECTS += bsnes.res
-  endif
-endif
-
-all: $(OBJECTS)
-	$(CPP) $(OUT) $(CFLAGS) $(OBJECTS) $(LIBS) $(LINK)
-#	mt -nologo -manifest bsnes.exe.manifest -outputresource:bsnes.exe;1
-
-######################
-### implicit rules ###
-######################
-
-%.$(OBJ): $<
-	$(if $(filter %.asm,$<),$(AS) $(ASFLAGS) $(ASARGS))
-	$(if $(filter %.c,$<),$(CC) $(CFLAGS) $(CARGS))
-	$(if $(filter %.cpp,$<),$(CPP) $(CFLAGS) $(CARGS))
-
-#########################
-### platform-specific ###
-#########################
-main.$(OBJ): ui/main.cpp config/* ui/* ui/video/* ui/audio/* ui/input/* \
-ui/lui/* ui/lui/settings/* \
-ui/win/* ui/win/settings/* ui/win/debugger/*
-bsnes.res  : ui/bsnes.rc ; rc /r /fobsnes.res ui/bsnes.rc
-
-#############
-### libco ###
-#############
-libco_x86.$(OBJ)   : lib/libco_x86.asm lib/*
-libco_x86_64.$(OBJ): lib/libco_x86_64.asm lib/*
-
-#############
-### libui ###
-#############
-libui_gtk.$(OBJ): lib/libui_gtk.cpp lib/*
-libui_win.$(OBJ): lib/libui_win.cpp lib/*
-
-#################
-### libraries ###
-#################
-libstring.$(OBJ): lib/libstring.cpp lib/*
-
-#################
-### utilities ###
-#################
-reader.$(OBJ): reader/reader.cpp reader/*
-cart.$(OBJ)  : cart/cart.cpp cart/*
-cheat.$(OBJ) : cheat/cheat.cpp cheat/*
-
-##############
-### memory ###
-##############
-memory.$(OBJ) : memory/memory.cpp memory/*
-bmemory.$(OBJ): memory/bmemory/bmemory.cpp memory/bmemory/* memory/bmemory/mapper/*
-
-###########
-### cpu ###
-###########
-cpu.$(OBJ) : cpu/cpu.cpp cpu/*
-scpu.$(OBJ): cpu/scpu/scpu.cpp cpu/scpu/* cpu/scpu/core/* cpu/scpu/dma/* cpu/scpu/memory/* cpu/scpu/mmio/* cpu/scpu/timing/*
-
-###########
-### smp ###
-###########
-smp.$(OBJ) : smp/smp.cpp smp/*
-ssmp.$(OBJ): smp/ssmp/ssmp.cpp smp/ssmp/* smp/ssmp/core/* smp/ssmp/memory/* smp/ssmp/timing/*
-
-###########
-### dsp ###
-###########
-adsp.$(OBJ): dsp/adsp/adsp.cpp dsp/adsp/*
-bdsp.$(OBJ): dsp/bdsp/bdsp.cpp dsp/bdsp/*
-
-###########
-### ppu ###
-###########
-ppu.$(OBJ) : ppu/ppu.cpp ppu/*
-bppu.$(OBJ): ppu/bppu/bppu.cpp ppu/bppu/*
-
-############
-### snes ###
-############
-snes.$(OBJ): snes/snes.cpp snes/* snes/scheduler/* snes/video/* snes/audio/* snes/input/*
-
-#####################
-### special chips ###
-#####################
-superfx.$(OBJ): chip/superfx/superfx.cpp chip/superfx/* chip/superfx/core/* chip/superfx/memory/*
-srtc.$(OBJ)   : chip/srtc/srtc.cpp chip/srtc/*
-sdd1.$(OBJ)   : chip/sdd1/sdd1.cpp chip/sdd1/*
-c4.$(OBJ)     : chip/c4/c4.cpp chip/c4/*
-dsp1.$(OBJ)   : chip/dsp1/dsp1.cpp chip/dsp1/*
-dsp2.$(OBJ)   : chip/dsp2/dsp2.cpp chip/dsp2/*
-dsp3.$(OBJ)   : chip/dsp3/dsp3.cpp chip/dsp3/*
-dsp4.$(OBJ)   : chip/dsp4/dsp4.cpp chip/dsp4/*
-obc1.$(OBJ)   : chip/obc1/obc1.cpp chip/obc1/*
-st010.$(OBJ)  : chip/st010/st010.cpp chip/st010/*
-
-############
-### zlib ###
-############
-adler32.$(OBJ) : reader/zlib/adler32.c reader/zlib/*
-compress.$(OBJ): reader/zlib/compress.c reader/zlib/*
-crc32.$(OBJ)   : reader/zlib/crc32.c reader/zlib/*
-deflate.$(OBJ) : reader/zlib/deflate.c reader/zlib/*
-gzio.$(OBJ)    : reader/zlib/gzio.c reader/zlib/*
-inffast.$(OBJ) : reader/zlib/inffast.c reader/zlib/*
-inflate.$(OBJ) : reader/zlib/inflate.c reader/zlib/*
-inftrees.$(OBJ): reader/zlib/inftrees.c reader/zlib/*
-ioapi.$(OBJ)   : reader/zlib/ioapi.c reader/zlib/*
-trees.$(OBJ)   : reader/zlib/trees.c reader/zlib/*
-unzip.$(OBJ)   : reader/zlib/unzip.c reader/zlib/*
-zip.$(OBJ)     : reader/zlib/zip.c reader/zlib/*
-zutil.$(OBJ)   : reader/zlib/zutil.c reader/zlib/*
-
-###########
-### jma ###
-###########
-jma.$(OBJ)    : reader/jma/jma.cpp reader/jma/*
-jcrc32.$(OBJ) : reader/jma/jcrc32.cpp reader/jma/*
-lzmadec.$(OBJ): reader/jma/lzmadec.cpp reader/jma/*
-7zlzma.$(OBJ) : reader/jma/7zlzma.cpp reader/jma/*
-iiostrm.$(OBJ): reader/jma/iiostrm.cpp reader/jma/*
-inbyte.$(OBJ) : reader/jma/inbyte.cpp reader/jma/*
-lzma.$(OBJ)   : reader/jma/lzma.cpp reader/jma/*
-winout.$(OBJ) : reader/jma/winout.cpp reader/jma/*
-
-####################
-### misc targets ###
-####################
-clean:
-	-@$(RM) *.$(OBJ)
-	-@$(RM) *.res
-	-@$(RM) *.pgd
-	-@$(RM) *.pgc
-	-@$(RM) *.ilk
-	-@$(RM) *.pdb
-	-@$(RM) *.manifest
-
-help:
-	@echo Please specify which platform to compile for with PLATFORM=platform_name
+include lib/nall/Makefile.string
+prefix = /usr/local
+ui = ui_qt
+
+################
+### compiler ###
+################
+
+ifneq ($(findstring gcc,$(compiler)),) # GCC family
+  flags = -O3 -fomit-frame-pointer -Ilib
+  # note: libco *requires* -fomit-frame-pointer on i386 arch
+  libcoflags := $(flags) -static
+  c = $(compiler)
+  cpp = $(subst cc,++,$(compiler))
+  obj = o
+  rule = -c $< -o $@
+  link = -s
+  mkbin = -o$1
+  mkdef = -D$1
+  mkinc = -I$1
+  mklib = -l$1
+
+  # profile-guided optimization:
+  # flags += -fprofile-generate
+  # link += -lgcov
+  # flags += -fprofile-use
+else ifeq ($(compiler),cl) # Visual C++
+  flags = /nologo /wd4355 /wd4805 /wd4996 /Ox /GL /EHsc /Ilib
+  libcoflags = $(flags)
+  c = cl
+  cpp = cl
+  obj = obj
+  rule = /c $< /Fo$@
+  link = /link
+  mkbin = /Fe$1
+  mkdef = /D$1
+  mkinc = /I$1
+  mklib = $1.lib
+else
+  unknown_compiler: help;
+endif
+
+##########
+### os ###
+##########
+
+ifeq ($(platform),x) # X11
+  ruby = video.glx video.xv video.sdl audio.alsa audio.openal audio.oss audio.pulseaudio audio.ao input.sdl input.x
+  delete = rm -f $1
+else ifeq ($(platform),win) # Windows
+  # enable static linking to Qt for Windows build
+  mingw_link_flags = -mwindows -enable-stdcall-fixup -Wl,-s -Wl,-enable-auto-import -Wl,-enable-runtime-pseudo-reloc
+
+  ruby = video.direct3d video.wgl video.directdraw video.gdi audio.directsound input.directinput
+  delete = $(if $(findstring i586-mingw-gcc,$(compiler)),rm -f $1,del $(subst /,\,$1))
+  link += $(if $(findstring mingw,$(compiler)),$(mingw_link_flags))
+  link += $(call mklib,uuid)
+  link += $(call mklib,kernel32)
+  link += $(call mklib,user32)
+  link += $(call mklib,gdi32)
+  link += $(call mklib,shell32)
+else
+  unknown_platform: help;
+endif
+
+############
+### ruby ###
+############
+
+rubyflags = $(if $(findstring .sdl,$(ruby)),`sdl-config --cflags`)
+
+link += $(if $(findstring video.direct3d,$(ruby)),$(call mklib,d3d9))
+link += $(if $(findstring video.directdraw,$(ruby)),$(call mklib,ddraw))
+link += $(if $(findstring video.glx,$(ruby)),$(call mklib,GL))
+link += $(if $(findstring video.wgl,$(ruby)),$(call mklib,opengl32))
+link += $(if $(findstring video.xv,$(ruby)),$(call mklib,Xv))
+link += $(if $(findstring audio.alsa,$(ruby)),$(call mklib,asound))
+link += $(if $(findstring audio.ao,$(ruby)),$(call mklib,ao))
+link += $(if $(findstring audio.directsound,$(ruby)),$(call mklib,dsound))
+link += $(if $(findstring audio.openal,$(ruby)),$(if $(call streq,$(platform),x),$(call mklib,openal),$(call mklib,openal32)))
+link += $(if $(findstring audio.pulseaudio,$(ruby)),$(call mklib,pulse-simple))
+link += $(if $(findstring input.directinput,$(ruby)),$(call mklib,dinput8) $(call mklib,dxguid))
+link += $(if $(findstring input.sdl,$(ruby)),`sdl-config --libs`)
+
+####################
+### core objects ###
+####################
+
+objects = libco ruby libfilter string \
+  reader cart cheat \
+  memory smemory cpu scpu smp ssmp sdsp ppu bppu snes \
+  bsx srtc sdd1 spc7110 cx4 dsp1 dsp2 dsp3 dsp4 obc1 st010
+
+ifeq ($(enable_gzip),true)
+  objects += adler32 compress crc32 deflate gzio inffast inflate inftrees ioapi trees unzip zip zutil
+  flags += $(call mkdef,GZIP_SUPPORT)
+endif
+
+ifeq ($(enable_jma),true)
+  objects += jma jcrc32 lzmadec 7zlzma iiostrm inbyte lzma winout
+  flags += $(call mkdef,JMA_SUPPORT)
+endif
+
+######################
+### implicit rules ###
+######################
+
+compile = \
+  $(strip \
+    $(if $(filter %.c,$<), \
+      $(c) $(flags) $1 $(rule), \
+      $(if $(filter %.cpp,$<), \
+        $(cpp) $(flags) $1 $(rule) \
+      ) \
+    ) \
+  )
+
+%.$(obj): $<;	$(call compile)
+
+all: build;
+
+include $(ui)/Makefile
+objects := $(patsubst %,obj/%.$(obj),$(objects))
+rubydef := $(foreach c,$(subst .,_,$(call strupper,$(ruby))),$(call mkdef,$c))
+
+#################
+### libraries ###
+#################
+
+obj/ruby.$(obj): lib/ruby/ruby.cpp lib/ruby/* lib/ruby/video/* lib/ruby/audio/* lib/ruby/input/*
+	$(call compile,$(rubydef) $(rubyflags))
+obj/libco.$(obj): lib/libco/libco.c lib/libco/*
+	$(c) $(libcoflags) $(rule)
+obj/libfilter.$(obj): lib/libfilter/libfilter.cpp lib/libfilter/*
+obj/string.$(obj): lib/nall/string.cpp lib/nall/*
+
+#################
+### utilities ###
+#################
+
+obj/reader.$(obj): reader/reader.cpp reader/*
+obj/cart.$(obj)  : cart/cart.cpp cart/*
+obj/cheat.$(obj) : cheat/cheat.cpp cheat/*
+
+##############
+### memory ###
+##############
+
+obj/memory.$(obj) : memory/memory.cpp memory/*
+obj/smemory.$(obj): memory/smemory/smemory.cpp memory/smemory/* memory/smemory/mapper/*
+
+###########
+### cpu ###
+###########
+
+obj/cpu.$(obj) : cpu/cpu.cpp cpu/*
+obj/scpu.$(obj): cpu/scpu/scpu.cpp cpu/scpu/* cpu/scpu/core/* cpu/scpu/dma/* cpu/scpu/memory/* cpu/scpu/mmio/* cpu/scpu/timing/*
+
+###########
+### smp ###
+###########
+
+obj/smp.$(obj) : smp/smp.cpp smp/*
+obj/ssmp.$(obj): smp/ssmp/ssmp.cpp smp/ssmp/* smp/ssmp/core/* smp/ssmp/memory/* smp/ssmp/timing/*
+
+###########
+### dsp ###
+###########
+
+obj/adsp.$(obj): dsp/adsp/adsp.cpp dsp/adsp/*
+obj/sdsp.$(obj): dsp/sdsp/sdsp.cpp dsp/sdsp/*
+
+###########
+### ppu ###
+###########
+
+obj/ppu.$(obj) : ppu/ppu.cpp ppu/*
+obj/bppu.$(obj): ppu/bppu/bppu.cpp ppu/bppu/*
+
+############
+### snes ###
+############
+
+obj/snes.$(obj): snes/snes.cpp snes/* snes/scheduler/* snes/video/* snes/audio/* snes/input/*
+
+#####################
+### special chips ###
+#####################
+
+obj/bsx.$(obj)    : chip/bsx/bsx.cpp chip/bsx/*
+obj/srtc.$(obj)   : chip/srtc/srtc.cpp chip/srtc/*
+obj/sdd1.$(obj)   : chip/sdd1/sdd1.cpp chip/sdd1/*
+obj/spc7110.$(obj): chip/spc7110/spc7110.cpp chip/spc7110/*
+obj/cx4.$(obj)    : chip/cx4/cx4.cpp chip/cx4/*
+obj/dsp1.$(obj)   : chip/dsp1/dsp1.cpp chip/dsp1/*
+obj/dsp2.$(obj)   : chip/dsp2/dsp2.cpp chip/dsp2/*
+obj/dsp3.$(obj)   : chip/dsp3/dsp3.cpp chip/dsp3/*
+obj/dsp4.$(obj)   : chip/dsp4/dsp4.cpp chip/dsp4/*
+obj/obc1.$(obj)   : chip/obc1/obc1.cpp chip/obc1/*
+obj/st010.$(obj)  : chip/st010/st010.cpp chip/st010/*
+
+############
+### zlib ###
+############
+
+obj/adler32.$(obj) : reader/zlib/adler32.c reader/zlib/*
+obj/compress.$(obj): reader/zlib/compress.c reader/zlib/*
+obj/crc32.$(obj)   : reader/zlib/crc32.c reader/zlib/*
+obj/deflate.$(obj) : reader/zlib/deflate.c reader/zlib/*
+obj/gzio.$(obj)    : reader/zlib/gzio.c reader/zlib/*
+obj/inffast.$(obj) : reader/zlib/inffast.c reader/zlib/*
+obj/inflate.$(obj) : reader/zlib/inflate.c reader/zlib/*
+obj/inftrees.$(obj): reader/zlib/inftrees.c reader/zlib/*
+obj/ioapi.$(obj)   : reader/zlib/ioapi.c reader/zlib/*
+obj/trees.$(obj)   : reader/zlib/trees.c reader/zlib/*
+obj/unzip.$(obj)   : reader/zlib/unzip.c reader/zlib/*
+obj/zip.$(obj)     : reader/zlib/zip.c reader/zlib/*
+obj/zutil.$(obj)   : reader/zlib/zutil.c reader/zlib/*
+
+###########
+### jma ###
+###########
+
+obj/jma.$(obj)    : reader/jma/jma.cpp reader/jma/*
+obj/jcrc32.$(obj) : reader/jma/jcrc32.cpp reader/jma/*
+obj/lzmadec.$(obj): reader/jma/lzmadec.cpp reader/jma/*
+obj/7zlzma.$(obj) : reader/jma/7zlzma.cpp reader/jma/*
+obj/iiostrm.$(obj): reader/jma/iiostrm.cpp reader/jma/*
+obj/inbyte.$(obj) : reader/jma/inbyte.cpp reader/jma/*
+obj/lzma.$(obj)   : reader/jma/lzma.cpp reader/jma/*
+obj/winout.$(obj) : reader/jma/winout.cpp reader/jma/*
+
+###############
+### targets ###
+###############
+
+build: ui_build $(objects)
+	$(strip $(cpp) $(call mkbin,../bsnes) $(objects) $(link))
+
+install:
+	install -D -m 755 ../bsnes $(DESTDIR)$(prefix)/bin/bsnes
+	install -D -m 644 data/bsnes.png $(DESTDIR)$(prefix)/share/pixmaps/bsnes.png
+	install -D -m 644 data/bsnes.desktop $(DESTDIR)$(prefix)/share/applications/bsnes.desktop
+
+clean: ui_clean
+	-@$(call delete,obj/*.$(obj))
+	-@$(call delete,*.res)
+	-@$(call delete,*.pgd)
+	-@$(call delete,*.pgc)
+	-@$(call delete,*.ilk)
+	-@$(call delete,*.pdb)
+	-@$(call delete,*.manifest)
+
+help:
+	@echo "Usage: $(MAKE) platform=(os) compiler=(cc) [options]"
+	@echo ""
+	@echo "Supported platforms:"
+	@echo "  x   - Linux / BSD (x86, x86-64)"
+	@echo "  win - Windows (x86, x86-64)"
+	@echo ""
+	@echo "Supported compilers:"
+	@echo "  gcc              - GCC compiler"
+	@echo "  mingw32-gcc      - MinGW compiler"
+	@echo "  i586-mingw32-gcc - MinGW cross compiler"
+	@echo "  cl               - Visual C++"
+	@echo ""
+	@echo "Available options:"
+	@echo "  enable_gzip=[true|false] - Enable ZIP / GZ support (default=false)"
+	@echo "  enable_jma=[true|false]  - Enable JMA support (default=false)"
+	@echo ""
+	@echo "Example: $(MAKE) platform=x compiler=gcc enable_gzip=true"
+	@echo ""

src/base.h

@@ -1,59 +0,0 @@
-#define BSNES_VERSION "0.025"
-#define BSNES_TITLE   "bsnes v" BSNES_VERSION
-
-#define MEMCORE bMemBus
-#define CPUCORE sCPU
-#define SMPCORE sSMP
-#define DSPCORE bDSP
-#define PPUCORE bPPU
-
-//#define FAVOR_ACCURACY
-#define FAVOR_SPEED
-
-//game genie + pro action replay code support (~1-3% speed hit)
-#define CHEAT_SYSTEM
-
-//snes core polymorphism
-//(allow runtime cpu/smp/dsp/ppu/bus selection, ~10% speed hit)
-//#define POLYMORPHISM
-
-#include "lib/libbase.h"
-
-#if defined(PROCESSOR_X86)
-  #define ARCH_LSB
-  #include "lib/libco_x86.h"
-#elif defined(PROCESSOR_X86_64)
-  #define ARCH_LSB
-  #include "lib/libco_x86_64.h"
-#elif defined(PROCESSOR_G5)
-  #define ARCH_MSB
-#else
-  #error "unsupported processor"
-#endif
-
-#include "lib/libfunctor.h"
-#include "lib/libsort.h"
-#include "lib/libarray.h"
-#include "lib/libvector.h"
-#include "lib/libstring.h"
-#include "lib/libconfig.h"
-
-//platform-specific global functions
-void alert(const char*, ...);
-void dprintf(const char*, ...);
-void dprintf(uint, const char*, ...);
-
-namespace source {
-  enum {
-    none = 0,
-    debug,
-    cpu,
-    ppu,
-    smp,
-    dsp,
-    bus,
-  };
-};
-
-//various class interfaces
-#include "interface.h"

src/base.hpp

@@ -0,0 +1,49 @@
+#define BSNES_VERSION "0.041"
+#define BSNES_TITLE   "bsnes v" BSNES_VERSION
+
+#define BUSCORE sBus
+#define CPUCORE sCPU
+#define SMPCORE sSMP
+#define DSPCORE sDSP
+#define PPUCORE bPPU
+
+//S-DSP can be encapsulated into a state machine using #define magic
+//this avoids ~2.048m co_switch() calls per second (~5% speedup)
+#define USE_STATE_MACHINE
+
+//FAST_FRAMESKIP disables calculation of RTO during frameskip
+//frameskip offers near-zero speedup if RTO is calculated
+//accuracy is not affected by this define when frameskipping is off
+#define FAST_FRAMESKIP
+
+//game genie + pro action replay code support (~2% speed hit)
+#define CHEAT_SYSTEM
+
+#include <libco/libco.h>
+
+#include <nall/algorithm.hpp>
+#include <nall/array.hpp>
+#include <nall/bit.hpp>
+#include <nall/detect.hpp>
+#include <nall/endian.hpp>
+#include <nall/file.hpp>
+#include <nall/moduloarray.hpp>
+#include <nall/new.hpp>
+#include <nall/platform.hpp>
+#include <nall/property.hpp>
+#include <nall/stdint.hpp>
+#include <nall/string.hpp>
+#include <nall/utility.hpp>
+#include <nall/vector.hpp>
+using namespace nall;
+
+typedef int8_t   int8;
+typedef int16_t  int16;
+typedef int32_t  int32;
+typedef int64_t  int64;
+typedef uint8_t  uint8;
+typedef uint16_t uint16;
+typedef uint32_t uint32;
+typedef uint64_t uint64;
+
+#include "interface.hpp"

src/cart/cart.cpp

@@ -1,162 +1,234 @@
-#include "../base.h"
-#include "database.cpp"
+#include <../base.hpp>
+#include <../chip/chip.hpp>
+#include <../reader/reader.hpp>
+#define CART_CPP
 
-#include "cart_normal.cpp"
-#include "cart_st.cpp"
-#include "cart_stdual.cpp"
+#include <nall/crc32.hpp>
+#include <nall/ups.hpp>
 
+#include "cart.hpp"
 #include "cart_file.cpp"
 #include "cart_header.cpp"
+#include "cart_loader.cpp"
+
+namespace memory {
+  MappedRAM cartrom, cartram, cartrtc;
+  MappedRAM bscram;
+  MappedRAM stArom, stAram;
+  MappedRAM stBrom, stBram;
+};
 
 Cartridge cartridge;
 
-void Cartridge::load_begin(CartridgeType cart_type) {
-  if(loaded() == true)return;
+void Cartridge::load_begin(Mode cartridge_mode) {
+  cart.rom = cart.ram = cart.rtc = 0;
+  bs.ram   = 0;
+  stA.rom  = stA.ram  = 0;
+  stB.rom  = stB.ram  = 0;
 
-  info.type = cart_type;
+  cart.rom_size = cart.ram_size = cart.rtc_size = 0;
+  bs.ram_size   = 0;
+  stA.rom_size  = stA.ram_size  = 0;
+  stB.rom_size  = stB.ram_size  = 0;
 
-  info.superfx = false;
-  info.sa1     = false;
-  info.srtc    = false;
-  info.sdd1    = false;
-  info.c4      = false;
-  info.dsp1    = false;
-  info.dsp2    = false;
-  info.dsp3    = false;
-  info.dsp4    = false;
-  info.obc1    = false;
-  info.st010   = false;
-  info.st011   = false;
-  info.st018   = false;
-
-  info.dsp1_mapper = 0;
-
-  info.header_index = 0xffc0;
-  info.mapper = PCB;
-  strcpy(info.name, "");
-  strcpy(info.pcb,  "");
-  info.region = NTSC;
-
-  info.rom_size = 0;
-  info.ram_size = 0;
-
-  file.count = 0;
-  for(int i = 0; i < 8; i++) {
-    strcpy(file.rom_name[i], "");
-    strcpy(file.ram_name[i], "");
-    file.rom_size[i] = 0;
-    file.ram_size[i] = 0;
-    file.rom_data[i] = 0;
-    file.ram_data[i] = 0;
-  }
+  set(loaded,           false);
+  set(bsx_flash_loaded, false);
+  set(patched,          false);
+  set(mode,             cartridge_mode);
 }
 
-void Cartridge::load(const char *rom_fn) {
-  if(!rom_fn || !*rom_fn)return;
+void Cartridge::load_end() {
+  memory::cartrom.map(cart.rom, cart.rom_size);
+  memory::cartram.map(cart.ram, cart.ram_size);
+  memory::cartrtc.map(cart.rtc, cart.rtc_size);
+  memory::bscram.map(bs.ram, bs.ram_size);
+  memory::stArom.map(stA.rom, stA.rom_size);
+  memory::stAram.map(stA.ram, stA.ram_size);
+  memory::stBrom.map(stB.rom, stB.rom_size);
+  memory::stBram.map(stB.ram, stB.ram_size);
 
-char fn[4096], ram_fn[4096];
-  strcpy(fn, rom_fn);
-//correct folder slashes
-  for(int i = strlen(fn) - 1; i >= 0; i--) {
-    if(fn[i] == '\\')fn[i] = '/';
+  memory::cartrom.write_protect(true);
+  memory::cartram.write_protect(false);
+  memory::bscram.write_protect(true);
+  memory::stArom.write_protect(true);
+  memory::stAram.write_protect(false);
+  memory::stBrom.write_protect(true);
+  memory::stBram.write_protect(false);
+
+  string cheat_file = get_filename(cart.filename, "cht", snes.config.path.cheat);
+  if(file::exists(cheat_file)) {
+    cheat.clear();
+    cheat.load(cheat_file);
   }
 
-uint i = file.count++;
-  strcpy(file.rom_name[i], fn);
+  bus.load_cart();
+  set(loaded, true);
+}
 
-  strcpy(fn, rom_fn);
-//remove ROM extension
-  for(int i = strlen(fn) - 1; i >= 0; i--) {
-    if(fn[i] == '.') {
-      fn[i] = 0;
+void Cartridge::unload() {
+  if(loaded() == false) return;
+  bus.unload_cart();
+
+  switch(mode()) {
+    case ModeNormal:      unload_normal();       break;
+    case ModeBsxSlotted:  unload_bsx_slotted();  break;
+    case ModeBsx:         unload_bsx();          break;
+    case ModeSufamiTurbo: unload_sufami_turbo(); break;
+  }
+
+  if(cart.rom) { delete[] cart.rom; cart.rom = 0; }
+  if(cart.ram) { delete[] cart.ram; cart.ram = 0; }
+  if(cart.rtc) { delete[] cart.rtc; cart.rtc = 0; }
+  if(bs.ram)   { delete[] bs.ram;   bs.ram   = 0; }
+  if(stA.rom)  { delete[] stA.rom;  stA.rom  = 0; }
+  if(stA.ram)  { delete[] stA.ram;  stA.ram  = 0; }
+  if(stB.rom)  { delete[] stB.rom;  stB.rom  = 0; }
+  if(stB.ram)  { delete[] stB.ram;  stB.ram  = 0; }
+
+  string cheat_file = get_filename(cart.filename, "cht", snes.config.path.cheat);
+  if(cheat.count() > 0 || file::exists(cheat_file)) {
+    cheat.save(cheat_file);
+    cheat.clear();
+  }
+
+  set(loaded, false);
+}
+
+Cartridge::Cartridge() {
+  set(loaded, false);
+}
+
+Cartridge::~Cartridge() {
+  if(loaded() == true) unload();
+}
+
+void Cartridge::set_cartinfo(const Cartridge::cartinfo_t &source) {
+  set(region,         source.region);
+  set(mapper,         source.mapper);
+  set(dsp1_mapper,    source.dsp1_mapper);
+
+  set(has_bsx_slot,   source.bsx_slot);
+  set(has_superfx,    source.superfx);
+  set(has_sa1,        source.sa1);
+  set(has_srtc,       source.srtc);
+  set(has_sdd1,       source.sdd1);
+  set(has_spc7110,    source.spc7110);
+  set(has_spc7110rtc, source.spc7110rtc);
+  set(has_cx4,        source.cx4);
+  set(has_dsp1,       source.dsp1);
+  set(has_dsp2,       source.dsp2);
+  set(has_dsp3,       source.dsp3);
+  set(has_dsp4,       source.dsp4);
+  set(has_obc1,       source.obc1);
+  set(has_st010,      source.st010);
+  set(has_st011,      source.st011);
+  set(has_st018,      source.st018);
+}
+
+//==========
+//cartinfo_t
+//==========
+
+void Cartridge::cartinfo_t::reset() {
+  type        = TypeUnknown;
+  mapper      = LoROM;
+  dsp1_mapper = DSP1Unmapped;
+  region      = NTSC;
+
+  rom_size = 0;
+  ram_size = 0;
+
+  bsx_slot   = false;
+  superfx    = false;
+  sa1        = false;
+  srtc       = false;
+  sdd1       = false;
+  spc7110    = false;
+  spc7110rtc = false;
+  cx4        = false;
+  dsp1       = false;
+  dsp2       = false;
+  dsp3       = false;
+  dsp4       = false;
+  obc1       = false;
+  st010      = false;
+  st011      = false;
+  st018      = false;
+}
+
+Cartridge::cartinfo_t::cartinfo_t() {
+  reset();
+}
+
+//=======
+//utility
+//=======
+
+//ensure file path is absolute (eg resolve relative paths)
+string Cartridge::filepath(const char *filename, const char *pathname) {
+  //if no pathname, return filename as-is
+  string file(filename);
+  file.replace("\\", "/");
+
+  string path = (!pathname || !*pathname) ? (const char*)snes.config.path.current : pathname;
+  //ensure path ends with trailing '/'
+  path.replace("\\", "/");
+  if(!strend(path, "/")) path.append("/");
+
+  //replace relative path with absolute path
+  if(strbegin(path, "./")) {
+    ltrim(path, "./");
+    path = string() << snes.config.path.base << path;
+  }
+
+  //remove folder part of filename
+  lstring part;
+  part.split("/", file);
+  return path << part[part.size() - 1];
+}
+
+//remove directory information and file extension ("/foo/bar.ext" -> "bar")
+string Cartridge::basename(const char *filename) {
+  string name(filename);
+
+  //remove extension
+  for(signed i = strlen(name) - 1; i >= 0; i--) {
+    if(name[i] == '.') {
+      name[i] = 0;
       break;
     }
   }
 
-  if(i == 0) {
-    strcpy(file.patch_name, fn);
-    strcat(file.patch_name, ".ups");
+  //remove directory information
+  for(signed i = strlen(name) - 1; i >= 0; i--) {
+    if(name[i] == '/' || name[i] == '\\') {
+      i++;
+      char *output = name();
+      while(true) {
+        *output++ = name[i];
+        if(!name[i]) break;
+        i++;
+      }
+      break;
+    }
   }
-  strcpy(fn, strptr(config::file_updatepath(fn, config::path.save)));
-  if(i == 0) {
-    strcpy(file.cheat_name, fn);
-    strcat(file.cheat_name, ".cht");
-  }
-  strcpy(file.ram_name[i], fn);
-  strcat(file.ram_name[i], ".");
-  strcat(file.ram_name[i], config::path.save_ext);
+
+  return name;
 }
 
-bool Cartridge::load_end() {
-  for(int i = 0; i < file.count; i++) {
-    load_file(file.rom_name[i], file.rom_data[i], file.rom_size[i]);
+//remove filename and return path only ("/foo/bar.ext" -> "/foo/bar/")
+string Cartridge::basepath(const char *filename) {
+  string path(filename);
+  path.replace("\\", "/");
+
+  //remove filename
+  for(signed i = strlen(path) - 1; i >= 0; i--) {
+    if(path[i] == '/') {
+      path[i] = 0;
+      break;
+    }
   }
 
-  if(fexists(file.cheat_name) == true) {
-    cheat.clear();
-    cheat.load(file.cheat_name);
-  }
-
-  switch(info.type) {
-  case CartridgeNormal: {
-    load_rom_normal();
-    load_ram_normal();
-  } break;
-  case CartridgeSufamiTurbo: {
-    load_rom_st();
-    load_ram_st();
-  } break;
-  case CartridgeSufamiTurboDual: {
-    load_rom_stdual();
-    load_ram_stdual();
-  } break;
-  }
-
-  cart_loaded = true;
-  r_mem->load_cart();
-  return true;
-}
-
-bool Cartridge::unload() {
-  if(cart_loaded == false)return false;
-
-  r_mem->unload_cart();
-
-  switch(info.type) {
-  case CartridgeNormal: {
-    save_ram_normal();
-  } break;
-  case CartridgeSufamiTurbo: {
-    save_ram_st();
-  } break;
-  case CartridgeSufamiTurboDual: {
-    save_ram_stdual();
-  } break;
-  }
-
-  safe_free(rom);
-  safe_free(ram);
-
-  if(cheat.count() > 0 || fexists(file.cheat_name) == true) {
-    cheat.save(file.cheat_name);
-    cheat.clear();
-  }
-
-  cart_loaded = false;
-  return true;
-}
-
-Cartridge::Cartridge() {
-  load_database();
-
-  cart_loaded = false;
-
-  rom = 0;
-  ram = 0;
-}
-
-Cartridge::~Cartridge() {
-  if(cart_loaded == true) {
-    unload();
-  }
+  if(!strend(path, "/")) path.append("/");
+  return path;
 }

src/cart/cart.h

@@ -1,129 +0,0 @@
-class Cartridge {
-public:
-
-/*****
- * cart database
- *****/
-
-#include "db/db.h"
-db_item dbi;
-  uint8 *database;
-  uint   database_size;
-  uint   database_blocksize;
-  void   load_database();
-  bool   read_database();
-
-//
-
-enum CartridgeType {
-  CartridgeNormal,
-  CartridgeSufamiTurbo,
-  CartridgeSufamiTurboDual,
-};
-
-bool cart_loaded;
-
-uint8 rom_header[512], *rom, *ram;
-
-enum {
-//header fields
-  CART_NAME = 0x00,
-  MAPPER    = 0x15,
-  ROM_TYPE  = 0x16,
-  ROM_SIZE  = 0x17,
-  RAM_SIZE  = 0x18,
-  REGION    = 0x19,
-  COMPANY   = 0x1a,
-  VERSION   = 0x1b,
-  ICKSUM    = 0x1c,
-  CKSUM     = 0x1e,
-  RESL      = 0x3c,
-  RESH      = 0x3d,
-
-//regions
-  NTSC = 0,
-  PAL  = 1,
-
-//memory mappers
-  PCB     = 0x00,
-  LOROM   = 0x20,
-  HIROM   = 0x21,
-  EXLOROM = 0x22,
-  EXHIROM = 0x25,
-
-//special chip memory mappers
-  DSP1_LOROM_1MB = 1,
-  DSP1_LOROM_2MB = 2,
-  DSP1_HIROM     = 3,
-};
-
-struct {
-  uint   count;
-  char   cheat_name[4096], patch_name[4096];
-  char   rom_name[8][4096], ram_name[8][4096];
-  uint   rom_size[8],  ram_size[8];
-  uint8 *rom_data[8], *ram_data[8];
-} file;
-
-struct {
-  uint   type;
-
-//cart information
-  uint32 crc32;
-  char   name[128];
-  char   pcb[32];
-
-  uint   region;
-  uint   mapper;
-  uint   rom_size;
-  uint   ram_size;
-
-  bool   superfx;
-  bool   sa1;
-  bool   srtc;
-  bool   sdd1;
-  bool   c4;
-  bool   dsp1;
-  bool   dsp2;
-  bool   dsp3;
-  bool   dsp4;
-  bool   obc1;
-  bool   st010;
-  bool   st011;
-  bool   st018;
-
-  uint   dsp1_mapper;
-
-//HiROM / LoROM specific code
-  uint   header_index;
-} info;
-
-  bool load_file(const char *fn, uint8 *&data, uint &size);
-  bool save_file(const char *fn, uint8 *data, uint size);
-
-  void load_rom_normal();
-  void load_ram_normal();
-  void save_ram_normal();
-
-  void load_rom_st();
-  void load_ram_st();
-  void save_ram_st();
-
-  void load_rom_stdual();
-  void load_ram_stdual();
-  void save_ram_stdual();
-
-  void find_header();
-  void read_header();
-
-  bool loaded() { return cart_loaded; }
-  void load_begin(CartridgeType cart_type);
-  void load(const char *rom_fn);
-  bool load_end();
-  bool unload();
-
-  Cartridge();
-  ~Cartridge();
-};
-
-extern Cartridge cartridge;

src/cart/cart.hpp

@@ -0,0 +1,178 @@
+class Cartridge : public property {
+public:
+  enum Mode {
+    ModeNormal,
+    ModeBsxSlotted,
+    ModeBsx,
+    ModeSufamiTurbo,
+  };
+
+  enum Type {
+    TypeNormal,
+    TypeBsxSlotted,
+    TypeBsxBios,
+    TypeBsx,
+    TypeSufamiTurboBios,
+    TypeSufamiTurbo,
+    TypeUnknown,
+  };
+
+  enum Region {
+    NTSC,
+    PAL,
+  };
+
+  enum MemoryMapper {
+    LoROM,
+    HiROM,
+    ExLoROM,
+    ExHiROM,
+    SPC7110ROM,
+    BSCLoROM,
+    BSCHiROM,
+    BSXROM,
+    STROM,
+  };
+
+  enum DSP1MemoryMapper {
+    DSP1Unmapped,
+    DSP1LoROM1MB,
+    DSP1LoROM2MB,
+    DSP1HiROM,
+  };
+
+  //properties can be read via operator(), eg "if(cartridge.loaded() == true)";
+  //warning: if loaded() == false, no other property is considered valid!
+
+  property_t<bool>   loaded;            //is a base cartridge inserted?
+  property_t<bool>   bsx_flash_loaded;  //is a BS-X flash cart connected?
+  property_t<bool>   patched;           //has a UPS patch been applied?
+  property_t<string> name;              //display name (filename sans path and extension)
+
+  property_t<Mode>             mode;
+  property_t<Region>           region;
+  property_t<MemoryMapper>     mapper;
+  property_t<DSP1MemoryMapper> dsp1_mapper;
+
+  property_t<bool> has_bsx_slot;
+  property_t<bool> has_superfx;
+  property_t<bool> has_sa1;
+  property_t<bool> has_srtc;
+  property_t<bool> has_sdd1;
+  property_t<bool> has_spc7110, has_spc7110rtc;
+  property_t<bool> has_cx4;
+  property_t<bool> has_dsp1, has_dsp2, has_dsp3, has_dsp4;
+  property_t<bool> has_obc1;
+  property_t<bool> has_st010, has_st011, has_st018;
+
+  //main interface
+  bool load_normal      (const char *base);
+  bool load_bsx_slotted (const char *base, const char *slot  = "");
+  bool load_bsx         (const char *base, const char *slot  = "");
+  bool load_sufami_turbo(const char *base, const char *slotA = "", const char *slotB = "");
+  void unload();
+
+  //utility functions
+  static string filepath(const char *filename, const char *pathname);  //"./bar.ext" -> "/foo/bar.ext"
+  static string basename(const char *filename);                        //"/foo/bar.ext" -> "bar"
+  static string basepath(const char *filename);                        //"/foo/bar.ext" -> "/foo/bar/"
+  //this function will load 'filename', decompress it if needed, and determine what type of
+  //image file 'filename' refers to (eg normal cart, BS-X flash cart, Sufami Turbo cart, etc.)
+  //warning: this operation is very expensive, use sparingly!
+  Type detect_image_type(const char *filename) const;
+
+  Cartridge();
+  ~Cartridge();
+
+private:
+  void load_begin(Mode);
+  void load_end();
+  void unload_normal();
+  void unload_bsx_slotted();
+  void unload_bsx();
+  void unload_sufami_turbo();
+
+  struct cartinfo_t {
+    Type type;
+    Region region;
+    MemoryMapper mapper;
+    DSP1MemoryMapper dsp1_mapper;
+    unsigned rom_size, ram_size;
+
+    bool bsx_slot;
+    bool superfx;
+    bool sa1;
+    bool srtc;
+    bool sdd1;
+    bool spc7110, spc7110rtc;
+    bool cx4;
+    bool dsp1, dsp2, dsp3, dsp4;
+    bool obc1;
+    bool st010, st011, st018;
+
+    void reset();
+    cartinfo_t();
+  };
+
+  enum HeaderField {
+    CartName    = 0x00,
+    Mapper      = 0x15,
+    RomType     = 0x16,
+    RomSize     = 0x17,
+    RamSize     = 0x18,
+    CartRegion  = 0x19,
+    Company     = 0x1a,
+    Version     = 0x1b,
+    Complement  = 0x1c,  //inverse checksum
+    Checksum    = 0x1e,
+    ResetVector = 0x3c,
+  };
+
+  void read_header(cartinfo_t &info, const uint8_t *data, unsigned size) const;
+  unsigned find_header(const uint8_t *data, unsigned size) const;
+  unsigned score_header(const uint8_t *data, unsigned size, unsigned addr) const;
+  void set_cartinfo(const cartinfo_t&);
+
+  bool load_image(const char *filename, uint8_t *&data, unsigned &size, bool &patched) const;
+  bool load_ram  (const char *filename, uint8_t *&data, unsigned  size, uint8_t init_value) const;
+
+  enum CompressionMode {
+    CompressionNone,     //always load without compression
+    CompressionInspect,  //use file header inspection
+    CompressionAuto,     //use file extension or file header inspection (configured by user)
+  };
+
+  bool load_file(const char *fn, uint8 *&data, unsigned &size, CompressionMode compression = CompressionNone) const;
+  bool save_file(const char *fn, uint8 *data, unsigned size) const;
+  bool apply_patch(const uint8_t *pdata, unsigned psize, uint8_t *&data, unsigned &size) const;
+
+  string modify_extension(const char *filename, const char *extension) const;
+  string get_filename(const char *source, const char *extension, const char *path) const;
+
+  struct {
+    string filename;
+    uint8_t *rom, *ram, *rtc;
+    unsigned rom_size, ram_size, rtc_size;
+  } cart;
+
+  struct {
+    string filename;
+    uint8_t *ram;
+    unsigned ram_size;
+  } bs;
+
+  struct {
+    string filename;
+    uint8_t *rom, *ram;
+    unsigned rom_size, ram_size;
+  } stA, stB;
+};
+
+namespace memory {
+  extern MappedRAM cartrom, cartram, cartrtc;
+  extern MappedRAM bscram;
+  extern MappedRAM stArom, stAram;
+  extern MappedRAM stBrom, stBram;
+};
+
+extern Cartridge cartridge;

src/cart/cart_file.cpp

@@ -1,73 +1,109 @@
-#include "../reader/filereader.h"
-
-#if defined(GZIP_SUPPORT)
-  #include "../reader/gzreader.h"
-  #include "../reader/zipreader.h"
-#endif
-
-#if defined(JMA_SUPPORT)
-  #include "../reader/jmareader.h"
-#endif
-
-bool Cartridge::load_file(const char *fn, uint8 *&data, uint &size) {
-  dprintf("* Loading \"%s\"...", fn);
-
-  if(fexists(fn) == false) {
-    alert("Error: file '%s' not found!", fn);
-    return false;
-  }
-
-  switch(Reader::detect(fn)) {
-
-  case Reader::RF_NORMAL: {
-  FileReader ff(fn);
-    if(!ff.ready()) {
-      alert("Error loading image file (%s)!", fn);
-      return false;
-    }
-    size = ff.size();
-    data = ff.read();
-  } break;
-
-#ifdef GZIP_SUPPORT
-  case Reader::RF_GZ: {
-  GZReader gf(fn);
-    if(!gf.ready()) {
-      alert("Error loading image file (%s)!", fn);
-      return false;
-    }
-    size = gf.size();
-    data = gf.read();
-  } break;
-
-  case Reader::RF_ZIP: {
-  ZipReader zf(fn);
-    size = zf.size();
-    data = zf.read();
-  } break;
-#endif
-
-#ifdef JMA_SUPPORT
-  case Reader::RF_JMA: {
-    try {
-    JMAReader jf(fn);
-      size = jf.size();
-      data = jf.read();
-    } catch(JMA::jma_errors jma_error) {
-      alert("Error loading image file (%s)!", fn);
-      return false;
-    }
-  } break;
-#endif
-
-  }
-
-  return true;
-}
-
-bool Cartridge::save_file(const char *fn, uint8 *data, uint size) {
-FileWriter ff(fn);
-  if(!ff.ready())return false;
-  ff.write(data, size);
-  return true;
-}
+#ifdef CART_CPP
+
+#include "../reader/filereader.hpp"
+
+#if defined(GZIP_SUPPORT)
+  #include "../reader/gzreader.hpp"
+  #include "../reader/zipreader.hpp"
+#endif
+
+#if defined(JMA_SUPPORT)
+  #include "../reader/jmareader.hpp"
+#endif
+
+string Cartridge::modify_extension(const char *filename_, const char *extension) const {
+  string filename = filename_;
+  int i;
+  for(i = strlen(filename); i >= 0; i--) {
+    if(filename[i] == '.')  break;
+    if(filename[i] == '/')  break;
+    if(filename[i] == '\\') break;
+  }
+  if(i > 0 && filename[i] == '.') filename[i] = 0;
+  return filename << "." << extension;
+}
+
+string Cartridge::get_filename(const char *source, const char *extension, const char *path) const {
+  return filepath(modify_extension(source, extension), path);
+}
+
+bool Cartridge::load_file(const char *fn, uint8 *&data, unsigned &size, CompressionMode compression) const {
+  if(file::exists(fn) == false) return false;
+
+  Reader::Type filetype = Reader::Normal;
+  if(compression == CompressionInspect) filetype = Reader::detect(fn, true);
+  if(compression == CompressionAuto) filetype = Reader::detect(fn, snes.config.file.autodetect_type);
+
+  switch(filetype) { default:
+    case Reader::Normal: {
+      FileReader ff(fn);
+      if(!ff.ready()) return false;
+      size = ff.size();
+      data = ff.read();
+    } break;
+
+    #ifdef GZIP_SUPPORT
+    case Reader::GZIP: {
+      GZReader gf(fn);
+      if(!gf.ready()) return false;
+      size = gf.size();
+      data = gf.read();
+    } break;
+
+    case Reader::ZIP: {
+      ZipReader zf(fn);
+      if(!zf.ready()) return false;
+      size = zf.size();
+      data = zf.read();
+    } break;
+    #endif
+
+    #ifdef JMA_SUPPORT
+    case Reader::JMA: {
+      try {
+        JMAReader jf(fn);
+        size = jf.size();
+        data = jf.read();
+      } catch(JMA::jma_errors jma_error) {
+        return false;
+      }
+    } break;
+    #endif
+  }
+
+  return true;
+}
+
+bool Cartridge::apply_patch(const uint8_t *pdata, const unsigned psize, uint8_t *&data, unsigned &size) const {
+  uint8_t *outdata = 0;
+  unsigned outsize;
+  ups patcher;
+  ups::result result = patcher.apply(pdata, psize, data, size, outdata, outsize);
+
+  bool apply = false;
+  if(result == ups::ok) apply = true;
+  if(snes.config.file.bypass_patch_crc32 == true) {
+    if(result == ups::input_crc32_invalid)  apply = true;
+    if(result == ups::output_crc32_invalid) apply = true;
+  }
+
+  //if patch application was successful, replace old data, size with new data, size
+  if(apply == true) {
+    delete[] data;
+    data = new uint8_t[size = outsize];
+    memcpy(data, outdata, outsize);
+  }
+
+  if(outdata) delete[] outdata;
+  return apply;
+}
+
+bool Cartridge::save_file(const char *fn, uint8 *data, unsigned size) const {
+  file fp;
+  if(!fp.open(fn, file::mode_write)) return false;
+  fp.write(data, size);
+  fp.close();
+  return true;
+}
+
+#endif

src/cart/cart_header.cpp

@@ -1,167 +1,272 @@
-void Cartridge::read_header() {
-  if(info.header_index == 0x7fc0 && info.rom_size >= 0x401000) {
-    info.mapper = EXLOROM;
-    strcpy(info.pcb, "UNL-EXLOROM");
-  } else if(info.header_index == 0x7fc0 && rom[info.header_index + MAPPER] == 0x32) {
-    info.mapper = EXLOROM;
-    strcpy(info.pcb, "UNL-EXLOROM");
-  } else if(info.header_index == 0x7fc0) {
-    info.mapper = LOROM;
-    strcpy(info.pcb, "UNL-LOROM");
-  } else if(info.header_index == 0xffc0) {
-    info.mapper = HIROM;
-    strcpy(info.pcb, "UNL-HIROM");
-  } else { //info.header_index == 0x40ffc0
-    info.mapper = EXHIROM;
-    strcpy(info.pcb, "UNL-EXHIROM");
-  }
-
-uint8 mapper   = rom[info.header_index + MAPPER];
-uint8 rom_type = rom[info.header_index + ROM_TYPE];
-uint8 company  = rom[info.header_index + COMPANY];
-
-  if(mapper == 0x20 && (rom_type == 0x13 || rom_type == 0x14 || rom_type == 0x15 || rom_type == 0x1a)) {
-    info.superfx = true;
-  }
-
-  if(mapper == 0x23 && (rom_type == 0x34 || rom_type == 0x35)) {
-    info.sa1 = true;
-  }
-
-  if(mapper == 0x35 && rom_type == 0x55) {
-    info.srtc = true;
-  }
-
-  if(mapper == 0x32 && (rom_type == 0x43 || rom_type == 0x45)) {
-    info.sdd1 = true;
-  }
-
-  if(mapper == 0x20 && rom_type == 0xf3) {
-    info.c4 = true;
-  }
-
-  if((mapper == 0x20 || mapper == 0x21) && rom_type == 0x03) {
-    info.dsp1 = true;
-  }
-
-  if(mapper == 0x30 && rom_type == 0x05 && company != 0xb2) {
-    info.dsp1 = true;
-  }
-
-  if(mapper == 0x31 && (rom_type == 0x03 || rom_type == 0x05)) {
-    info.dsp1 = true;
-  }
-
-  if(info.dsp1 == true) {
-    if((mapper & 0x2f) == 0x20 && info.rom_size <= 0x100000) {
-      info.dsp1_mapper = DSP1_LOROM_1MB;
-    } else if((mapper & 0x2f) == 0x20) {
-      info.dsp1_mapper = DSP1_LOROM_2MB;
-    } else if((mapper & 0x2f) == 0x21) {
-      info.dsp1_mapper = DSP1_HIROM;
-    }
-  }
-
-  if(mapper == 0x20 && rom_type == 0x05) {
-    info.dsp2 = true;
-  }
-
-  if(mapper == 0x30 && rom_type == 0x05 && company == 0xb2) {
-    info.dsp3 = true;
-  }
-
-  if(mapper == 0x30 && rom_type == 0x03) {
-    info.dsp4 = true;
-  }
-
-  if(mapper == 0x30 && rom_type == 0x25) {
-    info.obc1 = true;
-  }
-
-  if(mapper == 0x30 && rom_type == 0xf6) {
-  //TODO: both ST010 and ST011 share the same mapper + rom_type
-  //need way to determine which is which
-  //for now, default to supported ST010
-    info.st010 = true;
-  }
-
-  if(mapper == 0x30 && rom_type == 0xf5) {
-    info.st018 = true;
-  }
-
-  if(rom[info.header_index + RAM_SIZE] & 7) {
-    info.ram_size = 1024 << (rom[info.header_index + RAM_SIZE] & 7);
-  } else {
-    info.ram_size = 0;
-  }
-
-  memcpy(&info.name, &rom[info.header_index + CART_NAME], 21);
-  info.name[21] = 0;
-
-  for(int i = 0; i < 22; i++) {
-    if(info.name[i] & 0x80) {
-      info.name[i] = '?';
-    }
-  }
-}
-
-void Cartridge::find_header() {
-int32 score_lo = 0,
-      score_hi = 0,
-      score_ex = 0;
-
-  if(info.rom_size < 0x010000) {
-  //cart too small to be anything but lorom
-    info.header_index = 0x007fc0;
-    return;
-  }
-
-  if((rom[0x7fc0 + MAPPER] & ~0x10) == 0x20)score_lo++;
-  if((rom[0xffc0 + MAPPER] & ~0x10) == 0x21)score_hi++;
-
-  if(rom[0x7fc0 + ROM_TYPE] < 0x08)score_lo++;
-  if(rom[0xffc0 + ROM_TYPE] < 0x08)score_hi++;
-
-  if(rom[0x7fc0 + ROM_SIZE] < 0x10)score_lo++;
-  if(rom[0xffc0 + ROM_SIZE] < 0x10)score_hi++;
-
-  if(rom[0x7fc0 + RAM_SIZE] < 0x08)score_lo++;
-  if(rom[0xffc0 + RAM_SIZE] < 0x08)score_hi++;
-
-  if(rom[0x7fc0 + REGION] < 14)score_lo++;
-  if(rom[0xffc0 + REGION] < 14)score_hi++;
-
-  if(rom[0x7fc0 + COMPANY] < 3)score_lo++;
-  if(rom[0xffc0 + COMPANY] < 3)score_hi++;
-
-  if(rom[0x7fc0 + RESH] & 0x80)score_lo += 2;
-  if(rom[0xffc0 + RESH] & 0x80)score_hi += 2;
-
-uint16 cksum, icksum;
-  cksum  = rom[0x7fc0 +  CKSUM] | (rom[0x7fc0 +  CKSUM + 1] << 8);
-  icksum = rom[0x7fc0 + ICKSUM] | (rom[0x7fc0 + ICKSUM + 1] << 8);
-  if((cksum + icksum) == 0xffff && (cksum != 0) && (icksum != 0)) {
-    score_lo += 8;
-  }
-
-  cksum  = rom[0xffc0 +  CKSUM] | (rom[0xffc0 +  CKSUM + 1] << 8);
-  icksum = rom[0xffc0 + ICKSUM] | (rom[0xffc0 + ICKSUM + 1] << 8);
-  if((cksum + icksum) == 0xffff && (cksum != 0) && (icksum != 0)) {
-    score_hi += 8;
-  }
-
-  if(info.rom_size < 0x401000) {
-    score_ex = 0;
-  } else {
-    if(rom[0x7fc0 + MAPPER] == 0x32)score_lo++;
-    else score_ex += 16;
-  }
-
-  if(score_lo >= score_hi && score_lo >= score_ex) {
-    info.header_index = 0x007fc0;
-  } else if(score_hi >= score_ex) {
-    info.header_index = 0x00ffc0;
-  } else {
-    info.header_index = 0x40ffc0;
-  }
-}
+#ifdef CART_CPP
+
+void Cartridge::read_header(cartinfo_t &info, const uint8_t *data, unsigned size) const {
+  info.reset();
+  unsigned index = find_header(data, size);
+
+  //=======================
+  //detect BS-X flash carts
+  //=======================
+
+  if(data[index + 0x13] == 0x00 || data[index + 0x13] == 0xff) {
+    if(data[index + 0x14] == 0x00) {
+      const uint8_t n15 = data[index + 0x15];
+      if(n15 == 0x00 || n15 == 0x80 || n15 == 0x84 || n15 == 0x9c || n15 == 0xbc || n15 == 0xfc) {
+        if(data[index + 0x1a] == 0x33 || data[index + 0x1a] == 0xff) {
+          info.type = TypeBsx;
+          info.mapper = BSXROM;
+          info.region = NTSC;  //BS-X only released in Japan
+          return;
+        }
+      }
+    }
+  }
+
+  //=========================
+  //detect Sufami Turbo carts
+  //=========================
+
+  if(!memcmp(data, "BANDAI SFC-ADX", 14)) {
+    if(!memcmp(data + 16, "SFC-ADX BACKUP", 14)) {
+      info.type = TypeSufamiTurboBios;
+    } else {
+      info.type = TypeSufamiTurbo;
+    }
+    info.mapper = STROM;
+    info.region = NTSC;  //Sufami Turbo only released in Japan
+    return;              //RAM size handled internally by load_cart_st();
+  }
+
+  //=====================
+  //detect standard carts
+  //=====================
+
+  const uint8 mapper   = data[index + Mapper];
+  const uint8 rom_type = data[index + RomType];
+  const uint8 rom_size = data[index + RomSize];
+  const uint8 company  = data[index + Company];
+  const uint8 region   = data[index + CartRegion] & 0x7f;
+
+  //detect presence of BS-X flash cartridge connector (reads extended header information)
+  if(data[index - 14] == 'Z') {
+    if(data[index - 11] == 'J') {
+      uint8 n13 = data[index - 13];
+      if((n13 >= 'A' && n13 <= 'Z') || (n13 >= '0' && n13 <= '9')) {
+        if(company == 0x33 || (data[index - 10] == 0x00 && data[index - 4] == 0x00)) {
+          info.bsx_slot = true;
+        }
+      }
+    }
+  }
+
+  if(info.bsx_slot == true) {
+    if(!memcmp(data + index, "Satellaview BS-X     ", 21)) {
+      //BS-X base cart
+      info.type = TypeBsxBios;
+      info.mapper = BSXROM;
+      info.region = NTSC;  //BS-X only released in Japan
+      return;              //RAM size handled internally by load_cart_bsx() -> BSXCart class
+    } else {
+      info.type = TypeBsxSlotted;
+      info.mapper = (index == 0x7fc0 ? BSCLoROM : BSCHiROM);
+    }
+  } else {
+    //standard cart
+    info.type = TypeNormal;
+
+    if(index == 0x7fc0 && size >= 0x401000) {
+      info.mapper = ExLoROM;
+    } else if(index == 0x7fc0 && mapper == 0x32) {
+      info.mapper = ExLoROM;
+    } else if(index == 0x7fc0) {
+      info.mapper = LoROM;
+    } else if(index == 0xffc0) {
+      info.mapper = HiROM;
+    } else {  //index == 0x40ffc0
+      info.mapper = ExHiROM;
+    }
+  }
+
+  if(mapper == 0x20 && (rom_type == 0x13 || rom_type == 0x14 || rom_type == 0x15 || rom_type == 0x1a)) {
+    info.superfx = true;
+  }
+
+  if(mapper == 0x23 && (rom_type == 0x34 || rom_type == 0x35)) {
+    info.sa1 = true;
+  }
+
+  if(mapper == 0x35 && rom_type == 0x55) {
+    info.srtc = true;
+  }
+
+  if(mapper == 0x32 && (rom_type == 0x43 || rom_type == 0x45)) {
+    info.sdd1 = true;
+  }
+
+  if(mapper == 0x3a && (rom_type == 0xf5 || rom_type == 0xf9)) {
+    info.spc7110 = true;
+    info.spc7110rtc = (rom_type == 0xf9);
+    info.mapper = SPC7110ROM;
+  }
+
+  if(mapper == 0x20 && rom_type == 0xf3) {
+    info.cx4 = true;
+  }
+
+  if((mapper == 0x20 || mapper == 0x21) && rom_type == 0x03) {
+    info.dsp1 = true;
+  }
+
+  if(mapper == 0x30 && rom_type == 0x05 && company != 0xb2) {
+    info.dsp1 = true;
+  }
+
+  if(mapper == 0x31 && (rom_type == 0x03 || rom_type == 0x05)) {
+    info.dsp1 = true;
+  }
+
+  if(info.dsp1 == true) {
+    if((mapper & 0x2f) == 0x20 && size <= 0x100000) {
+      info.dsp1_mapper = DSP1LoROM1MB;
+    } else if((mapper & 0x2f) == 0x20) {
+      info.dsp1_mapper = DSP1LoROM2MB;
+    } else if((mapper & 0x2f) == 0x21) {
+      info.dsp1_mapper = DSP1HiROM;
+    }
+  }
+
+  if(mapper == 0x20 && rom_type == 0x05) {
+    info.dsp2 = true;
+  }
+
+  if(mapper == 0x30 && rom_type == 0x05 && company == 0xb2) {
+    info.dsp3 = true;
+  }
+
+  if(mapper == 0x30 && rom_type == 0x03) {
+    info.dsp4 = true;
+  }
+
+  if(mapper == 0x30 && rom_type == 0x25) {
+    info.obc1 = true;
+  }
+
+  if(mapper == 0x30 && rom_type == 0xf6 && rom_size >= 10) {
+    info.st010 = true;
+  }
+
+  if(mapper == 0x30 && rom_type == 0xf6 && rom_size < 10) {
+    info.st011 = true;
+  }
+
+  if(mapper == 0x30 && rom_type == 0xf5) {
+    info.st018 = true;
+  }
+
+  if(data[index + RamSize] & 7) {
+    info.ram_size = 1024 << (data[index + RamSize] & 7);
+  } else {
+    info.ram_size = 0;
+  }
+
+  //0, 1, 13 = NTSC; 2 - 12 = PAL
+  info.region = (region <= 1 || region >= 13) ? NTSC : PAL;
+}
+
+unsigned Cartridge::find_header(const uint8_t *data, unsigned size) const {
+  unsigned score_lo = score_header(data, size, 0x007fc0);
+  unsigned score_hi = score_header(data, size, 0x00ffc0);
+  unsigned score_ex = score_header(data, size, 0x40ffc0);
+  if(score_ex) score_ex += 4;  //favor ExHiROM on images > 32mbits
+
+  if(score_lo >= score_hi && score_lo >= score_ex) {
+    return 0x007fc0;
+  } else if(score_hi >= score_ex) {
+    return 0x00ffc0;
+  } else {
+    return 0x40ffc0;
+  }
+}
+
+unsigned Cartridge::score_header(const uint8_t *data, unsigned size, unsigned addr) const {
+  if(size < addr + 64) return 0;  //image too small to contain header at this location?
+  int score = 0;
+
+  uint16 resetvector = data[addr + ResetVector] | (data[addr + ResetVector + 1] << 8);
+  uint16 checksum    = data[addr + Checksum   ] | (data[addr + Checksum    + 1] << 8);
+  uint16 complement  = data[addr + Complement ] | (data[addr + Complement  + 1] << 8);
+
+  uint8 resetop = data[(addr & ~0x7fff) | (resetvector & 0x7fff)];  //first opcode executed upon reset
+  uint8 mapper  = data[addr + Mapper] & ~0x10;                      //mask off irrelevent FastROM-capable bit
+
+  //$00:[000-7fff] contains uninitialized RAM and MMIO.
+  //reset vector must point to ROM at $00:[8000-ffff] to be considered valid.
+  if(resetvector < 0x8000) return 0;
+
+  //some images duplicate the header in multiple locations, and others have completely
+  //invalid header information that cannot be relied upon.
+  //below code will analyze the first opcode executed at the specified reset vector to
+  //determine the probability that this is the correct header.
+
+  //most likely opcodes
+  if(resetop == 0x78  //sei
+  || resetop == 0x18  //clc (clc; xce)
+  || resetop == 0x38  //sec (sec; xce)
+  || resetop == 0x9c  //stz $nnnn (stz $4200)
+  || resetop == 0x4c  //jmp $nnnn
+  || resetop == 0x5c  //jml $nnnnnn
+  ) score += 8;
+
+  //plausible opcodes
+  if(resetop == 0xc2  //rep #$nn
+  || resetop == 0xe2  //sep #$nn
+  || resetop == 0xad  //lda $nnnn
+  || resetop == 0xae  //ldx $nnnn
+  || resetop == 0xac  //ldy $nnnn
+  || resetop == 0xaf  //lda $nnnnnn
+  || resetop == 0xa9  //lda #$nn
+  || resetop == 0xa2  //ldx #$nn
+  || resetop == 0xa0  //ldy #$nn
+  || resetop == 0x20  //jsr $nnnn
+  || resetop == 0x22  //jsl $nnnnnn
+  ) score += 4;
+
+  //implausible opcodes
+  if(resetop == 0x40  //rti
+  || resetop == 0x60  //rts
+  || resetop == 0x6b  //rtl
+  || resetop == 0xcd  //cmp $nnnn
+  || resetop == 0xec  //cpx $nnnn
+  || resetop == 0xcc  //cpy $nnnn
+  ) score -= 4;
+
+  //least likely opcodes
+  if(resetop == 0x00  //brk #$nn
+  || resetop == 0x02  //cop #$nn
+  || resetop == 0xdb  //stp
+  || resetop == 0x42  //wdm
+  || resetop == 0xff  //sbc $nnnnnn,x
+  ) score -= 8;
+
+  //at times, both the header and reset vector's first opcode will match ...
+  //fallback and rely on info validity in these cases to determine more likely header.
+
+  //a valid checksum is the biggest indicator of a valid header.
+  if((checksum + complement) == 0xffff && (checksum != 0) && (complement != 0)) score += 4;
+
+  if(addr == 0x007fc0 && mapper == 0x20) score += 2;  //0x20 is usually LoROM
+  if(addr == 0x00ffc0 && mapper == 0x21) score += 2;  //0x21 is usually HiROM
+  if(addr == 0x007fc0 && mapper == 0x22) score += 2;  //0x22 is usually ExLoROM
+  if(addr == 0x40ffc0 && mapper == 0x25) score += 2;  //0x25 is usually ExHiROM
+
+  if(data[addr + Company] == 0x33) score += 2;        //0x33 indicates extended header
+  if(data[addr + RomType] < 0x08) score++;
+  if(data[addr + RomSize] < 0x10) score++;
+  if(data[addr + RamSize] < 0x08) score++;
+  if(data[addr + CartRegion] < 14) score++;
+
+  if(score < 0) score = 0;
+  return score;
+}
+
+#endif

src/cart/cart_loader.cpp

@@ -0,0 +1,244 @@
+#ifdef CART_CPP
+
+//================
+//Normal cartridge
+//================
+
+bool Cartridge::load_normal(const char *base) {
+  uint8_t *data;
+  unsigned size;
+  bool patch_applied;
+  cart.filename = base;
+
+  load_begin(ModeNormal);
+  if(load_image(base, data, size, patch_applied) == false) return false;
+
+  snes.config.path.current = basepath(cart.filename);
+  if(patch_applied) set(patched, true);
+
+  cartinfo_t cartinfo;
+  read_header(cartinfo, cart.rom = data, cart.rom_size = size);
+  set_cartinfo(cartinfo);
+
+  if(cartinfo.ram_size > 0) {
+    load_ram(get_filename(base, "srm", snes.config.path.save), cart.ram, cart.ram_size = cartinfo.ram_size, 0xff);
+  }
+
+  if(cartinfo.srtc || cartinfo.spc7110rtc) {
+    load_ram(get_filename(base, "rtc", snes.config.path.save), cart.rtc, cart.rtc_size = 20, 0x00);
+  }
+
+  load_end();
+  set(name, basename(base));
+  return true;
+}
+
+void Cartridge::unload_normal() {
+  if(cart.ram) save_file(get_filename(cart.filename, "srm", snes.config.path.save), cart.ram, cart.ram_size);
+  if(cart.rtc) save_file(get_filename(cart.filename, "rtc", snes.config.path.save), cart.rtc, cart.rtc_size);
+}
+
+//======================
+//BS-X slotted cartridge
+//======================
+
+bool Cartridge::load_bsx_slotted(const char *base, const char *slot) {
+  uint8_t *data;
+  unsigned size;
+  bool patch_applied;
+  cart.filename = base;
+  bs.filename = slot;
+
+  load_begin(ModeBsxSlotted);
+  if(load_image(base, data, size, patch_applied) == false) return false;
+
+  snes.config.path.current = basepath(cart.filename);
+  if(patch_applied) set(patched, true);
+
+  cartinfo_t cartinfo;
+  read_header(cartinfo, cart.rom = data, cart.rom_size = size);
+  set_cartinfo(cartinfo);
+
+  if(load_image(slot, data, size, patch_applied) == true) {
+    set(bsx_flash_loaded, true);
+    if(patch_applied) set(patched, true);
+    bs.ram = data;
+    bs.ram_size = size;
+  }
+
+  if(cartinfo.ram_size > 0) {
+    load_ram(get_filename(base, "srm", snes.config.path.save), cart.ram, cart.ram_size = cartinfo.ram_size, 0xff);
+  }
+
+  load_end();
+  string filename = basename(base);
+  if(*slot) filename << " + " << basename(slot);
+  set(name, filename);
+  return true;
+}
+
+void Cartridge::unload_bsx_slotted() {
+  if(cart.ram) save_file(get_filename(cart.filename, "srm", snes.config.path.save), cart.ram, cart.ram_size);
+}
+
+//====================
+//BS-X flash cartridge
+//====================
+
+bool Cartridge::load_bsx(const char *base, const char *slot) {
+  uint8_t *data;
+  unsigned size;
+  bool patch_applied;
+  cart.filename = base;
+  bs.filename = slot;
+
+  load_begin(ModeBsx);
+  if(load_image(base, data, size, patch_applied) == false) return false;
+
+  snes.config.path.current = basepath(cart.filename);
+  if(patch_applied) set(patched, true);
+
+  cartinfo_t cartinfo;
+  read_header(cartinfo, cart.rom = data, cart.rom_size = size);
+  set_cartinfo(cartinfo);
+
+  cart.ram = 0;
+  cart.ram_size = 0;
+
+  memset(bsxcart.sram.handle (), 0x00, bsxcart.sram.size ());
+  memset(bsxcart.psram.handle(), 0x00, bsxcart.psram.size());
+
+  if(load_file(get_filename(base, "srm", snes.config.path.save), data, size, CompressionNone) == true) {
+    memcpy(bsxcart.sram.handle (), data, min(bsxcart.sram.size (), size));
+    delete[] data;
+  }
+
+  if(load_file(get_filename(base, "psr", snes.config.path.save), data, size, CompressionNone) == true) {
+    memcpy(bsxcart.psram.handle(), data, min(bsxcart.psram.size(), size));
+    delete[] data;
+  }
+
+  if(load_image(slot, data, size, patch_applied)) {
+    set(bsx_flash_loaded, true);
+    if(patch_applied) set(patched, true);
+    bs.ram = data;
+    bs.ram_size = size;
+  }
+
+  load_end();
+  set(name, !*slot ? basename(base) : basename(slot));
+  return true;
+}
+
+void Cartridge::unload_bsx() {
+  save_file(get_filename(cart.filename, "srm", snes.config.path.save), bsxcart.sram.handle (), bsxcart.sram.size ());
+  save_file(get_filename(cart.filename, "psr", snes.config.path.save), bsxcart.psram.handle(), bsxcart.psram.size());
+}
+
+//============================
+//Sufami Turbo flash cartridge
+//============================
+
+bool Cartridge::load_sufami_turbo(const char *base, const char *slotA, const char *slotB) {
+  uint8_t *data;
+  unsigned size;
+  bool patch_applied;
+  cart.filename = base;
+  stA.filename = slotA;
+  stB.filename = slotB;
+
+  load_begin(ModeSufamiTurbo);
+  if(load_image(base, data, size, patch_applied) == false) return false;
+
+  snes.config.path.current = basepath(cart.filename);
+  if(patch_applied) set(patched, true);
+
+  cartinfo_t cartinfo;
+  read_header(cartinfo, cart.rom = data, cart.rom_size = size);
+  set_cartinfo(cartinfo);
+
+  if(load_image(slotA, data, size, patch_applied)) {
+    if(patch_applied) set(patched, true);
+    stA.rom = new(zeromemory) uint8_t[stA.rom_size = 0x100000];
+    memcpy(stA.rom, data, min(size, stA.rom_size));
+    delete[] data;
+
+    load_ram(get_filename(slotA, "srm", snes.config.path.save), stA.ram, stA.ram_size = 0x020000, 0xff);
+  }
+
+  if(load_image(slotB, data, size, patch_applied)) {
+    if(patch_applied) set(patched, true);
+    stB.rom = new(zeromemory) uint8_t[stB.rom_size = 0x100000];
+    memcpy(stB.rom, data, min(size, stB.rom_size));
+    delete[] data;
+
+    load_ram(get_filename(slotB, "srm", snes.config.path.save), stB.ram, stB.ram_size = 0x020000, 0xff);
+  }
+
+  load_end();
+  string filename;
+       if(!*slotA && !*slotB) filename << basename(base);
+  else if( *slotA && !*slotB) filename << basename(slotA);
+  else if(!*slotA &&  *slotB) filename << basename(slotB);
+  else filename << basename(slotA) << " + " << basename(slotB);
+  set(name, filename);
+  return true;
+}
+
+void Cartridge::unload_sufami_turbo() {
+  if(stA.ram) save_file(get_filename(stA.filename, "srm", snes.config.path.save), stA.ram, stA.ram_size);
+  if(stB.ram) save_file(get_filename(stB.filename, "srm", snes.config.path.save), stB.ram, stB.ram_size);
+}
+
+//=================
+//utility functions
+//=================
+
+Cartridge::Type Cartridge::detect_image_type(const char *filename) const {
+  uint8_t *data;
+  unsigned size;
+  bool patch_applied;
+  if(!load_image(filename, data, size, patch_applied)) return TypeUnknown;
+
+  cartinfo_t info;
+  read_header(info, data, size);
+  delete[] data;
+  return info.type;
+}
+
+bool Cartridge::load_image(const char *filename, uint8_t *&data, unsigned &size, bool &patched) const {
+  if(!filename || !*filename) return false;
+  if(!load_file(filename, data, size, CompressionAuto)) return false;
+
+  if((size & 0x7fff) == 512) {
+    //remove 512-byte header
+    memmove(data, data + 512, size -= 512);
+  }
+
+  uint8_t *pdata;
+  unsigned psize;
+  if(load_file(get_filename(filename, "ups", snes.config.path.patch), pdata, psize, CompressionInspect) == true) {
+    apply_patch(pdata, psize, data, size);
+    delete[] pdata;
+    patched = true;
+  } else {
+    patched = false;
+  }
+
+  return true;
+}
+
+bool Cartridge::load_ram(const char *filename, uint8_t *&data, unsigned size, uint8_t init) const {
+  data = new uint8_t[size];
+  memset(data, init, size);
+
+  uint8_t *savedata;
+  unsigned savesize;
+  if(load_file(filename, savedata, savesize, CompressionNone) == false) return false;
+
+  memcpy(data, savedata, min(size, savesize));
+  delete[] savedata;
+  return true;
+}
+
+#endif

src/cart/cart_normal.cpp

@@ -1,56 +0,0 @@
-void Cartridge::load_rom_normal() {
-uint size = 0;
-  for(int i = 0; i < file.count; i++) {
-    size += file.rom_size[i] - (((file.rom_size[i] & 0x7fff) == 512) ? 512 : 0);
-  }
-
-  info.rom_size = size;
-  rom = (uint8*)malloc(info.rom_size);
-  memset(rom, 0, info.rom_size);
-
-uint offset = 0;
-  for(int i = 0; i < file.count; i++) {
-  uint8 *data = file.rom_data[i] + (((file.rom_size[i] & 0x7fff) == 512) ? 512 : 0);
-  uint   size = file.rom_size[i] - (((file.rom_size[i] & 0x7fff) == 512) ? 512 : 0);
-    memcpy(rom + offset, data, size);
-    offset += size;
-    safe_free(file.rom_data[i]);
-  }
-
-  info.crc32 = crc32_calculate(rom, info.rom_size);
-
-  if(read_database() == true) {
-    info.header_index = 0xffc0;
-    info.mapper = PCB;
-    strcpy(info.name, dbi.name);
-    strcpy(info.pcb,  dbi.pcb);
-    info.region = NTSC;
-
-    info.rom_size = dbi.rom;
-    info.ram_size = dbi.ram;
-  } else {
-    find_header();
-    read_header();
-  }
-}
-
-void Cartridge::load_ram_normal() {
-  if(info.ram_size == 0) {
-    ram = 0;
-    return;
-  }
-
-  ram = (uint8*)malloc(info.ram_size);
-  memset(ram, 0xff, info.ram_size);
-
-  if(load_file(file.ram_name[0], file.ram_data[0], file.ram_size[0]) == true) {
-    memcpy(ram, file.ram_data[0], min(info.ram_size, file.ram_size[0]));
-    safe_free(file.ram_data[0]);
-  }
-}
-
-void Cartridge::save_ram_normal() {
-  if(info.ram_size == 0)return;
-
-  save_file(file.ram_name[0], ram, info.ram_size);
-}

src/cart/cart_st.cpp

@@ -1,45 +0,0 @@
-void Cartridge::load_rom_st() {
-uint8 *data;
-uint   size;
-string bios = config::file_updatepath("stbios.bin", config::path.bios);
-  info.rom_size = 0x200000;
-  rom = (uint8*)malloc(info.rom_size);
-  memset(rom, 0, info.rom_size);
-
-  load_file(strptr(bios), data, size);
-  memcpy(rom, data, min(size, 0x040000));
-  safe_free(data);
-
-  memcpy(rom + 0x100000, file.rom_data[0], min(file.rom_size[0], 0x100000));
-  safe_free(file.rom_data[0]);
-
-//
-  strcpy(info.name, "???");
-  strcpy(info.pcb,  "STC-SOLO");
-
-  info.mapper = PCB;
-  info.region = NTSC;
-
-  info.rom_size = 0x200000;
-  info.ram_size = 0x020000;
-//
-
-  info.crc32 = crc32_calculate(rom + 0x100000, file.rom_size[0]);
-  if(read_database() == true) {
-    strcpy(info.name, dbi.name);
-  }
-}
-
-void Cartridge::load_ram_st() {
-  ram = (uint8*)malloc(info.ram_size);
-  memset(ram, 0xff, info.ram_size);
-
-  if(load_file(file.ram_name[0], file.ram_data[0], file.ram_size[0]) == true) {
-    memcpy(ram, file.ram_data[0], min(file.ram_size[0], 0x020000));
-    safe_free(file.ram_data[0]);
-  }
-}
-
-void Cartridge::save_ram_st() {
-  save_file(file.ram_name[0], ram, 0x020000);
-}

src/cart/cart_stdual.cpp

@@ -1,66 +0,0 @@
-void Cartridge::load_rom_stdual() {
-uint8 *data;
-uint   size;
-string bios = config::file_updatepath("stbios.bin", config::path.bios);
-  info.rom_size = 0x300000;
-  rom = (uint8*)malloc(info.rom_size);
-  memset(rom, 0, info.rom_size);
-
-  load_file(strptr(bios), data, size);
-  memcpy(rom, data, min(size, 0x040000));
-  safe_free(data);
-
-  memcpy(rom + 0x100000, file.rom_data[0], min(file.rom_size[0], 0x100000));
-  safe_free(file.rom_data[0]);
-
-  memcpy(rom + 0x200000, file.rom_data[1], min(file.rom_size[1], 0x100000));
-  safe_free(file.rom_data[1]);
-
-char name_a[4096], name_b[4096];
-  strcpy(name_a, "???");
-  strcpy(name_b, "???");
-//
-  info.mapper = PCB;
-  info.region = NTSC;
-
-  info.rom_size = 0x300000;
-  info.ram_size = 0x040000;
-//
-
-  info.crc32 = crc32_calculate(rom + 0x100000, file.rom_size[0]);
-  if(read_database() == true) {
-    strcpy(name_a, dbi.name);
-  }
-
-  info.crc32 = crc32_calculate(rom + 0x200000, file.rom_size[1]);
-  if(read_database() == true) {
-    strcpy(name_b, dbi.name);
-  }
-
-//
-  info.crc32 = 0;
-  strcpy(info.name, name_a);
-  strcat(info.name, " + ");
-  strcat(info.name, name_b);
-  strcpy(info.pcb, "STC-DUAL");
-}
-
-void Cartridge::load_ram_stdual() {
-  ram = (uint8*)malloc(info.ram_size);
-  memset(ram, 0xff, info.ram_size);
-
-  if(load_file(file.ram_name[0], file.ram_data[0], file.ram_size[0]) == true) {
-    memcpy(ram + 0x000000, file.ram_data[0], min(file.ram_size[0], 0x020000));
-    safe_free(file.ram_data[0]);
-  }
-
-  if(load_file(file.ram_name[1], file.ram_data[1], file.ram_size[1]) == true) {
-    memcpy(ram + 0x020000, file.ram_data[1], min(file.ram_size[1], 0x020000));
-    safe_free(file.ram_data[1]);
-  }
-}
-
-void Cartridge::save_ram_stdual() {
-  save_file(file.ram_name[0], ram + 0x000000, 0x020000);
-  save_file(file.ram_name[1], ram + 0x020000, 0x020000);
-}

src/cart/database.cpp

@@ -1,37 +0,0 @@
-void Cartridge::load_database() {
-  database      = 0;
-  database_size = 0;
-
-FILE *fp;
-  fp = fopen("cart.db", "rb");
-  if(!fp)return;
-
-uint size = fsize(fp);
-  if(size < 8) {
-    fclose(fp);
-    return;
-  }
-
-  database = (uint8*)malloc(size);
-  fread(database, 1, size, fp);
-  fclose(fp);
-
-  database_blocksize = (database[6] << 0) | (database[7] << 8);
-  database_size      = (size - 8) / database_blocksize;
-}
-
-bool Cartridge::read_database() {
-uint i, crc32;
-  for(i = 0; i < database_size; i++) {
-  uint8 *p = database + 8 + (i * database_blocksize);
-    crc32  = *(p++) <<  0;
-    crc32 |= *(p++) <<  8;
-    crc32 |= *(p++) << 16;
-    crc32 |= *(p++) << 24;
-    if(crc32 == cartridge.info.crc32)break;
-  }
-  if(i >= database_size)return false;
-
-  db_read(dbi, database + 8 + (i * database_blocksize));
-  return true;
-}

src/cart/db/cartdb.txt

@@ -1,119 +0,0 @@
-[0xbb5c4238]
-name = "Bishoujo Senshi Sailor Moon Sailor Stars - Fuwa Fuwa Panic 2 (Japan)"
-pcb  = "STC-????"
-rom  =  8mbit
-ram  = 32kbit
-
-[0x8eb753f3]
-name = "Crayon Shin-chan - Nagagutsu Dobon!! (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0x7aedd703]
-name = "Der Langrisser (Japan) [!]"
-pcb  = "SHVC-1A3M-30"
-rom  = 16mbit
-ram  = 64kbit
-
-[0x19bdcb19]
-name = "Derby Stallion '96 (Japan) [!]"
-pcb  = "BSC-1A5M-01"
-rom  =  24mbit
-ram  = 256kbit
-
-[0x4296500d]
-name = "Gegege no Kitarou - Youkai Donjara (Japan)"
-pcb  = "STC-????"
-rom  =  4mbit
-ram  = 16kbit
-
-[0x14c66fca]
-name = "Gekisou Sentai Car Rangers (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0x32b2b3dd]
-name = "Poi Poi Ninja World (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0x9684526d]
-name = "Romancing SaGa (Japan) (V1.1) [!]"
-pcb  = "SHVC-1A3B-12"
-rom  =  8mbit
-ram  = 64kbit
-
-[0xafd74dcb]
-name = "SD Gundam Generation A - Ichinen Sensouki (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0x48ecae44]
-name = "SD Gundam Generation B - Grips Senki (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0x72b4235f]
-name = "SD Gundam Generation C - Axis Senki (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0x792d884c]
-name = "SD Gundam Generation D - Babylonia Kenkoku Senki (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0xefd3a865]
-name = "SD Gundam Generation E - Zanskar Senki (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0xc5dfa8fd]
-name = "SD Gundam Generation F - Colony Kakutouki (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0x43ad5a45]
-name = "SD Ultra Battle - Seven Densetsu (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0x04939d14]
-name = "SD Ultra Battle - Ultra Densetsu (Japan)"
-pcb  = "STC-????"
-rom  = 4mbit
-ram  = 8kbit
-
-[0xa5c0045e]
-name = "Secret of Evermore (USA) [!]"
-pcb  = "SHVC-1J3M-20"
-rom  = 32mbit
-ram  = 64kbit
-
-[0x5ebf7246]
-name = "Sound Novel Tsukuru (Japan) [!]"
-pcb  = "BSC-1A7M-10"
-rom  =  24mbit
-ram  = 512kbit
-
-[0xcf98ddaa]
-name = "Super Mario World 2: Yoshi's Island (USA)"
-pcb  = "SHVC-1CB5B-01"
-rom  =  16mbit
-ram  = 256kbit
-
-[0x64a91e64]
-name = "Wanderers from Ys (USA) [!]"
-pcb  = "SHVC-1A3B-12"
-rom  =  8mbit
-ram  = 64kbit

src/cart/db/cc.bat

@@ -1,3 +0,0 @@
-cl /nologo /O2 dbcreate.cpp
-@pause
-@del *.obj

src/cart/db/clean.bat

@@ -1 +0,0 @@
-@del *.exe

src/cart/db/create.bat

@@ -1,2 +0,0 @@
-dbcreate
-@copy cart.db ..\..\..\cart.db

src/cart/db/db.h

@@ -1,47 +0,0 @@
-struct db_item {
-  uint32 crc32;
-  char   name[128];
-  char   pcb [32];
-  uint32 rom;
-  uint32 ram;
-};
-
-void db_write(FILE *fp, db_item &dbi) {
-  fputc(dbi.crc32 >>  0, fp);
-  fputc(dbi.crc32 >>  8, fp);
-  fputc(dbi.crc32 >> 16, fp);
-  fputc(dbi.crc32 >> 24, fp);
-
-  fwrite(dbi.name, 1, 128, fp);
-  fwrite(dbi.pcb,  1,  32, fp);
-
-  fputc(dbi.rom >>  0, fp);
-  fputc(dbi.rom >>  8, fp);
-  fputc(dbi.rom >> 16, fp);
-  fputc(dbi.rom >> 24, fp);
-
-  fputc(dbi.ram >>  0, fp);
-  fputc(dbi.ram >>  8, fp);
-  fputc(dbi.ram >> 16, fp);
-  fputc(dbi.ram >> 24, fp);
-}
-
-void db_read(db_item &dbi, uint8 *data) {
-  dbi.crc32  = (*data++) <<  0;
-  dbi.crc32 |= (*data++) <<  8;
-  dbi.crc32 |= (*data++) << 16;
-  dbi.crc32 |= (*data++) << 24;
-
-  memcpy(dbi.name, data, 128); dbi.name[127] = 0; data += 128;
-  memcpy(dbi.pcb,  data,  32); dbi.pcb [ 31] = 0; data +=  32;
-
-  dbi.rom  = (*data++) <<  0;
-  dbi.rom |= (*data++) <<  8;
-  dbi.rom |= (*data++) << 16;
-  dbi.rom |= (*data++) << 24;
-
-  dbi.ram  = (*data++) <<  0;
-  dbi.ram |= (*data++) <<  8;
-  dbi.ram |= (*data++) << 16;
-  dbi.ram |= (*data++) << 24;
-}

src/cart/db/dbcreate.cpp

@@ -1,117 +0,0 @@
-#include "../../lib/libbase.h"
-#include "../../lib/libvector.h"
-#include "../../lib/libstring.h"
-
-#include "../../lib/libstring.cpp"
-
-#include "db.h"
-
-FILE *fp;
-
-uint decode_size(string &str) {
-//hex encoding
-  if(strbegin(str, "0x")) {
-    strltrim(str, "0x");
-    return strhex(str);
-  }
-
-//mbit encoding
-  if(strend(str, "mbit")) {
-    strrtrim(str, "mbit");
-    return strdec(str) * 1024 * 1024 / 8;
-  }
-
-//kbit encoding
-  if(strend(str, "kbit")) {
-    strrtrim(str, "kbit");
-    return strdec(str) * 1024 / 8;
-  }
-
-//decimal encoding
-  return strdec(str);
-}
-
-void build_block(string &block) {
-stringarray line, hashpart, part;
-  split(line, "\n", block);
-
-  if(strbegin(line[0], "[") == false) {
-    printf("error: invalid block detected: '%s'\n", strptr(line[0]));
-    return;
-  }
-
-  strltrim(line[0], "[");
-  strrtrim(line[0], "]");
-  replace(line[0], "0x", "");
-  split(hashpart, ",", line[0]);
-
-db_item dbi;
-  dbi.crc32 = 0;
- *dbi.name  = 0;
- *dbi.pcb   = 0;
-  dbi.rom   = 0;
-  dbi.ram   = 0;
-
-  for(int i = 1; i < count(line); i++) {
-  int pos = strpos(line[i], ";");
-    if(pos >= 0) {
-      strptr(line[i])[pos] = 0;
-    }
-
-    if(line[i] == "")continue;
-
-    split(part, "=", line[i]);
-    strunquote(part[1]);
-
-    if(part[0] == "name") {
-      strncpy(dbi.name, strptr(part[1]), 128);
-      dbi.name[128] = 0;
-    }
-
-    if(part[0] == "pcb") {
-      strncpy(dbi.pcb, strptr(part[1]), 32);
-      dbi.pcb[31] = 0;
-    }
-
-    if(part[0] == "rom") {
-      dbi.rom = decode_size(part[1]);
-    }
-
-    if(part[0] == "ram") {
-      dbi.ram = decode_size(part[1]);
-    }
-  }
-
-  for(int i = 0; i < count(hashpart); i++) {
-    dbi.crc32 = strhex(hashpart[i]);
-    db_write(fp, dbi);
-  }
-}
-
-void build_database() {
-stringarray data, block;
-  if(strfread(data, "cartdb.txt") == false)return;
-
-  fp = fopen("cart.db", "wb");
-  fprintf(fp, "SNESDB");
-
-uint blocksize = 4 + 128 + 32 + 4 + 4;
-  fputc(blocksize >> 0, fp);
-  fputc(blocksize >> 8, fp);
-
-  replace (data, "\r", "");
-  qreplace(data, " ",  "");
-  qreplace(data, "\t", "");
-  split(block, "\n\n", data);
-
-  for(int i = 0; i < count(block); i++) {
-    build_block(block[i]);
-  }
-
-  fclose(fp);
-}
-
-int main() {
-  build_database();
-  return 0;
-}

src/cc.bat

@@ -1,5 +1,3 @@
-::@make -r PLATFORM=win-mingw4-lui
-::@make -r PLATFORM=win-visualc-lui
-@make -r PLATFORM=win-visualc-lui GZIP_SUPPORT=true JMA_SUPPORT=true
-@move bsnes.exe ../bsnes.exe>nul
-@pause
+@mingw32-make platform=win compiler=mingw32-gcc
+::@mingw32-make platform=win compiler=mingw32-gcc enable_gzip=true enable_jma=true
+@pause

src/cc.sh

@@ -1,2 +1,2 @@
-#!/bin/sh
-make PLATFORM=x-gcc-lui
+make platform=x compiler=gcc
+#make platform=x compiler=gcc enable_gzip=true enable_jma=true

src/cheat/cheat.cpp

@@ -1,98 +1,352 @@
-#include "../base.h"
-#include "../reader/filereader.h"
+#include <../base.hpp>
 
 Cheat cheat;
 
-/*****
- * string <> binary code translation routines
- * decode() "7e1234:56" ->  0x7e123456
- * encode()  0x7e123456 -> "7e1234:56"
- *****/
+Cheat::cheat_t& Cheat::cheat_t::operator=(const Cheat::cheat_t& source) {
+  enabled = source.enabled;
+  code = source.code;
+  desc = source.desc;
+  count = source.count;
 
-bool Cheat::decode(char *str, uint32 &addr, uint8 &data, uint8 &type) {
-stringarray t, part;
-  strcpy(t, str);
+  addr.reset();
+  data.reset();
+  for(unsigned n = 0; n < count; n++) {
+    addr[n] = source.addr[n];
+    data[n] = source.data[n];
+  }
+
+  return *this;
+}
+
+//used to sort cheat code list by description
+bool Cheat::cheat_t::operator<(const Cheat::cheat_t& source) {
+  return strcmp(desc, source.desc) < 0;
+}
+
+//parse item ("0123-4567+89AB-CDEF"), return cheat_t item
+//return true if code is valid, false otherwise
+bool Cheat::decode(const char *s, Cheat::cheat_t &item) const {
+  item.enabled = false;
+  item.count = 0;
+
+  lstring list;
+  list.split("+", s);
+
+  for(unsigned n = 0; n < list.size(); n++) {
+    unsigned addr;
+    uint8_t data;
+    type_t type;
+    if(decode(list[n], addr, data, type) == false) return false;
+
+    item.addr[item.count] = addr;
+    item.data[item.count] = data;
+    item.count++;
+  }
+
+  return true;
+}
+
+//read() is used by MemBus::read() if Cheat::enabled(addr) returns true to look up cheat code.
+//returns true if cheat code was found, false if it was not.
+//when true, cheat code substitution value is stored in data.
+bool Cheat::read(unsigned addr, uint8_t &data) const {
+  addr = mirror_address(addr);
+  for(unsigned i = 0; i < code.size(); i++) {
+    if(enabled(i) == false) continue;
+
+    for(unsigned n = 0; n < code[i].count; n++) {
+      if(addr == mirror_address(code[i].addr[n])) {
+        data = code[i].data[n];
+        return true;
+      }
+    }
+  }
+
+  //code not found, or code is disabled
+  return false;
+}
+
+//==============
+//master control
+//==============
+
+//global cheat system enable/disable:
+//if disabled, *all* cheat codes are disabled;
+//otherwise only individually disabled codes are.
+
+bool Cheat::enabled() const {
+  return cheat_system_enabled;
+}
+
+void Cheat::enable() {
+  cheat_system_enabled = true;
+  cheat_enabled = (cheat_system_enabled && cheat_enabled_code_exists);
+}
+
+void Cheat::disable() {
+  cheat_system_enabled = false;
+  cheat_enabled = false;
+}
+
+//================================
+//cheat list manipulation routines
+//================================
+
+bool Cheat::add(bool enable, const char *code_, const char *desc_) {
+  cheat_t item;
+  if(decode(code_, item) == false) return false;
+
+  unsigned i = code.size();
+  code[i] = item;
+  code[i].enabled = enable;
+  code[i].desc = desc_;
+  code[i].code = code_;
+  encode_description(code[i].desc);
+  update(code[i]);
+
+  update_cheat_status();
+  return true;
+}
+
+bool Cheat::edit(unsigned i, bool enable, const char *code_, const char *desc_) {
+  cheat_t item;
+  if(decode(code_, item) == false) return false;
+
+  //disable current code and clear from code lookup table
+  code[i].enabled = false;
+  update(code[i]);
+
+  code[i] = item;
+  code[i].enabled = enable;
+  code[i].desc = desc_;
+  code[i].code = code_;
+  encode_description(code[i].desc);
+  update(code[i]);
+
+  update_cheat_status();
+  return true;
+}
+
+bool Cheat::remove(unsigned i) {
+  unsigned size = code.size();
+  if(i >= size) return false;  //also verifies size cannot be < 1
+
+  for(unsigned n = i; n < size - 1; n++) code[n] = code[n + 1];
+  code.resize(size - 1);
+
+  update_cheat_status();
+  return true;
+}
+
+bool Cheat::get(unsigned i, cheat_t &item) const {
+  if(i >= code.size()) return false;
+
+  item = code[i];
+  decode_description(item.desc);
+  return true;
+}
+
+//==============================
+//cheat status modifier routines
+//==============================
+
+bool Cheat::enabled(unsigned i) const {
+  return (i < code.size() ? code[i].enabled : false);
+}
+
+void Cheat::enable(unsigned i) {
+  if(i >= code.size()) return;
+
+  code[i].enabled = true;
+  update(code[i]);
+  update_cheat_status();
+}
+
+void Cheat::disable(unsigned i) {
+  if(i >= code.size()) return;
+
+  code[i].enabled = false;
+  update(code[i]);
+  update_cheat_status();
+}
+
+//===============================
+//cheat file load / save routines
+//
+//file format:
+//"description", status, nnnn-nnnn[+nnnn-nnnn...]\r\n
+//...
+//===============================
+
+bool Cheat::load(const char *fn) {
+  string data;
+  if(!data.readfile(fn)) return false;
+  data.replace("\r\n", "\n");
+  data.qreplace(" ", "");
+
+  lstring line;
+  line.split("\n", data);
+  for(unsigned i = 0; i < line.size(); i++) {
+    lstring part;
+    part.qsplit(",", line[i]);
+    if(part.size() != 3) continue;
+    trim(part[0], "\"");
+    add(part[1] == "enabled", /* code = */ part[2], /* desc = */ part[0]);
+  }
+
+  return true;
+}
+
+bool Cheat::save(const char *fn) const {
+  file fp;
+  if(!fp.open(fn, file::mode_write)) return false;
+  for(unsigned i = 0; i < code.size(); i++) {
+    fp.print(string()
+      << "\"" << code[i].desc << "\", "
+      << (code[i].enabled ? "enabled, " : "disabled, ")
+      << code[i].code << "\r\n");
+  }
+  fp.close();
+  return true;
+}
+
+void Cheat::clear() {
+  cheat_enabled_code_exists = false;
+  memset(mask, 0, 0x200000);
+  code.reset();
+}
+
+Cheat::Cheat() : cheat_system_enabled(true) {
+  clear();
+}
+
+//==================
+//internal functions
+//==================
+
+//string <> binary code translation routines
+//decode() "7e123456" -> 0x7e123456
+//encode() 0x7e123456 -> "7e123456"
+
+bool Cheat::decode(const char *s, unsigned &addr, uint8_t &data, type_t &type) const {
+  string t = s;
   strlower(t);
-  if(strlen(t) == 8 || (strlen(t) == 9 && strptr(t)[6] == ':')) {
-    type = CT_PRO_ACTION_REPLAY;
-    replace(t, ":", "");
-  uint32 r = strhex(t);
+
+  #define ischr(n) ((n >= '0' && n <= '9') || (n >= 'a' && n <= 'f'))
+
+  if(strlen(t) == 8 || (strlen(t) == 9 && t[6] == ':')) {
+    //strip ':'
+    if(strlen(t) == 9 && t[6] == ':') t = string() << substr(t, 0, 6) << substr(t, 7);
+    //validate input
+    for(unsigned i = 0; i < 8; i++) if(!ischr(t[i])) return false;
+
+    type = ProActionReplay;
+    unsigned r = strhex((const char*)t);
     addr = r >> 8;
     data = r & 0xff;
     return true;
-  } else if(strlen(t) == 9 && strptr(t)[4] == '-') {
-    type = CT_GAME_GENIE;
-    replace(t, "-", "");
+  } else if(strlen(t) == 9 && t[4] == '-') {
+    //strip '-'
+    t = string() << substr(t, 0, 4) << substr(t, 5);
+    //validate input
+    for(unsigned i = 0; i < 8; i++) if(!ischr(t[i])) return false;
+
+    type = GameGenie;
     strtr(t, "df4709156bc8a23e", "0123456789abcdef");
-  uint32 r = strhex(t);
-  //8421 8421 8421 8421 8421 8421
-  //abcd efgh ijkl mnop qrst uvwx
-  //ijkl qrst opab cduv wxef ghmn
-    addr = (!!(r & 0x002000) << 23) | (!!(r & 0x001000) << 22) |
-           (!!(r & 0x000800) << 21) | (!!(r & 0x000400) << 20) |
-           (!!(r & 0x000020) << 19) | (!!(r & 0x000010) << 18) |
-           (!!(r & 0x000008) << 17) | (!!(r & 0x000004) << 16) |
-           (!!(r & 0x800000) << 15) | (!!(r & 0x400000) << 14) |
-           (!!(r & 0x200000) << 13) | (!!(r & 0x100000) << 12) |
-           (!!(r & 0x000002) << 11) | (!!(r & 0x000001) << 10) |
-           (!!(r & 0x008000) <<  9) | (!!(r & 0x004000) <<  8) |
-           (!!(r & 0x080000) <<  7) | (!!(r & 0x040000) <<  6) |
-           (!!(r & 0x020000) <<  5) | (!!(r & 0x010000) <<  4) |
-           (!!(r & 0x000200) <<  3) | (!!(r & 0x000100) <<  2) |
-           (!!(r & 0x000080) <<  1) | (!!(r & 0x000040) <<  0);
+    unsigned r = strhex((const char*)t);
+    //8421 8421 8421 8421 8421 8421
+    //abcd efgh ijkl mnop qrst uvwx
+    //ijkl qrst opab cduv wxef ghmn
+    addr = (!!(r & 0x002000) << 23) | (!!(r & 0x001000) << 22)
+         | (!!(r & 0x000800) << 21) | (!!(r & 0x000400) << 20)
+         | (!!(r & 0x000020) << 19) | (!!(r & 0x000010) << 18)
+         | (!!(r & 0x000008) << 17) | (!!(r & 0x000004) << 16)
+         | (!!(r & 0x800000) << 15) | (!!(r & 0x400000) << 14)
+         | (!!(r & 0x200000) << 13) | (!!(r & 0x100000) << 12)
+         | (!!(r & 0x000002) << 11) | (!!(r & 0x000001) << 10)
+         | (!!(r & 0x008000) <<  9) | (!!(r & 0x004000) <<  8)
+         | (!!(r & 0x080000) <<  7) | (!!(r & 0x040000) <<  6)
+         | (!!(r & 0x020000) <<  5) | (!!(r & 0x010000) <<  4)
+         | (!!(r & 0x000200) <<  3) | (!!(r & 0x000100) <<  2)
+         | (!!(r & 0x000080) <<  1) | (!!(r & 0x000040) <<  0);
     data = r >> 24;
     return true;
+  } else {
+    return false;
   }
-  return false;
 }
 
-bool Cheat::encode(char *str, uint32 addr, uint8 data, uint8 type) {
-  if(type == CT_PRO_ACTION_REPLAY) {
-    sprintf(str, "%0.6x:%0.2x", addr, data);
+bool Cheat::encode(string &s, unsigned addr, uint8_t data, type_t type) const {
+  char t[16];
+
+  if(type == ProActionReplay) {
+    sprintf(t, "%.6x%.2x", addr, data);
+    s = t;
     return true;
-  } else if(type == CT_GAME_GENIE) {
-  uint32 r = addr;
-    addr = (!!(r & 0x008000) << 23) | (!!(r & 0x004000) << 22) |
-           (!!(r & 0x002000) << 21) | (!!(r & 0x001000) << 20) |
-           (!!(r & 0x000080) << 19) | (!!(r & 0x000040) << 18) |
-           (!!(r & 0x000020) << 17) | (!!(r & 0x000010) << 16) |
-           (!!(r & 0x000200) << 15) | (!!(r & 0x000100) << 14) |
-           (!!(r & 0x800000) << 13) | (!!(r & 0x400000) << 12) |
-           (!!(r & 0x200000) << 11) | (!!(r & 0x100000) << 10) |
-           (!!(r & 0x000008) <<  9) | (!!(r & 0x000004) <<  8) |
-           (!!(r & 0x000002) <<  7) | (!!(r & 0x000001) <<  6) |
-           (!!(r & 0x080000) <<  5) | (!!(r & 0x040000) <<  4) |
-           (!!(r & 0x020000) <<  3) | (!!(r & 0x010000) <<  2) |
-           (!!(r & 0x000800) <<  1) | (!!(r & 0x000400) <<  0);
-    sprintf(str, "%0.2x%0.2x-%0.4x", data, addr >> 16, addr & 0xffff);
-    strtr(str, "0123456789abcdef", "df4709156bc8a23e");
+  } else if(type == GameGenie) {
+    unsigned r = addr;
+    addr = (!!(r & 0x008000) << 23) | (!!(r & 0x004000) << 22)
+         | (!!(r & 0x002000) << 21) | (!!(r & 0x001000) << 20)
+         | (!!(r & 0x000080) << 19) | (!!(r & 0x000040) << 18)
+         | (!!(r & 0x000020) << 17) | (!!(r & 0x000010) << 16)
+         | (!!(r & 0x000200) << 15) | (!!(r & 0x000100) << 14)
+         | (!!(r & 0x800000) << 13) | (!!(r & 0x400000) << 12)
+         | (!!(r & 0x200000) << 11) | (!!(r & 0x100000) << 10)
+         | (!!(r & 0x000008) <<  9) | (!!(r & 0x000004) <<  8)
+         | (!!(r & 0x000002) <<  7) | (!!(r & 0x000001) <<  6)
+         | (!!(r & 0x080000) <<  5) | (!!(r & 0x040000) <<  4)
+         | (!!(r & 0x020000) <<  3) | (!!(r & 0x010000) <<  2)
+         | (!!(r & 0x000800) <<  1) | (!!(r & 0x000400) <<  0);
+    sprintf(t, "%.2x%.2x-%.4x", data, addr >> 16, addr & 0xffff);
+    strtr(t, "0123456789abcdef", "df4709156bc8a23e");
+    s = t;
     return true;
+  } else {
+    return false;
   }
-  return false;
 }
 
-/*****
- * address lookup table manipulation and mirroring
- * mirror_address() 0x000000 -> 0x7e0000
- * set() enable specified address, mirror accordingly
- * clear() disable specified address, mirror accordingly
- *****/
+//speed up S-CPU memory reads by disabling cheat code lookup when either:
+//a) cheat system is disabled by user, or b) no enabled cheat codes exist
+void Cheat::update_cheat_status() {
+  for(unsigned i = 0; i < code.size(); i++) {
+    if(code[i].enabled) {
+      cheat_enabled_code_exists = true;
+      cheat_enabled = (cheat_system_enabled && cheat_enabled_code_exists);
+      return;
+    }
+  }
+  cheat_enabled_code_exists = false;
+  cheat_enabled = false;
+}
 
-uint Cheat::mirror_address(uint addr) {
-  if((addr & 0x40e000) != 0x0000)return addr;
-//8k WRAM mirror
-//$[00-3f|80-bf]:[0000-1fff] -> $7e:[0000-1fff]
+//address lookup table manipulation and mirroring
+//mirror_address() 0x000000 -> 0x7e0000
+//set() enable specified address, mirror accordingly
+//clear() disable specified address, mirror accordingly
+unsigned Cheat::mirror_address(unsigned addr) const {
+  if((addr & 0x40e000) != 0x0000) return addr;
+  //8k WRAM mirror
+  //$[00-3f|80-bf]:[0000-1fff] -> $7e:[0000-1fff]
   return (0x7e0000 + (addr & 0x1fff));
 }
 
-void Cheat::set(uint32 addr) {
+//updates mask[] table enabled bits;
+//must be called after modifying item.enabled state.
+void Cheat::update(const cheat_t &item) {
+  for(unsigned n = 0; n < item.count; n++) {
+    (item.enabled) ? set(item.addr[n]) : clear(item.addr[n]);
+  }
+}
+
+void Cheat::set(unsigned addr) {
   addr = mirror_address(addr);
 
   mask[addr >> 3] |= 1 << (addr & 7);
   if((addr & 0xffe000) == 0x7e0000) {
-  //mirror $7e:[0000-1fff] to $[00-3f|80-bf]:[0000-1fff]
-  uint mirror;
-    for(int x = 0; x <= 0x3f; x++) {
+    //mirror $7e:[0000-1fff] to $[00-3f|80-bf]:[0000-1fff]
+    unsigned mirror;
+    for(unsigned x = 0; x <= 0x3f; x++) {
       mirror = ((0x00 + x) << 16) + (addr & 0x1fff);
       mask[mirror >> 3] |= 1 << (mirror & 7);
       mirror = ((0x80 + x) << 16) + (addr & 0x1fff);
@@ -101,20 +355,20 @@ void Cheat::set(uint32 addr) {
   }
 }
 
-void Cheat::clear(uint32 addr) {
+void Cheat::clear(unsigned addr) {
   addr = mirror_address(addr);
 
-//is there more than one cheat code using the same address
-//(and likely a different override value) that is enabled?
-//if so, do not clear code lookup table entry for this address.
-uint8 r;
-  if(read(addr, r) == true)return;
+  //if there is more than one cheat code using the same address,
+  //(eg with a different override value) then do not clear code
+  //lookup table entry.
+  uint8_t r;
+  if(read(addr, r) == true) return;
 
   mask[addr >> 3] &= ~(1 << (addr & 7));
   if((addr & 0xffe000) == 0x7e0000) {
-  //mirror $7e:[0000-1fff] to $[00-3f|80-bf]:[0000-1fff]
-  uint mirror;
-    for(int x = 0; x <= 0x3f; x++) {
+    //mirror $7e:[0000-1fff] to $[00-3f|80-bf]:[0000-1fff]
+    unsigned mirror;
+    for(unsigned x = 0; x <= 0x3f; x++) {
       mirror = ((0x00 + x) << 16) + (addr & 0x1fff);
       mask[mirror >> 3] &= ~(1 << (mirror & 7));
       mirror = ((0x80 + x) << 16) + (addr & 0x1fff);
@@ -123,217 +377,16 @@ uint8 r;
   }
 }
 
-/*****
- * read() is used by MemBus::read() if Cheat::enabled(addr)
- * returns true to look up cheat code.
- * returns true if cheat code was found, false if it was not.
- * when true, cheat code substitution value is stored in data.
- *****/
+//these two functions are used to safely store description text inside .cfg file format.
 
-bool Cheat::read(uint32 addr, uint8 &data) {
-  addr = mirror_address(addr);
-  for(int i = 0; i < cheat_count; i++) {
-    if(enabled(i) == false)continue;
-    if(addr == mirror_address(index[i].addr)) {
-      data = index[i].data;
-      return true;
-    }
-  }
-//code not found, or code is disabled
-  return false;
+string& Cheat::encode_description(string &desc) const {
+  desc.replace("\"", "\\q");
+  desc.replace("\n", "\\n");
+  return desc;
 }
 
-/*****
- * update_cheat_status() will scan to see if any codes are
- * enabled. if any are, make sure the cheat system is on.
- * otherwise, turn cheat system off to speed up emulation.
- *****/
-void Cheat::update_cheat_status() {
-  for(int i = 0; i < cheat_count; i++) {
-    if(index[i].enabled) {
-      cheat_enabled = true;
-      return;
-    }
-  }
-  cheat_enabled = false;
-}
-
-/*****
- * cheat list manipulation routines
- *****/
-
-bool Cheat::add(bool enable, char *code, char *desc) {
-  if(cheat_count >= CHEAT_LIMIT)return false;
-
-uint32 addr, len;
-uint8  data, type;
-  if(decode(code, addr, data, type) == false)return false;
-
-  index[cheat_count].enabled = enable;
-  index[cheat_count].addr = addr;
-  index[cheat_count].data = data;
-  len = strlen(code);
-  len = len > 16 ? 16 : len;
-  memcpy(index[cheat_count].code, code, len);
-  index[cheat_count].code[len] = 0;
-  len = strlen(desc);
-  len = len > 128 ? 128 : len;
-  memcpy(index[cheat_count].desc, desc, len);
-  index[cheat_count].desc[len] = 0;
-  cheat_count++;
-  (enable) ? set(addr) : clear(addr);
-
-  update_cheat_status();
-  return true;
-}
-
-bool Cheat::edit(uint32 n, bool enable, char *code, char *desc) {
-  if(n >= cheat_count)return false;
-
-uint32 addr, len;
-uint8  data, type;
-  if(decode(code, addr, data, type) == false)return false;
-
-//disable current code and clear from code lookup table
-  index[n].enabled = false;
-  clear(index[n].addr);
-
-//update code and enable in code lookup table
-  index[n].enabled = enable;
-  index[n].addr = addr;
-  index[n].data = data;
-  len = strlen(code);
-  len = len > 16 ? 16 : len;
-  memcpy(index[n].code, code, len);
-  index[n].code[len] = 0;
-  len = strlen(desc);
-  len = len > 128 ? 128 : len;
-  memcpy(index[n].desc, desc, len);
-  index[n].desc[len] = 0;
-  set(addr);
-
-  update_cheat_status();
-  return true;
-}
-
-bool Cheat::remove(uint32 n) {
-  if(n >= cheat_count)return false;
-
-  for(int i = n; i < cheat_count; i++) {
-    index[i].enabled = index[i + 1].enabled;
-    index[i].addr    = index[i + 1].addr;
-    index[i].data    = index[i + 1].data;
-    strcpy(index[i].desc, index[i + 1].desc);
-  }
-
-  cheat_count--;
-
-  update_cheat_status();
-  return true;
-}
-
-bool Cheat::get(uint32 n, bool &enable, uint32 &addr, uint8 &data, char *code, char *desc) {
-  if(n >= cheat_count)return false;
-  enable = index[n].enabled;
-  addr   = index[n].addr;
-  data   = index[n].data;
-  strcpy(code, index[n].code);
-  strcpy(desc, index[n].desc);
-  return true;
-}
-
-/*****
- * code status modifier routines
- *****/
-
-bool Cheat::enabled(uint32 n) {
-  if(n >= cheat_count)return false;
-  return index[n].enabled;
-}
-
-void Cheat::enable(uint32 n) {
-  if(n >= cheat_count)return;
-  index[n].enabled = true;
-  set(index[n].addr);
-  update_cheat_status();
-}
-
-void Cheat::disable(uint32 n) {
-  if(n >= cheat_count)return;
-  index[n].enabled = false;
-  clear(index[n].addr);
-  update_cheat_status();
-}
-
-/*****
- * cheat file manipulation routines
- *****/
-
-bool Cheat::load(const char *fn) {
-FileReader rf(fn);
-  if(!rf.ready())return false;
-
-uint8 *raw_data = rf.read();
-stringarray data, line;
-  raw_data[rf.size()] = 0;
-  strcpy(data, (char*)raw_data);
-  safe_free(raw_data);
-  replace(data, "\r\n", "\n");
-
-  split(line, "\n", data);
-  for(int i = 0; i < ::count(line); i++) {
-  stringarray part;
-  uint8  en = *(strptr(line[i]));
-    if(en == '+') {
-      strltrim(line[i], "+");
-    } else if(en == '-') {
-      strltrim(line[i], "-");
-    } else {
-      continue;
-    }
-    qreplace(line[i], " ", "");
-    qsplit(part, ",", line[i]);
-    if(::count(part) != 2)continue;
-    strunquote(part[1]);
-    add(en == '+', strptr(part[0]), strptr(part[1]));
-  }
-
-  return true;
-}
-
-bool Cheat::save(const char *fn) {
-FileWriter wf(fn);
-  if(!wf.ready())return false;
-
-string data;
-char   t[4096];
-  strcpy(data, "");
-  for(int i = 0; i < cheat_count; i++) {
-    sprintf(t, "%c%s, \"%s\"\r\n", index[i].enabled ? '+' : '-', index[i].code, index[i].desc);
-    strcat(data, t);
-  }
-
-  wf.write((uint8*)strptr(data), strlen(data));
-  return true;
-}
-
-/*****
- * initialization routines
- *****/
-
-void Cheat::clear() {
-  cheat_enabled = false;
-  cheat_count   = 0;
-  memset(mask, 0, 0x200000);
-  for(int i = 0; i < CHEAT_LIMIT + 1; i++) {
-    index[i].enabled = false;
-    index[i].addr    = 0x000000;
-    index[i].data    = 0x00;
-    strcpy(index[i].code, "");
-    strcpy(index[i].desc, "");
-  }
-}
-
-Cheat::Cheat() {
-  clear();
+string& Cheat::decode_description(string &desc) const {
+  desc.replace("\\q", "\"");
+  desc.replace("\\n", "\n");
+  return desc;
 }

src/cheat/cheat.h

@@ -1,48 +0,0 @@
-#define CHEAT_LIMIT 1024
-
-class Cheat {
-public:
-enum { CT_PRO_ACTION_REPLAY, CT_GAME_GENIE };
-
-struct CheatIndex {
-  bool   enabled;
-  uint32 addr;
-  uint8  data;
-  char   code[ 16 + 1];
-  char   desc[128 + 1];
-} index[CHEAT_LIMIT + 1];
-bool   cheat_enabled;
-uint32 cheat_count;
-uint8  mask[0x200000];
-
-  inline bool enabled() { return cheat_enabled; }
-  inline uint count() { return cheat_count; }
-  inline bool exists(uint32 addr) { return bool(mask[addr >> 3] & 1 << (addr & 7)); }
-
-  bool  decode(char *str, uint32 &addr, uint8 &data, uint8 &type);
-  bool  encode(char *str, uint32  addr, uint8  data, uint8  type);
-
-private:
-  uint  mirror_address(uint addr);
-  void  set(uint32 addr);
-  void  clear(uint32 addr);
-public:
-
-  bool  read(uint32 addr, uint8 &data);
-
-  void  update_cheat_status();
-  bool  add(bool enable, char *code, char *desc);
-  bool  edit(uint32 n, bool enable, char *code, char *desc);
-  bool  get(uint32 n, bool &enable, uint32 &addr, uint8 &data, char *code, char *desc);
-  bool  remove (uint32 n);
-  bool  enabled(uint32 n);
-  void  enable (uint32 n);
-  void  disable(uint32 n);
-  bool  load(const char *fn);
-  bool  save(const char *fn);
-  void  clear();
-
-  Cheat();
-};
-
-extern Cheat cheat;

src/cheat/cheat.hpp

@@ -0,0 +1,69 @@
+class Cheat {
+public:
+  enum type_t {
+    ProActionReplay,
+    GameGenie,
+  };
+
+  struct cheat_t {
+    bool enabled;
+    string code;
+    string desc;
+
+    unsigned count;
+    array<unsigned> addr;
+    array<uint8_t> data;
+
+    cheat_t& operator=(const cheat_t&);
+    bool operator<(const cheat_t&);
+  };
+
+  bool decode(const char *s, cheat_t &item) const;
+  bool read(unsigned addr, uint8_t &data) const;
+
+  bool enabled() const;
+  void enable();
+  void disable();
+
+  inline unsigned count() const { return code.size(); }
+  inline bool active() const { return cheat_enabled; }
+  inline bool exists(unsigned addr) const { return mask[addr >> 3] & 1 << (addr & 7); }
+
+  bool add(bool enable, const char *code, const char *desc);
+  bool edit(unsigned i, bool enable, const char *code, const char *desc);
+  bool remove(unsigned i);
+  bool get(unsigned i, cheat_t &item) const;
+
+  bool enabled(unsigned i) const;
+  void enable(unsigned i);
+  void disable(unsigned i);
+
+  bool load(const char *fn);
+  bool save(const char *fn) const;
+  void clear();
+
+  Cheat();
+
+private:
+  bool cheat_enabled;  //cheat_enabled == (cheat_enabled_code_exists && cheat_system_enabled);
+  bool cheat_enabled_code_exists;
+  bool cheat_system_enabled;
+
+  uint8_t mask[0x200000];
+  vector<cheat_t> code;
+
+  bool decode(const char *str, unsigned &addr, uint8_t &data, type_t &type) const;
+  bool encode(string &str, unsigned addr, uint8_t data, type_t type) const;
+
+  void update_cheat_status();
+  unsigned mirror_address(unsigned addr) const;
+
+  void update(const cheat_t& item);
+  void set(unsigned addr);
+  void clear(unsigned addr);
+
+  string& encode_description(string &desc) const;
+  string& decode_description(string &desc) const;
+};
+
+extern Cheat cheat;

src/chip/bsx/bsx.cpp

@@ -0,0 +1,8 @@
+#include <../base.hpp>
+#include <../cart/cart.hpp>
+#define BSX_CPP
+
+#include "bsx.hpp"
+#include "bsx_base.cpp"
+#include "bsx_cart.cpp"
+#include "bsx_flash.cpp"

src/chip/bsx/bsx.hpp

@@ -0,0 +1,77 @@
+class BSXBase : public MMIO {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 mmio_read(unsigned addr);
+  void mmio_write(unsigned addr, uint8 data);
+
+private:
+  struct {
+    uint8 r2188, r2189, r218a, r218b;
+    uint8 r218c, r218d, r218e, r218f;
+    uint8 r2190, r2191, r2192, r2193;
+    uint8 r2194, r2195, r2196, r2197;
+    uint8 r2198, r2199, r219a, r219b;
+    uint8 r219c, r219d, r219e, r219f;
+
+    uint8 r2192_counter;
+    uint8 r2192_hour, r2192_minute, r2192_second;
+  } regs;
+};
+
+class BSXCart : public MMIO {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 mmio_read(unsigned addr);
+  void mmio_write(unsigned addr, uint8 data);
+
+  MappedRAM sram;
+  MappedRAM psram;
+
+  BSXCart();
+  ~BSXCart();
+
+private:
+  uint8 *sram_data;  //256kbit SRAM
+  uint8 *psram_data; //  4mbit PSRAM
+
+  struct {
+    uint8 r[16];
+  } regs;
+
+  void update_memory_map();
+};
+
+class BSXFlash : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  unsigned size();
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+
+private:
+  struct {
+    unsigned command;
+    uint8 write_old;
+    uint8 write_new;
+
+    bool flash_enable;
+    bool read_enable;
+    bool write_enable;
+  } regs;
+};
+
+extern BSXBase  bsxbase;
+extern BSXCart  bsxcart;
+extern BSXFlash bsxflash;

src/chip/bsx/bsx_base.cpp

@@ -0,0 +1,137 @@
+#ifdef BSX_CPP
+
+void BSXBase::init() {
+}
+
+void BSXBase::enable() {
+  for(uint16 i = 0x2188; i <= 0x219f; i++) memory::mmio.map(i, *this);
+}
+
+void BSXBase::power() {
+  reset();
+}
+
+void BSXBase::reset() {
+  memset(&regs, 0x00, sizeof regs);
+}
+
+uint8 BSXBase::mmio_read(unsigned addr) {
+  addr &= 0xffff;
+
+  switch(addr) {
+    case 0x2188: return regs.r2188;
+    case 0x2189: return regs.r2189;
+    case 0x218a: return regs.r218a;
+    case 0x218c: return regs.r218c;
+    case 0x218e: return regs.r218e;
+    case 0x218f: return regs.r218f;
+    case 0x2190: return regs.r2190;
+
+    case 0x2192: {
+      unsigned counter = regs.r2192_counter++;
+      if(regs.r2192_counter >= 18) regs.r2192_counter = 0;
+
+      if(counter == 0) {
+      time_t rawtime;
+        time(&rawtime);
+      tm *t = localtime(&rawtime);
+
+        regs.r2192_hour   = t->tm_hour;
+        regs.r2192_minute = t->tm_min;
+        regs.r2192_second = t->tm_sec;
+      }
+
+      switch(counter) {
+        case  0: return 0x00; //???
+        case  1: return 0x00; //???
+        case  2: return 0x00; //???
+        case  3: return 0x00; //???
+        case  4: return 0x00; //???
+        case  5: return 0x01;
+        case  6: return 0x01;
+        case  7: return 0x00;
+        case  8: return 0x00;
+        case  9: return 0x00;
+        case 10: return regs.r2192_second;
+        case 11: return regs.r2192_minute;
+        case 12: return regs.r2192_hour;
+        case 13: return 0x00; //???
+        case 14: return 0x00; //???
+        case 15: return 0x00; //???
+        case 16: return 0x00; //???
+        case 17: return 0x00; //???
+      }
+    } break;
+
+    case 0x2193: return regs.r2193 & ~0x0c;
+    case 0x2194: return regs.r2194;
+    case 0x2196: return regs.r2196;
+    case 0x2197: return regs.r2197;
+    case 0x2199: return regs.r2199;
+  }
+
+  return cpu.regs.mdr;
+}
+
+void BSXBase::mmio_write(unsigned addr, uint8 data) {
+  addr &= 0xffff;
+
+  switch(addr) {
+    case 0x2188: {
+      regs.r2188 = data;
+    } break;
+
+    case 0x2189: {
+      regs.r2189 = data;
+    } break;
+
+    case 0x218a: {
+      regs.r218a = data;
+    } break;
+
+    case 0x218b: {
+      regs.r218b = data;
+    } break;
+
+    case 0x218c: {
+      regs.r218c = data;
+    } break;
+
+    case 0x218e: {
+      regs.r218e = data;
+    } break;
+
+    case 0x218f: {
+      regs.r218e >>= 1;
+      regs.r218e = regs.r218f - regs.r218e;
+      regs.r218f >>= 1;
+    } break;
+
+    case 0x2191: {
+      regs.r2191 = data;
+      regs.r2192_counter = 0;
+    } break;
+
+    case 0x2192: {
+      regs.r2190 = 0x80;
+    } break;
+
+    case 0x2193: {
+      regs.r2193 = data;
+    } break;
+
+    case 0x2194: {
+      regs.r2194 = data;
+    } break;
+
+    case 0x2197: {
+      regs.r2197 = data;
+    } break;
+
+    case 0x2199: {
+      regs.r2199 = data;
+    } break;
+  }
+}
+
+#endif

src/chip/bsx/bsx_cart.cpp

@@ -0,0 +1,99 @@
+#ifdef BSX_CPP
+
+void BSXCart::init() {
+}
+
+void BSXCart::enable() {
+  for(uint16 i = 0x5000; i <= 0x5fff; i++) memory::mmio.map(i, *this);
+}
+
+void BSXCart::power() {
+  reset();
+}
+
+void BSXCart::reset() {
+  for(unsigned i = 0; i < 16; i++) regs.r[i] = 0x00;
+  regs.r[0x07] = 0x80;
+  regs.r[0x08] = 0x80;
+
+  update_memory_map();
+}
+
+void BSXCart::update_memory_map() {
+  Memory &cart = (regs.r[0x01] & 0x80) == 0x00 ? (Memory&)bsxflash : (Memory&)psram;
+
+  if((regs.r[0x02] & 0x80) == 0x00) { //LoROM mapping
+    bus.map(Bus::MapLinear, 0x00, 0x7d, 0x8000, 0xffff, cart);
+    bus.map(Bus::MapLinear, 0x80, 0xff, 0x8000, 0xffff, cart);
+  } else { //HiROM mapping
+    bus.map(Bus::MapShadow, 0x00, 0x3f, 0x8000, 0xffff, cart);
+    bus.map(Bus::MapLinear, 0x40, 0x7d, 0x0000, 0xffff, cart);
+    bus.map(Bus::MapShadow, 0x80, 0xbf, 0x8000, 0xffff, cart);
+    bus.map(Bus::MapLinear, 0xc0, 0xff, 0x0000, 0xffff, cart);
+  }
+
+  if(regs.r[0x03] & 0x80) {
+    bus.map(Bus::MapLinear, 0x60, 0x6f, 0x0000, 0xffff, psram);
+  //bus.map(Bus::MapLinear, 0x70, 0x77, 0x0000, 0xffff, psram);
+  }
+
+  if((regs.r[0x05] & 0x80) == 0x00) {
+    bus.map(Bus::MapLinear, 0x40, 0x4f, 0x0000, 0xffff, psram);
+  }
+
+  if((regs.r[0x06] & 0x80) == 0x00) {
+    bus.map(Bus::MapLinear, 0x50, 0x5f, 0x0000, 0xffff, psram);
+  }
+
+  if(regs.r[0x07] & 0x80) {
+    bus.map(Bus::MapLinear, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom);
+  }
+
+  if(regs.r[0x08] & 0x80) {
+    bus.map(Bus::MapLinear, 0x80, 0x9f, 0x8000, 0xffff, memory::cartrom);
+  }
+
+  bus.map(Bus::MapShadow, 0x20, 0x3f, 0x6000, 0x7fff, psram);
+  bus.map(Bus::MapLinear, 0x70, 0x77, 0x0000, 0xffff, psram);
+}
+
+uint8 BSXCart::mmio_read(unsigned addr) {
+  if((addr & 0xf0ffff) == 0x005000) { //$[00-0f]:5000 MMIO
+    uint8 n = (addr >> 16) & 15;
+    return regs.r[n];
+  }
+
+  if((addr & 0xf8f000) == 0x105000) { //$[10-17]:[5000-5fff] SRAM
+    return sram.read(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff));
+  }
+
+  return 0x00;
+}
+
+void BSXCart::mmio_write(unsigned addr, uint8 data) {
+  if((addr & 0xf0ffff) == 0x005000) { //$[00-0f]:5000 MMIO
+    uint8 n = (addr >> 16) & 15;
+    regs.r[n] = data;
+    if(n == 0x0e && data & 0x80) update_memory_map();
+    return;
+  }
+
+  if((addr & 0xf8f000) == 0x105000) { //$[10-17]:[5000-5fff] SRAM
+    return sram.write(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff), data);
+  }
+}
+
+BSXCart::BSXCart() {
+  sram_data  = new uint8_t[ 32 * 1024];
+  psram_data = new uint8_t[512 * 1024];
+
+  sram.map (sram_data,   32 * 1024);
+  psram.map(psram_data, 512 * 1024);
+}
+
+BSXCart::~BSXCart() {
+  delete[] sram_data;
+  delete[] psram_data;
+}
+
+#endif

src/chip/bsx/bsx_flash.cpp

@@ -0,0 +1,113 @@
+#ifdef BSX_CPP
+
+void BSXFlash::init() {}
+void BSXFlash::enable() {}
+
+void BSXFlash::power() {
+  reset();
+}
+
+void BSXFlash::reset() {
+  regs.command   = 0;
+  regs.write_old = 0x00;
+  regs.write_new = 0x00;
+
+  regs.flash_enable = false;
+  regs.read_enable  = false;
+  regs.write_enable = false;
+}
+
+unsigned BSXFlash::size() {
+  return memory::bscram.size();
+}
+
+uint8 BSXFlash::read(unsigned addr) {
+  if(addr == 0x0002) {
+    if(regs.flash_enable) return 0x80;
+  }
+
+  if(addr == 0x5555) {
+    if(regs.flash_enable) return 0x80;
+  }
+
+  if(regs.read_enable && addr >= 0xff00 && addr <= 0xff13) {
+  //read flash cartridge vendor information
+    switch(addr - 0xff00) {
+      case 0x00: return 0x4d;
+      case 0x01: return 0x00;
+      case 0x02: return 0x50;
+      case 0x03: return 0x00;
+      case 0x04: return 0x00;
+      case 0x05: return 0x00;
+      case 0x06: return 0x2a; //0x2a = 8mbit, 0x2b = 16mbit (not known to exist, though BIOS recognizes ID)
+      case 0x07: return 0x00;
+      default:   return 0x00;
+    }
+  }
+
+  return memory::bscram.read(addr);
+}
+
+void BSXFlash::write(unsigned addr, uint8 data) {
+//there exist both read-only and read-write BS-X flash cartridges ...
+//unfortunately, the vendor info is not stored inside memory dumps
+//of BS-X flashcarts, so it is impossible to determine whether a
+//given flashcart is writeable.
+//however, it has been observed that LoROM-mapped BS-X carts always
+//use read-write flashcarts, and HiROM-mapped BS-X carts always use
+//read-only flashcarts.
+//below is an unfortunately necessary workaround to this problem.
+  if(cartridge.mapper() == Cartridge::BSCHiROM) return;
+
+  if((addr & 0xff0000) == 0) {
+    regs.write_old = regs.write_new;
+    regs.write_new = data;
+
+    if(regs.write_enable && regs.write_old == regs.write_new) {
+      return memory::bscram.write(addr, data);
+    }
+  } else {
+    if(regs.write_enable) {
+      return memory::bscram.write(addr, data);
+    }
+  }
+
+  if(addr == 0x0000) {
+    regs.command <<= 8;
+    regs.command  |= data;
+
+    if((regs.command & 0xffff) == 0x38d0) {
+      regs.flash_enable = true;
+      regs.read_enable  = true;
+    }
+  }
+
+  if(addr == 0x2aaa) {
+    regs.command <<= 8;
+    regs.command  |= data;
+  }
+
+  if(addr == 0x5555) {
+    regs.command <<= 8;
+    regs.command  |= data;
+
+    if((regs.command & 0xffffff) == 0xaa5570) {
+      regs.write_enable = false;
+    }
+
+    if((regs.command & 0xffffff) == 0xaa55a0) {
+      regs.write_old = 0x00;
+      regs.write_new = 0x00;
+      regs.flash_enable = true;
+      regs.write_enable = true;
+    }
+
+    if((regs.command & 0xffffff) == 0xaa55f0) {
+      regs.flash_enable = false;
+      regs.read_enable  = false;
+      regs.write_enable = false;
+    }
+  }
+}
+
+#endif

src/chip/c4/c4.cpp

@@ -1,197 +0,0 @@
-/*
-  C4 emulation
-
-  Used in Rockman X2/X3 (Megaman X2/X3)
-  Portions (c) anomie, Overload, zsKnight, Nach, byuu
-*/
-
-#include "../../base.h"
-
-#include "c4data.cpp"
-#include "c4fn.cpp"
-#include "c4oam.cpp"
-#include "c4ops.cpp"
-
-void C4::init() {}
-void C4::enable() {}
-
-uint32 C4::ldr(uint8 r) {
-uint16 addr = 0x0080 + (r * 3);
-  return (reg[addr]) | (reg[addr + 1] << 8) | (reg[addr + 2] << 16);
-}
-
-void C4::str(uint8 r, uint32 data) {
-uint16 addr = 0x0080 + (r * 3);
-  reg[addr    ] = (data);
-  reg[addr + 1] = (data >> 8);
-  reg[addr + 2] = (data >> 16);
-}
-
-void C4::mul(uint32 x, uint32 y, uint32 &rl, uint32 &rh) {
-int64 rx = x & 0xffffff;
-int64 ry = y & 0xffffff;
-  if(rx & 0x800000)rx |= ~0x7fffff;
-  if(ry & 0x800000)ry |= ~0x7fffff;
-
-  rx *= ry;
-
-  rl = (rx)       & 0xffffff;
-  rh = (rx >> 24) & 0xffffff;
-}
-
-uint32 C4::sin(uint32 rx) {
-  r0 = rx & 0x1ff;
-  if(r0 & 0x100)r0 ^= 0x1ff;
-  if(r0 & 0x080)r0 ^= 0x0ff;
-  if(rx & 0x100) {
-    return sin_table[r0 + 0x80];
-  } else {
-    return sin_table[r0];
-  }
-}
-
-uint32 C4::cos(uint32 rx) {
-  return sin(rx + 0x080);
-}
-
-void C4::immediate_reg(uint32 start) {
-  r0 = ldr(0);
-  for(uint32 i=start;i<48;i++) {
-    if((r0 & 0x0fff) < 0x0c00) {
-      ram[r0 & 0x0fff] = immediate_data[i];
-    }
-    r0++;
-  }
-  str(0, r0);
-}
-
-void C4::transfer_data() {
-uint32 src;
-uint16 dest, count;
-  src   = (reg[0x40]) | (reg[0x41] << 8) | (reg[0x42] << 16);
-  count = (reg[0x43]) | (reg[0x44] << 8);
-  dest  = (reg[0x45]) | (reg[0x46] << 8);
-
-  for(uint32 i=0;i<count;i++) {
-    write(dest++, r_mem->read(src++));
-  }
-}
-
-void C4::write(uint16 addr, uint8 data) {
-  addr &= 0x1fff;
-
-  if(addr < 0x0c00) {
-  //ram
-    ram[addr] = data;
-    return;
-  }
-
-  if(addr < 0x1f00) {
-  //unmapped
-    return;
-  }
-
-//command register
-  reg[addr & 0xff] = data;
-
-  if(addr == 0x1f47) {
-  //memory transfer
-    transfer_data();
-    return;
-  }
-
-  if(addr == 0x1f4f) {
-  //c4 command
-    if(reg[0x4d] == 0x0e && !(data & 0xc3)) {
-    //c4 test command
-      reg[0x80] = data >> 2;
-      return;
-    }
-
-    switch(data) {
-    case 0x00:op00();break;
-    case 0x01:op01();break;
-    case 0x05:op05();break;
-    case 0x0d:op0d();break;
-    case 0x10:op10();break;
-    case 0x13:op13();break;
-    case 0x15:op15();break;
-    case 0x1f:op1f();break;
-    case 0x22:op22();break;
-    case 0x25:op25();break;
-    case 0x2d:op2d();break;
-    case 0x40:op40();break;
-    case 0x54:op54();break;
-    case 0x5c:op5c();break;
-    case 0x5e:op5e();break;
-    case 0x60:op60();break;
-    case 0x62:op62();break;
-    case 0x64:op64();break;
-    case 0x66:op66();break;
-    case 0x68:op68();break;
-    case 0x6a:op6a();break;
-    case 0x6c:op6c();break;
-    case 0x6e:op6e();break;
-    case 0x70:op70();break;
-    case 0x72:op72();break;
-    case 0x74:op74();break;
-    case 0x76:op76();break;
-    case 0x78:op78();break;
-    case 0x7a:op7a();break;
-    case 0x7c:op7c();break;
-    case 0x89:op89();break;
-    }
-  }
-}
-
-void C4::writeb(uint16 addr, uint8 data) {
-  write(addr,     data);
-}
-
-void C4::writew(uint16 addr, uint16 data) {
-  write(addr,     data);
-  write(addr + 1, data >> 8);
-}
-
-void C4::writel(uint16 addr, uint32 data) {
-  write(addr,     data);
-  write(addr + 1, data >>  8);
-  write(addr + 2, data >> 16);
-}
-
-uint8 C4::read(uint16 addr) {
-  addr &= 0x1fff;
-
-  if(addr < 0x0c00) {
-    return ram[addr];
-  }
-
-  if(addr >= 0x1f00) {
-    return reg[addr & 0xff];
-  }
-
-  return r_cpu->regs.mdr;
-}
-
-uint8 C4::readb(uint16 addr) {
-  return read(addr);
-}
-
-uint16 C4::readw(uint16 addr) {
-  return read(addr) | (read(addr + 1) << 8);
-}
-
-uint32 C4::readl(uint16 addr) {
-  return read(addr) | (read(addr + 1) << 8) + (read(addr + 2) << 16);
-}
-
-void C4::power() {
-  reset();
-}
-
-void C4::reset() {
-  memset(ram, 0, 0x0c00);
-  memset(reg, 0, 0x0100);
-}
-
-C4::C4() {}

src/chip/chip.hpp

@@ -0,0 +1,11 @@
+#include "bsx/bsx.hpp"
+#include "srtc/srtc.hpp"
+#include "sdd1/sdd1.hpp"
+#include "spc7110/spc7110.hpp"
+#include "cx4/cx4.hpp"
+#include "dsp1/dsp1.hpp"
+#include "dsp2/dsp2.hpp"
+#include "dsp3/dsp3.hpp"
+#include "dsp4/dsp4.hpp"
+#include "obc1/obc1.hpp"
+#include "st010/st010.hpp"

src/chip/cx4/cx4.cpp

@@ -0,0 +1,197 @@
+/*
+  C4 emulation
+
+  Used in Rockman X2/X3 (Megaman X2/X3)
+  Portions (c) anomie, Overload, zsKnight, Nach, byuu
+*/
+
+#include <../base.hpp>
+#define CX4_CPP
+
+#include "cx4.hpp"
+#include "cx4data.cpp"
+#include "cx4fn.cpp"
+#include "cx4oam.cpp"
+#include "cx4ops.cpp"
+
+void Cx4::init() {}
+void Cx4::enable() {}
+
+uint32 Cx4::ldr(uint8 r) {
+uint16 addr = 0x0080 + (r * 3);
+  return (reg[addr]) | (reg[addr + 1] << 8) | (reg[addr + 2] << 16);
+}
+
+void Cx4::str(uint8 r, uint32 data) {
+uint16 addr = 0x0080 + (r * 3);
+  reg[addr    ] = (data);
+  reg[addr + 1] = (data >> 8);
+  reg[addr + 2] = (data >> 16);
+}
+
+void Cx4::mul(uint32 x, uint32 y, uint32 &rl, uint32 &rh) {
+int64 rx = x & 0xffffff;
+int64 ry = y & 0xffffff;
+  if(rx & 0x800000)rx |= ~0x7fffff;
+  if(ry & 0x800000)ry |= ~0x7fffff;
+
+  rx *= ry;
+
+  rl = (rx)       & 0xffffff;
+  rh = (rx >> 24) & 0xffffff;
+}
+
+uint32 Cx4::sin(uint32 rx) {
+  r0 = rx & 0x1ff;
+  if(r0 & 0x100)r0 ^= 0x1ff;
+  if(r0 & 0x080)r0 ^= 0x0ff;
+  if(rx & 0x100) {
+    return sin_table[r0 + 0x80];
+  } else {
+    return sin_table[r0];
+  }
+}
+
+uint32 Cx4::cos(uint32 rx) {
+  return sin(rx + 0x080);
+}
+
+void Cx4::immediate_reg(uint32 start) {
+  r0 = ldr(0);
+  for(uint32 i = start; i < 48; i++) {
+    if((r0 & 0x0fff) < 0x0c00) {
+      ram[r0 & 0x0fff] = immediate_data[i];
+    }
+    r0++;
+  }
+  str(0, r0);
+}
+
+void Cx4::transfer_data() {
+uint32 src;
+uint16 dest, count;
+  src   = (reg[0x40]) | (reg[0x41] << 8) | (reg[0x42] << 16);
+  count = (reg[0x43]) | (reg[0x44] << 8);
+  dest  = (reg[0x45]) | (reg[0x46] << 8);
+
+  for(uint32 i=0;i<count;i++) {
+    write(dest++, bus.read(src++));
+  }
+}
+
+void Cx4::write(unsigned addr, uint8 data) {
+  addr &= 0x1fff;
+
+  if(addr < 0x0c00) {
+  //ram
+    ram[addr] = data;
+    return;
+  }
+
+  if(addr < 0x1f00) {
+  //unmapped
+    return;
+  }
+
+//command register
+  reg[addr & 0xff] = data;
+
+  if(addr == 0x1f47) {
+  //memory transfer
+    transfer_data();
+    return;
+  }
+
+  if(addr == 0x1f4f) {
+  //c4 command
+    if(reg[0x4d] == 0x0e && !(data & 0xc3)) {
+    //c4 test command
+      reg[0x80] = data >> 2;
+      return;
+    }
+
+    switch(data) {
+      case 0x00: op00(); break;
+      case 0x01: op01(); break;
+      case 0x05: op05(); break;
+      case 0x0d: op0d(); break;
+      case 0x10: op10(); break;
+      case 0x13: op13(); break;
+      case 0x15: op15(); break;
+      case 0x1f: op1f(); break;
+      case 0x22: op22(); break;
+      case 0x25: op25(); break;
+      case 0x2d: op2d(); break;
+      case 0x40: op40(); break;
+      case 0x54: op54(); break;
+      case 0x5c: op5c(); break;
+      case 0x5e: op5e(); break;
+      case 0x60: op60(); break;
+      case 0x62: op62(); break;
+      case 0x64: op64(); break;
+      case 0x66: op66(); break;
+      case 0x68: op68(); break;
+      case 0x6a: op6a(); break;
+      case 0x6c: op6c(); break;
+      case 0x6e: op6e(); break;
+      case 0x70: op70(); break;
+      case 0x72: op72(); break;
+      case 0x74: op74(); break;
+      case 0x76: op76(); break;
+      case 0x78: op78(); break;
+      case 0x7a: op7a(); break;
+      case 0x7c: op7c(); break;
+      case 0x89: op89(); break;
+    }
+  }
+}
+
+void Cx4::writeb(uint16 addr, uint8 data) {
+  write(addr,     data);
+}
+
+void Cx4::writew(uint16 addr, uint16 data) {
+  write(addr,     data);
+  write(addr + 1, data >> 8);
+}
+
+void Cx4::writel(uint16 addr, uint32 data) {
+  write(addr,     data);
+  write(addr + 1, data >>  8);
+  write(addr + 2, data >> 16);
+}
+
+uint8 Cx4::read(unsigned addr) {
+  addr &= 0x1fff;
+
+  if(addr < 0x0c00) {
+    return ram[addr];
+  }
+
+  if(addr >= 0x1f00) {
+    return reg[addr & 0xff];
+  }
+
+  return cpu.regs.mdr;
+}
+
+uint8 Cx4::readb(uint16 addr) {
+  return read(addr);
+}
+
+uint16 Cx4::readw(uint16 addr) {
+  return read(addr) | (read(addr + 1) << 8);
+}
+
+uint32 Cx4::readl(uint16 addr) {
+  return read(addr) | (read(addr + 1) << 8) + (read(addr + 2) << 16);
+}
+
+void Cx4::power() {
+  reset();
+}
+
+void Cx4::reset() {
+  memset(ram, 0, 0x0c00);
+  memset(reg, 0, 0x0100);
+}

src/chip/cx4/cx4.hpp

@@ -1,29 +1,29 @@
-class C4 {
+class Cx4 : public Memory {
 private:
-uint8  ram[0x0c00];
-uint8  reg[0x0100];
-uint32 r0, r1, r2,  r3,  r4,  r5,  r6,  r7,
-       r8, r9, r10, r11, r12, r13, r14, r15;
+  uint8  ram[0x0c00];
+  uint8  reg[0x0100];
+  uint32 r0, r1, r2,  r3,  r4,  r5,  r6,  r7,
+         r8, r9, r10, r11, r12, r13, r14, r15;
 
-static const uint8  immediate_data[48];
-static const uint16 wave_data[40];
-static const uint32 sin_table[256];
+  static const uint8  immediate_data[48];
+  static const uint16 wave_data[40];
+  static const uint32 sin_table[256];
 
-static const int16 SinTable[512];
-static const int16 CosTable[512];
+  static const int16 SinTable[512];
+  static const int16 CosTable[512];
 
-int16 C4WFXVal, C4WFYVal, C4WFZVal, C4WFX2Val, C4WFY2Val, C4WFDist, C4WFScale;
-int16 C41FXVal, C41FYVal, C41FAngleRes, C41FDist, C41FDistVal;
+  int16 C4WFXVal, C4WFYVal, C4WFZVal, C4WFX2Val, C4WFY2Val, C4WFDist, C4WFScale;
+  int16 C41FXVal, C41FYVal, C41FAngleRes, C41FDist, C41FDistVal;
 
-double tanval;
-double c4x,c4y,c4z, c4x2,c4y2,c4z2;
+  double tanval;
+  double c4x,c4y,c4z, c4x2,c4y2,c4z2;
 
-void C4TransfWireFrame();
-void C4TransfWireFrame2();
-void C4CalcWireFrame();
-void C4DrawLine(int32 X1, int32 Y1, int16 Z1, int32 X2, int32 Y2, int16 Z2, uint8 Color);
-void C4DrawWireFrame();
-void C4DoScaleRotate(int row_padding);
+  void C4TransfWireFrame();
+  void C4TransfWireFrame2();
+  void C4CalcWireFrame();
+  void C4DrawLine(int32 X1, int32 Y1, int16 Z1, int32 X2, int32 Y2, int16 Z2, uint8 Color);
+  void C4DrawWireFrame();
+  void C4DoScaleRotate(int row_padding);
 
 public:
   uint32 ldr(uint8 r);
@@ -75,22 +75,23 @@ public:
   void   op7c();
   void   op89();
 
+  uint8  readb(uint16 addr);
+  uint16 readw(uint16 addr);
+  uint32 readl(uint16 addr);
+
+  void   writeb(uint16 addr, uint8 data);
+  void   writew(uint16 addr, uint16 data);
+  void   writel(uint16 addr, uint32 data);
+
+//
+
   void   init();
   void   enable();
   void   power();
   void   reset();
 
-  void   write (uint16 addr, uint8 data);
-  void   writeb(uint16 addr, uint8 data);
-  void   writew(uint16 addr, uint16 data);
-  void   writel(uint16 addr, uint32 data);
-
-  uint8  read (uint16 addr);
-  uint8  readb(uint16 addr);
-  uint16 readw(uint16 addr);
-  uint32 readl(uint16 addr);
-
-  C4();
+  uint8  read (unsigned addr);
+  void   write(unsigned addr, uint8 data);
 };
 
-extern C4 c4;
+extern Cx4 cx4;

src/chip/cx4/cx4data.cpp

@@ -1,11 +1,13 @@
-const uint8 C4::immediate_data[48] = {
+#ifdef CX4_CPP
+
+const uint8 Cx4::immediate_data[48] = {
   0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, 0xff,
   0xff, 0xff, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00, 0x80, 0xff, 0xff, 0x7f,
   0x00, 0x80, 0x00, 0xff, 0x7f, 0x00, 0xff, 0x7f, 0xff, 0x7f, 0xff, 0xff,
   0x00, 0x00, 0x01, 0xff, 0xff, 0xfe, 0x00, 0x01, 0x00, 0xff, 0xfe, 0x00
 };
 
-const uint16 C4::wave_data[40] = {
+const uint16 Cx4::wave_data[40] = {
   0x0000, 0x0002, 0x0004, 0x0006, 0x0008, 0x000a, 0x000c, 0x000e,
   0x0200, 0x0202, 0x0204, 0x0206, 0x0208, 0x020a, 0x020c, 0x020e,
   0x0400, 0x0402, 0x0404, 0x0406, 0x0408, 0x040a, 0x040c, 0x040e,
@@ -13,7 +15,7 @@ const uint16 C4::wave_data[40] = {
   0x0800, 0x0802, 0x0804, 0x0806, 0x0808, 0x080a, 0x080c, 0x080e
 };
 
-const uint32 C4::sin_table[256] = {
+const uint32 Cx4::sin_table[256] = {
   0x000000, 0x000324, 0x000648, 0x00096c, 0x000c8f, 0x000fb2, 0x0012d5, 0x0015f6,
   0x001917, 0x001c37, 0x001f56, 0x002273, 0x002590, 0x0028aa, 0x002bc4, 0x002edb,
   0x0031f1, 0x003505, 0x003817, 0x003b26, 0x003e33, 0x00413e, 0x004447, 0x00474d,
@@ -48,7 +50,7 @@ const uint32 C4::sin_table[256] = {
   0xff013b, 0xff00f1, 0xff00b1, 0xff007b, 0xff004e, 0xff002c, 0xff0013, 0xff0004
 };
 
-const int16 C4::SinTable[512] = {
+const int16 Cx4::SinTable[512] = {
        0,    402,    804,   1206,   1607,   2009,   2410,   2811,
     3211,   3611,   4011,   4409,   4808,   5205,   5602,   5997,
     6392,   6786,   7179,   7571,   7961,   8351,   8739,   9126,
@@ -115,7 +117,7 @@ const int16 C4::SinTable[512] = {
    -3211,  -2811,  -2410,  -2009,  -1607,  -1206,   -804,   -402
 };
 
-const int16 C4::CosTable[512] = {
+const int16 Cx4::CosTable[512] = {
    32767,  32765,  32758,  32745,  32728,  32706,  32679,  32647,
    32610,  32568,  32521,  32469,  32413,  32351,  32285,  32214,
    32138,  32057,  31971,  31881,  31785,  31685,  31581,  31471,
@@ -181,3 +183,5 @@ const int16 C4::CosTable[512] = {
    32138,  32214,  32285,  32351,  32413,  32469,  32521,  32568,
    32610,  32647,  32679,  32706,  32728,  32745,  32758,  32765
 };
+
+#endif

src/chip/cx4/cx4fn.cpp

@@ -1,3 +1,5 @@
+#ifdef CX4_CPP
+
 #include <math.h>
 #define Tan(a) (CosTable[a] ? ((((int32)SinTable[a]) << 16) / CosTable[a]) : 0x80000000)
 #define sar(b, n) ((b) >> (n))
@@ -7,7 +9,7 @@
 #define PI 3.1415926535897932384626433832795
 
 //Wireframe Helpers
-void C4::C4TransfWireFrame() {
+void Cx4::C4TransfWireFrame() {
   c4x = (double)C4WFXVal;
   c4y = (double)C4WFYVal;
   c4z = (double)C4WFZVal - 0x95;
@@ -32,7 +34,7 @@ void C4::C4TransfWireFrame() {
   C4WFYVal = (int16)(c4y * C4WFScale / (0x90 * (c4z + 0x95)) * 0x95);
 }
 
-void C4::C4CalcWireFrame() {
+void Cx4::C4CalcWireFrame() {
   C4WFXVal = C4WFX2Val - C4WFXVal;
   C4WFYVal = C4WFY2Val - C4WFYVal;
 
@@ -49,7 +51,7 @@ void C4::C4CalcWireFrame() {
   }
 }
 
-void C4::C4TransfWireFrame2() {
+void Cx4::C4TransfWireFrame2() {
   c4x = (double)C4WFXVal;
   c4y = (double)C4WFYVal;
   c4z = (double)C4WFZVal;
@@ -74,34 +76,34 @@ void C4::C4TransfWireFrame2() {
   C4WFYVal = (int16)(c4y * C4WFScale / 0x100);
 }
 
-void C4::C4DrawWireFrame() {
+void Cx4::C4DrawWireFrame() {
 uint32 line = readl(0x1f80);
 uint32 point1, point2;
 int16 X1, Y1, Z1;
 int16 X2, Y2, Z2;
 uint8 Color;
   for(int32 i = ram[0x0295]; i > 0; i--, line += 5) {
-    if(r_mem->read(line) == 0xff && r_mem->read(line + 1) == 0xff) {
+    if(bus.read(line) == 0xff && bus.read(line + 1) == 0xff) {
     int32 tmp = line - 5;
-      while(r_mem->read(tmp + 2) == 0xff && r_mem->read(tmp + 3) == 0xff && (tmp + 2) >= 0) { tmp -= 5; }
-      point1 = (read(0x1f82) << 16) | (r_mem->read(tmp + 2) << 8) | r_mem->read(tmp + 3);
+      while(bus.read(tmp + 2) == 0xff && bus.read(tmp + 3) == 0xff && (tmp + 2) >= 0) { tmp -= 5; }
+      point1 = (read(0x1f82) << 16) | (bus.read(tmp + 2) << 8) | bus.read(tmp + 3);
     } else {
-      point1 = (read(0x1f82) << 16) | (r_mem->read(line) << 8) | r_mem->read(line + 1);
+      point1 = (read(0x1f82) << 16) | (bus.read(line) << 8) | bus.read(line + 1);
     }
-    point2 = (read(0x1f82) << 16) | (r_mem->read(line + 2) << 8) | r_mem->read(line + 3);
+    point2 = (read(0x1f82) << 16) | (bus.read(line + 2) << 8) | bus.read(line + 3);
 
-    X1=(r_mem->read(point1 + 0) << 8) | r_mem->read(point1 + 1);
-    Y1=(r_mem->read(point1 + 2) << 8) | r_mem->read(point1 + 3);
-    Z1=(r_mem->read(point1 + 4) << 8) | r_mem->read(point1 + 5);
-    X2=(r_mem->read(point2 + 0) << 8) | r_mem->read(point2 + 1);
-    Y2=(r_mem->read(point2 + 2) << 8) | r_mem->read(point2 + 3);
-    Z2=(r_mem->read(point2 + 4) << 8) | r_mem->read(point2 + 5);
-    Color = r_mem->read(line + 4);
+    X1=(bus.read(point1 + 0) << 8) | bus.read(point1 + 1);
+    Y1=(bus.read(point1 + 2) << 8) | bus.read(point1 + 3);
+    Z1=(bus.read(point1 + 4) << 8) | bus.read(point1 + 5);
+    X2=(bus.read(point2 + 0) << 8) | bus.read(point2 + 1);
+    Y2=(bus.read(point2 + 2) << 8) | bus.read(point2 + 3);
+    Z2=(bus.read(point2 + 4) << 8) | bus.read(point2 + 5);
+    Color = bus.read(line + 4);
     C4DrawLine(X1, Y1, Z1, X2, Y2, Z2, Color);
   }
 }
 
-void C4::C4DrawLine(int32 X1, int32 Y1, int16 Z1, int32 X2, int32 Y2, int16 Z2, uint8 Color) {
+void Cx4::C4DrawLine(int32 X1, int32 Y1, int16 Z1, int32 X2, int32 Y2, int16 Z2, uint8 Color) {
 //Transform coordinates
   C4WFXVal  = (int16)X1;
   C4WFYVal  = (int16)Y1;
@@ -145,7 +147,7 @@ void C4::C4DrawLine(int32 X1, int32 Y1, int16 Z1, int32 X2, int32 Y2, int16 Z2,
   }
 }
 
-void C4::C4DoScaleRotate(int row_padding) {
+void Cx4::C4DoScaleRotate(int row_padding) {
 int16 A, B, C, D;
 
 //Calculate matrix
@@ -240,3 +242,5 @@ uint8 bit    = 0x80;
     LineY += D;
   }
 }
+
+#endif

src/chip/cx4/cx4oam.cpp

@@ -1,5 +1,7 @@
+#ifdef CX4_CPP
+
 //Build OAM
-void C4::op00_00() {
+void Cx4::op00_00() {
 uint32 oamptr = ram[0x626] << 2;
   for(int32 i = 0x1fd; i > oamptr && i >= 0; i -= 4) {
   //clear oam-to-be
@@ -27,28 +29,28 @@ uint32 srcptr = 0x220;
     sprattr = ram[srcptr + 4] | ram[srcptr + 6];
 
   uint32 spraddr = readl(srcptr + 7);
-    if(r_mem->read(spraddr)) {
+    if(bus.read(spraddr)) {
     int16 x, y;
-      for(int sprcnt = r_mem->read(spraddr++); sprcnt > 0 && sprcount > 0; sprcnt--, spraddr += 4) {
-        x = (int8)r_mem->read(spraddr + 1);
+      for(int sprcnt = bus.read(spraddr++); sprcnt > 0 && sprcount > 0; sprcnt--, spraddr += 4) {
+        x = (int8)bus.read(spraddr + 1);
         if(sprattr & 0x40) {
-          x = -x - ((r_mem->read(spraddr) & 0x20) ? 16 : 8);
+          x = -x - ((bus.read(spraddr) & 0x20) ? 16 : 8);
         }
         x += sprx;
         if(x >= -16 && x <= 272) {
-          y = (int8)r_mem->read(spraddr + 2);
+          y = (int8)bus.read(spraddr + 2);
           if(sprattr & 0x80) {
-            y = -y - ((r_mem->read(spraddr) & 0x20) ? 16 : 8);
+            y = -y - ((bus.read(spraddr) & 0x20) ? 16 : 8);
           }
           y += spry;
           if(y >= -16 && y <= 224) {
             ram[oamptr    ] = (uint8)x;
             ram[oamptr + 1] = (uint8)y;
-            ram[oamptr + 2] = sprname + r_mem->read(spraddr + 3);
-            ram[oamptr + 3] = sprattr ^ (r_mem->read(spraddr) & 0xc0);
+            ram[oamptr + 2] = sprname + bus.read(spraddr + 3);
+            ram[oamptr + 3] = sprattr ^ (bus.read(spraddr) & 0xc0);
             ram[oamptr2] &= ~(3 << offset);
             if(x & 0x100)ram[oamptr2] |= 1 << offset;
-            if(r_mem->read(spraddr) & 0x20)ram[oamptr2] |= 2 << offset;
+            if(bus.read(spraddr) & 0x20)ram[oamptr2] |= 2 << offset;
             oamptr += 4;
             sprcount--;
             offset = (offset + 2) & 6;
@@ -73,12 +75,12 @@ uint32 srcptr = 0x220;
 }
 
 //Scale and Rotate
-void C4::op00_03() {
+void Cx4::op00_03() {
   C4DoScaleRotate(0);
 }
 
 //Transform Lines
-void C4::op00_05() {
+void Cx4::op00_05() {
   C4WFX2Val = read(0x1f83);
   C4WFY2Val = read(0x1f86);
   C4WFDist  = read(0x1f89);
@@ -119,17 +121,17 @@ uint32 ptr2 = 0;
 }
 
 //Scale and Rotate
-void C4::op00_07() {
+void Cx4::op00_07() {
   C4DoScaleRotate(64);
 }
 
 //Draw Wireframe
-void C4::op00_08() {
+void Cx4::op00_08() {
   C4DrawWireFrame();
 }
 
 //Disintegrate
-void C4::op00_0b() {
+void Cx4::op00_0b() {
 uint8  width, height;
 uint32 startx, starty;
 uint32 srcptr;
@@ -169,7 +171,7 @@ int32  i, j;
 }
 
 //Bitplane Wave
-void C4::op00_0c() {
+void Cx4::op00_0c() {
 uint32 destptr = 0;
 uint32 waveptr = read(0x1f83);
 uint16 mask1   = 0xc0c0;
@@ -217,3 +219,5 @@ uint16 mask2   = 0x3f3f;
     destptr += 16;
   }
 }
+
+#endif

src/chip/cx4/cx4ops.cpp

@@ -1,5 +1,7 @@
+#ifdef CX4_CPP
+
 //Sprite Functions
-void C4::op00() {
+void Cx4::op00() {
   switch(reg[0x4d]) {
   case 0x00:op00_00();break;
   case 0x03:op00_03();break;
@@ -12,13 +14,13 @@ void C4::op00() {
 }
 
 //Draw Wireframe
-void C4::op01() {
+void Cx4::op01() {
   memset(ram + 0x300, 0, 2304);
   C4DrawWireFrame();
 }
 
 //Propulsion
-void C4::op05() {
+void Cx4::op05() {
 int32 temp = 0x10000;
   if(readw(0x1f83)) {
     temp = sar((temp / readw(0x1f83)) * readw(0x1f81), 8);
@@ -27,7 +29,7 @@ int32 temp = 0x10000;
 }
 
 //Set Vector length
-void C4::op0d() {
+void Cx4::op0d() {
   C41FXVal    = readw(0x1f80);
   C41FYVal    = readw(0x1f83);
   C41FDistVal = readw(0x1f86);
@@ -40,7 +42,7 @@ void C4::op0d() {
 }
 
 //Triangle
-void C4::op10() {
+void Cx4::op10() {
   r0 = ldr(0);
   r1 = ldr(1);
 
@@ -64,7 +66,7 @@ void C4::op10() {
 }
 
 //Triangle
-void C4::op13() {
+void Cx4::op13() {
   r0 = ldr(0);
   r1 = ldr(1);
 
@@ -87,7 +89,7 @@ void C4::op13() {
 }
 
 //Pythagorean
-void C4::op15() {
+void Cx4::op15() {
   C41FXVal = readw(0x1f80);
   C41FYVal = readw(0x1f83);
   C41FDist = (int16)sqrt((double)C41FXVal * (double)C41FXVal + (double)C41FYVal * (double)C41FYVal);
@@ -95,7 +97,7 @@ void C4::op15() {
 }
 
 //Calculate distance
-void C4::op1f() {
+void Cx4::op1f() {
   C41FXVal = readw(0x1f80);
   C41FYVal = readw(0x1f83);
   if(!C41FXVal) {
@@ -113,7 +115,7 @@ void C4::op1f() {
 }
 
 //Trapezoid
-void C4::op22() {
+void Cx4::op22() {
 int16 angle1 = readw(0x1f8c) & 0x1ff;
 int16 angle2 = readw(0x1f8f) & 0x1ff;
 int32 tan1 = Tan(angle1);
@@ -152,7 +154,7 @@ int16 left, right;
 }
 
 //Multiply
-void C4::op25() {
+void Cx4::op25() {
   r0 = ldr(0);
   r1 = ldr(1);
   mul(r0, r1, r0, r1);
@@ -161,7 +163,7 @@ void C4::op25() {
 }
 
 //Transform Coords
-void C4::op2d() {
+void Cx4::op2d() {
   C4WFXVal  = readw(0x1f81);
   C4WFYVal  = readw(0x1f84);
   C4WFZVal  = readw(0x1f87);
@@ -175,7 +177,7 @@ void C4::op2d() {
 }
 
 //Sum
-void C4::op40() {
+void Cx4::op40() {
   r0 = 0;
   for(uint32 i=0;i<0x800;i++) {
     r0 += ram[i];
@@ -184,7 +186,7 @@ void C4::op40() {
 }
 
 //Square
-void C4::op54() {
+void Cx4::op54() {
   r0 = ldr(0);
   mul(r0, r0, r1, r2);
   str(1, r1);
@@ -192,31 +194,33 @@ void C4::op54() {
 }
 
 //Immediate Register
-void C4::op5c() {
+void Cx4::op5c() {
   str(0, 0x000000);
   immediate_reg(0);
 }
 
 //Immediate Register (Multiple)
-void C4::op5e() { immediate_reg( 0); }
-void C4::op60() { immediate_reg( 3); }
-void C4::op62() { immediate_reg( 6); }
-void C4::op64() { immediate_reg( 9); }
-void C4::op66() { immediate_reg(12); }
-void C4::op68() { immediate_reg(15); }
-void C4::op6a() { immediate_reg(18); }
-void C4::op6c() { immediate_reg(21); }
-void C4::op6e() { immediate_reg(24); }
-void C4::op70() { immediate_reg(27); }
-void C4::op72() { immediate_reg(30); }
-void C4::op74() { immediate_reg(33); }
-void C4::op76() { immediate_reg(36); }
-void C4::op78() { immediate_reg(39); }
-void C4::op7a() { immediate_reg(42); }
-void C4::op7c() { immediate_reg(45); }
+void Cx4::op5e() { immediate_reg( 0); }
+void Cx4::op60() { immediate_reg( 3); }
+void Cx4::op62() { immediate_reg( 6); }
+void Cx4::op64() { immediate_reg( 9); }
+void Cx4::op66() { immediate_reg(12); }
+void Cx4::op68() { immediate_reg(15); }
+void Cx4::op6a() { immediate_reg(18); }
+void Cx4::op6c() { immediate_reg(21); }
+void Cx4::op6e() { immediate_reg(24); }
+void Cx4::op70() { immediate_reg(27); }
+void Cx4::op72() { immediate_reg(30); }
+void Cx4::op74() { immediate_reg(33); }
+void Cx4::op76() { immediate_reg(36); }
+void Cx4::op78() { immediate_reg(39); }
+void Cx4::op7a() { immediate_reg(42); }
+void Cx4::op7c() { immediate_reg(45); }
 
 //Immediate ROM
-void C4::op89() {
+void Cx4::op89() {
   str(0, 0x054336);
   str(1, 0xffffff);
 }
+
+#endif

src/chip/dsp1/dsp1.cpp

@@ -1,5 +1,8 @@
-#include "../../base.h"
+#include <../base.hpp>
+#include <../cart/cart.hpp>
+#define DSP1_CPP
 
+#include "dsp1.hpp"
 #include "dsp1emu.cpp"
 
 void DSP1::init() {}
@@ -25,30 +28,31 @@ void DSP1::reset() {
  * of expected ranges
  *****/
 bool DSP1::addr_decode(uint16 addr) {
-  switch(cartridge.info.dsp1_mapper) {
+  switch(cartridge.dsp1_mapper()) {
+    case Cartridge::DSP1LoROM1MB: {
+    //$[20-3f]:[8000-bfff] = DR, $[20-3f]:[c000-ffff] = SR
+      return (addr >= 0xc000);
+    }
 
-  case Cartridge::DSP1_LOROM_1MB:
-  //$[20-3f]:[8000-bfff] = DR, $[20-3f]:[c000-ffff] = SR
-    return (addr >= 0xc000);
-
-  case Cartridge::DSP1_LOROM_2MB:
-  //$[60-6f]:[0000-3fff] = DR, $[60-6f]:[4000-7fff] = SR
-    return (addr >= 0x4000);
-
-  case Cartridge::DSP1_HIROM:
-  //$[00-1f]:[6000-6fff] = DR, $[00-1f]:[7000-7fff] = SR
-    return (addr >= 0x7000);
+    case Cartridge::DSP1LoROM2MB: {
+    //$[60-6f]:[0000-3fff] = DR, $[60-6f]:[4000-7fff] = SR
+      return (addr >= 0x4000);
+    }
 
+    case Cartridge::DSP1HiROM: {
+    //$[00-1f]:[6000-6fff] = DR, $[00-1f]:[7000-7fff] = SR
+      return (addr >= 0x7000);
+    }
   }
 
   return 0;
 }
 
-uint8 DSP1::read(uint16 addr) {
+uint8 DSP1::read(unsigned addr) {
   return (addr_decode(addr) == 0) ? dsp1.getDr() : dsp1.getSr();
 }
 
-void DSP1::write(uint16 addr, uint8 data) {
+void DSP1::write(unsigned addr, uint8 data) {
   if(addr_decode(addr) == 0) {
     dsp1.setDr(data);
   }

src/chip/dsp1/dsp1.h

@@ -1,18 +0,0 @@
-#include "dsp1emu.h"
-
-class DSP1 {
-private:
-Dsp1 dsp1;
-
-public:
-  void   init();
-  void   enable();
-  void   power();
-  void   reset();
-
-  bool   addr_decode(uint16 addr);
-  uint8  read (uint16 addr);
-  void   write(uint16 addr, uint8 data);
-};
-
-extern DSP1 dsp1;

src/chip/dsp1/dsp1.hpp

@@ -0,0 +1,18 @@
+#include "dsp1emu.hpp"
+
+class DSP1 : public Memory {
+private:
+  Dsp1 dsp1;
+  bool addr_decode(uint16 addr);
+
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+};
+
+extern DSP1 dsp1;

src/chip/dsp1/dsp1emu.cpp

@@ -1,3 +1,5 @@
+#ifdef DSP1_CPP
+
 // DSP-1's emulation code
 //
 // Based on research by Overload, The Dumper, Neviksti and Andreas Naive
@@ -1620,3 +1622,4 @@ const int16 Dsp1::SinTable[256] = {
 
 //////////////////////////////////////////////////////////////////
 
+#endif

src/chip/dsp2/dsp2.cpp

@@ -1,5 +1,7 @@
-#include "../../base.h"
+#include <../base.hpp>
+#define DSP2_CPP
 
+#include "dsp2.hpp"
 #include "dsp2_op.cpp"
 
 void DSP2::init() {}
@@ -28,8 +30,8 @@ void DSP2::reset() {
   status.op0dinlen       = 0;
 }
 
-uint8 DSP2::read(uint16 addr) {
-uint8 r = 0xff;
+uint8 DSP2::read(unsigned addr) {
+  uint8 r = 0xff;
   if(status.out_count) {
     r = status.output[status.out_index++];
     status.out_index &= 511;
@@ -40,7 +42,7 @@ uint8 r = 0xff;
   return r;
 }
 
-void DSP2::write(uint16 addr, uint8 data) {
+void DSP2::write(unsigned addr, uint8 data) {
   if(status.waiting_for_command) {
     status.command  = data;
     status.in_index = 0;

src/chip/dsp2/dsp2.h

@@ -1,42 +0,0 @@
-class DSP2 { public:
-struct {
-  bool   waiting_for_command;
-  uint   command;
-  uint   in_count,  in_index;
-  uint   out_count, out_index;
-
-  uint8  parameters[512];
-  uint8  output[512];
-
-  uint8  op05transparent;
-  bool   op05haslen;
-  int    op05len;
-  bool   op06haslen;
-  int    op06len;
-  uint16 op09word1;
-  uint16 op09word2;
-  bool   op0dhaslen;
-  int    op0doutlen;
-  int    op0dinlen;
-} status;
-
-  void   init();
-  void   enable();
-  void   power();
-  void   reset();
-
-  void   op01();
-  void   op03();
-  void   op05();
-  void   op06();
-  void   op09();
-  void   op0d();
-
-  uint8  read (uint16 addr);
-  void   write(uint16 addr, uint8 data);
-
-  DSP2();
-  ~DSP2();
-};
-
-extern DSP2 dsp2;

src/chip/dsp2/dsp2.hpp

@@ -0,0 +1,44 @@
+class DSP2 : public Memory {
+public:
+  struct {
+    bool waiting_for_command;
+    unsigned command;
+    unsigned in_count,  in_index;
+    unsigned out_count, out_index;
+
+    uint8  parameters[512];
+    uint8  output[512];
+
+    uint8  op05transparent;
+    bool   op05haslen;
+    int    op05len;
+    bool   op06haslen;
+    int    op06len;
+    uint16 op09word1;
+    uint16 op09word2;
+    bool   op0dhaslen;
+    int    op0doutlen;
+    int    op0dinlen;
+  } status;
+
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+
+  DSP2();
+  ~DSP2();
+
+protected:
+  void op01();
+  void op03();
+  void op05();
+  void op06();
+  void op09();
+  void op0d();
+};
+
+extern DSP2 dsp2;

src/chip/dsp2/dsp2_op.cpp

@@ -1,3 +1,5 @@
+#ifdef DSP2_CPP
+
 //convert bitmap to bitplane tile
 void DSP2::op01() {
 //op01 size is always 32 bytes input and output
@@ -171,3 +173,5 @@ uint8  pixelarray[512];
     status.output[i] = (pixelarray[i << 1] << 4) | pixelarray[(i << 1) + 1];
   }
 }
+
+#endif

src/chip/dsp3/dsp3.cpp

@@ -1,7 +1,9 @@
-#include "../../base.h"
+#include <../base.hpp>
+#define DSP3_CPP
 
+#include "dsp3.hpp"
 namespace DSP3i {
-  #define bool8 bool
+  #define bool8 uint8
   #include "dsp3emu.c"
   #undef bool8
 };
@@ -20,14 +22,14 @@ void DSP3::reset() {
   DSP3i::DSP3_Reset();
 }
 
-uint8 DSP3::read(uint16 addr) {
-  DSP3i::dsp3_address = addr;
+uint8 DSP3::read(unsigned addr) {
+  DSP3i::dsp3_address = addr & 0xffff;
   DSP3i::DSP3GetByte();
   return DSP3i::dsp3_byte;
 }
 
-void DSP3::write(uint16 addr, uint8 data) {
-  DSP3i::dsp3_address = addr;
+void DSP3::write(unsigned addr, uint8 data) {
+  DSP3i::dsp3_address = addr & 0xffff;
   DSP3i::dsp3_byte = data;
   DSP3i::DSP3SetByte();
 }

src/chip/dsp3/dsp3.h

@@ -1,11 +0,0 @@
-class DSP3 { public:
-  void init();
-  void enable();
-  void power();
-  void reset();
-
-  uint8 read (uint16 addr);
-  void  write(uint16 addr, uint8 data);
-};
-
-extern DSP3 dsp3;

src/chip/dsp3/dsp3.hpp

@@ -0,0 +1,12 @@
+class DSP3 : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read (unsigned addr);
+  void  write(unsigned addr, uint8 data);
+};
+
+extern DSP3 dsp3;

src/chip/dsp3/dsp3emu.c

@@ -1,3 +1,5 @@
+#ifdef DSP3_CPP
+
 //DSP-3 emulator code
 //Copyright (c) 2003-2006 John Weidman, Kris Bleakley, Lancer, z80 gaiden
 
@@ -1140,3 +1142,5 @@ void InitDSP3()
 {
   DSP3_Reset();
 }
+
+#endif

src/chip/dsp4/dsp4.cpp

@@ -1,5 +1,7 @@
-#include "../../base.h"
+#include <../base.hpp>
+#define DSP4_CPP
 
+#include "dsp4.hpp"
 namespace DSP4i {
   inline uint16 READ_WORD(uint8 *addr) {
     return (addr[0]) + (addr[1] << 8);
@@ -14,7 +16,7 @@ namespace DSP4i {
     addr[1] = data >> 8;
   }
 
-  #define bool8 bool
+  #define bool8 uint8
   #include "dsp4emu.c"
   #undef bool8
 };
@@ -33,7 +35,8 @@ void DSP4::reset() {
   DSP4i::InitDSP4();
 }
 
-uint8 DSP4::read(uint16 addr) {
+uint8 DSP4::read(unsigned addr) {
+  addr &= 0xffff;
   if(addr < 0xc000) {
     DSP4i::dsp4_address = addr;
     DSP4i::DSP4GetByte();
@@ -42,7 +45,8 @@ uint8 DSP4::read(uint16 addr) {
   return 0x80;
 }
 
-void DSP4::write(uint16 addr, uint8 data) {
+void DSP4::write(unsigned addr, uint8 data) {
+  addr &= 0xffff;
   if(addr < 0xc000) {
     DSP4i::dsp4_address = addr;
     DSP4i::dsp4_byte = data;

src/chip/dsp4/dsp4.h

@@ -1,11 +0,0 @@
-class DSP4 { public:
-  void init();
-  void enable();
-  void power();
-  void reset();
-
-  uint8 read (uint16 addr);
-  void  write(uint16 addr, uint8 data);
-};
-
-extern DSP4 dsp4;

src/chip/dsp4/dsp4.hpp

@@ -0,0 +1,12 @@
+class DSP4 : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read (unsigned addr);
+  void  write(unsigned addr, uint8 data);
+};
+
+extern DSP4 dsp4;

src/chip/dsp4/dsp4emu.c

@@ -1,3 +1,5 @@
+#ifdef DSP4_CPP
+
 //DSP-4 emulator code
 //Copyright (c) 2004-2006 Dreamer Nom, John Weidman, Kris Bleakley, Nach, z80 gaiden
 
@@ -2144,3 +2146,5 @@ void DSP4GetByte()
     dsp4_byte = 0xff;
   }
 }
+
+#endif

src/chip/obc1/obc1.cpp

@@ -1,4 +1,6 @@
-#include "../../base.h"
+#include <../base.hpp>
+#include <../cart/cart.hpp>
+#include "obc1.hpp"
 
 void OBC1::init() {}
 void OBC1::enable() {}
@@ -8,81 +10,63 @@ void OBC1::power() {
 }
 
 void OBC1::reset() {
-  memset(cartridge.ram, 0xff, 0x2000);
-  status.baseptr = (cartridge.ram[0x1ff5] & 1) ? 0x1800 : 0x1c00;
-  status.address = (cartridge.ram[0x1ff6] & 0x7f);
-  status.shift   = (cartridge.ram[0x1ff6] & 3) << 1;
+  for(unsigned i = 0x0000; i <= 0x1fff; i++) ram_write(i, 0xff);
+
+  status.baseptr = (ram_read(0x1ff5) & 1) ? 0x1800 : 0x1c00;
+  status.address = (ram_read(0x1ff6) & 0x7f);
+  status.shift   = (ram_read(0x1ff6) & 3) << 1;
 }
 
-uint8 OBC1::read(uint16 addr) {
+uint8 OBC1::read(unsigned addr) {
   addr &= 0x1fff;
+  if((addr & 0x1ff8) != 0x1ff0) return ram_read(addr);
 
-  if((addr & 0x1ff8) != 0x1ff0) {
-    return cartridge.ram[addr];
+  switch(addr) { default: //never used, avoids compiler warning
+    case 0x1ff0: return ram_read(status.baseptr + (status.address << 2) + 0);
+    case 0x1ff1: return ram_read(status.baseptr + (status.address << 2) + 1);
+    case 0x1ff2: return ram_read(status.baseptr + (status.address << 2) + 2);
+    case 0x1ff3: return ram_read(status.baseptr + (status.address << 2) + 3);
+    case 0x1ff4: return ram_read(status.baseptr + (status.address >> 2) + 0x200);
+    case 0x1ff5: case 0x1ff6: case 0x1ff7: return ram_read(addr);
   }
-
-  switch(addr) {
-  case 0x1ff0:
-    return cartridge.ram[status.baseptr + (status.address << 2) + 0];
-  case 0x1ff1:
-    return cartridge.ram[status.baseptr + (status.address << 2) + 1];
-  case 0x1ff2:
-    return cartridge.ram[status.baseptr + (status.address << 2) + 2];
-  case 0x1ff3:
-    return cartridge.ram[status.baseptr + (status.address << 2) + 3];
-  case 0x1ff4:
-    return cartridge.ram[status.baseptr + (status.address >> 2) + 0x200];
-  case 0x1ff5:
-  case 0x1ff6:
-  case 0x1ff7:
-    return cartridge.ram[addr];
-  }
-
-//never used, blocks compiler warning
-  return 0x00;
 }
 
-void OBC1::write(uint16 addr, uint8 data) {
+void OBC1::write(unsigned addr, uint8 data) {
   addr &= 0x1fff;
-
-  if((addr & 0x1ff8) != 0x1ff0) {
-    cartridge.ram[addr] = data;
-    return;
-  }
+  if((addr & 0x1ff8) != 0x1ff0) return ram_write(addr, data);
 
   switch(addr) {
-  case 0x1ff0:
-    cartridge.ram[status.baseptr + (status.address << 2) + 0] = data;
-    break;
-  case 0x1ff1:
-    cartridge.ram[status.baseptr + (status.address << 2) + 1] = data;
-    break;
-  case 0x1ff2:
-    cartridge.ram[status.baseptr + (status.address << 2) + 2] = data;
-    break;
-  case 0x1ff3:
-    cartridge.ram[status.baseptr + (status.address << 2) + 3] = data;
-    break;
-  case 0x1ff4: {
-  uint8 temp;
-    temp = cartridge.ram[status.baseptr + (status.address >> 2) + 0x200];
-    temp = (temp & ~(3 << status.shift)) | ((data & 3) << status.shift);
-    cartridge.ram[status.baseptr + (status.address >> 2) + 0x200] = temp;
-  } break;
-  case 0x1ff5:
-    status.baseptr = (data & 1) ? 0x1800 : 0x1c00;
-    cartridge.ram[addr] = data;
-    break;
-  case 0x1ff6:
-    status.address = (data & 0x7f);
-    status.shift   = (data & 3) << 1;
-    cartridge.ram[addr] = data;
-    break;
-  case 0x1ff7:
-    cartridge.ram[addr] = data;
-    break;
+    case 0x1ff0: ram_write(status.baseptr + (status.address << 2) + 0, data); break;
+    case 0x1ff1: ram_write(status.baseptr + (status.address << 2) + 1, data); break;
+    case 0x1ff2: ram_write(status.baseptr + (status.address << 2) + 2, data); break;
+    case 0x1ff3: ram_write(status.baseptr + (status.address << 2) + 3, data); break;
+    case 0x1ff4: {
+      uint8 temp = ram_read(status.baseptr + (status.address >> 2) + 0x200);
+      temp = (temp & ~(3 << status.shift)) | ((data & 3) << status.shift);
+      ram_write(status.baseptr + (status.address >> 2) + 0x200, temp);
+    } break;
+    case 0x1ff5: {
+      status.baseptr = (data & 1) ? 0x1800 : 0x1c00;
+      ram_write(addr, data);
+    } break;
+    case 0x1ff6: {
+      status.address = (data & 0x7f);
+      status.shift   = (data & 3) << 1;
+      ram_write(addr, data);
+    } break;
+    case 0x1ff7: {
+      ram_write(addr, data);
+    } break;
   }
 }
 
+uint8 OBC1::ram_read(unsigned addr) {
+  return memory::cartram.read(addr & 0x1fff);
+}
+
+void OBC1::ram_write(unsigned addr, uint8 data) {
+  memory::cartram.write(addr & 0x1fff, data);
+}
+
 OBC1::OBC1() {}
 OBC1::~OBC1() {}

src/chip/obc1/obc1.h

@@ -1,20 +0,0 @@
-class OBC1 {
-public:
-struct {
-  uint16 address;
-  uint16 baseptr;
-  uint16 shift;
-} status;
-  void   init();
-  void   enable();
-  void   power();
-  void   reset();
-
-  uint8  read (uint16 addr);
-  void   write(uint16 addr, uint8 data);
-
-  OBC1();
-  ~OBC1();
-};
-
-extern OBC1 obc1;

src/chip/obc1/obc1.hpp

@@ -0,0 +1,25 @@
+class OBC1 : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+
+  OBC1();
+  ~OBC1();
+
+private:
+  uint8 ram_read(unsigned addr);
+  void ram_write(unsigned addr, uint8 data);
+
+  struct {
+    uint16 address;
+    uint16 baseptr;
+    uint16 shift;
+  } status;
+};
+
+extern OBC1 obc1;

src/chip/sdd1/sdd1.cpp

@@ -1,12 +1,23 @@
-#include "../../base.h"
+#include <../base.hpp>
+#include <../cart/cart.hpp>
+#define SDD1_CPP
 
+#include "sdd1.hpp"
 #include "sdd1emu.cpp"
 
 void SDD1::init() {}
 
 void SDD1::enable() {
-  for(int i = 0x4800; i <= 0x4807; i++) {
-    r_mem->set_mmio_mapper(i, this);
+  //hook S-CPU DMA MMIO registers to gather information for struct dma[];
+  //buffer address and transfer size information for use in SDD1::read()
+  for(unsigned i = 0x4300; i <= 0x437f; i++) {
+    cpu_mmio[i & 0x7f] = memory::mmio.get(i);
+    memory::mmio.map(i, *this);
+  }
+
+  //hook S-DD1 MMIO registers
+  for(unsigned i = 0x4800; i <= 0x4807; i++) {
+    memory::mmio.map(i, *this);
   }
 }
 
@@ -15,78 +26,133 @@ void SDD1::power() {
 }
 
 void SDD1::reset() {
-  sdd1.index[0] = 0x000000;
-  sdd1.index[1] = 0x100000;
-  sdd1.index[2] = 0x200000;
-  sdd1.index[3] = 0x300000;
+  sdd1_enable = 0x00;
+  xfer_enable = 0x00;
 
-  for(int i=0;i<8;i++) {
-    sdd1.active[i] = false;
+  mmc[0] = 0 << 20;
+  mmc[1] = 1 << 20;
+  mmc[2] = 2 << 20;
+  mmc[3] = 3 << 20;
+
+  for(unsigned i = 0; i < 8; i++) {
+    dma[i].addr = 0;
+    dma[i].size = 0;
   }
 
-  sdd1.dma_active = false;
+  buffer.ready = false;
+
+  bus.map(Bus::MapDirect, 0xc0, 0xff, 0x0000, 0xffff, *this);
 }
 
-uint32 SDD1::offset(uint32 addr) {
-uint8 b = (addr >> 16) & 0xff;
-  if(b <= 0xbf)return 0;
+uint8 SDD1::mmio_read(unsigned addr) {
+  addr &= 0xffff;
 
-  b  -= 0xc0; //b = 0x00-0x3f
-  b >>= 4;    //b = 0-3
-  b  &= 3;    //bitmask
-
-  return sdd1.index[b] + (addr & 0x0fffff);
-}
-
-uint8 SDD1::mmio_read(uint16 addr) {
-  switch(addr) {
-  //>>20 == 0x100000 == 1mb
-  case 0x4804: return (sdd1.index[0] >> 20) & 7;
-  case 0x4805: return (sdd1.index[1] >> 20) & 7;
-  case 0x4806: return (sdd1.index[2] >> 20) & 7;
-  case 0x4807: return (sdd1.index[3] >> 20) & 7;
+  if((addr & 0x4380) == 0x4300) {
+    return cpu_mmio[addr & 0x7f]->mmio_read(addr);
   }
 
-  return r_cpu->regs.mdr;
+  switch(addr) {
+    case 0x4804: return (mmc[0] >> 20) & 7;
+    case 0x4805: return (mmc[1] >> 20) & 7;
+    case 0x4806: return (mmc[2] >> 20) & 7;
+    case 0x4807: return (mmc[3] >> 20) & 7;
+  }
+
+  return cpu.regs.mdr;
 }
 
-void SDD1::mmio_write(uint16 addr, uint8 data) {
-  switch(addr) {
-  case 0x4801:
-    for(int i = 0; i < 8; i++) {
-      sdd1.active[i] = !!(data & (1 << i));
+void SDD1::mmio_write(unsigned addr, uint8 data) {
+  addr &= 0xffff;
+
+  if((addr & 0x4380) == 0x4300) {
+    unsigned channel = (addr >> 4) & 7;
+    switch(addr & 15) {
+      case 2: dma[channel].addr = (dma[channel].addr & 0xffff00) + (data <<  0); break;
+      case 3: dma[channel].addr = (dma[channel].addr & 0xff00ff) + (data <<  8); break;
+      case 4: dma[channel].addr = (dma[channel].addr & 0x00ffff) + (data << 16); break;
+
+      case 5: dma[channel].size = (dma[channel].size &   0xff00) + (data <<  0); break;
+      case 6: dma[channel].size = (dma[channel].size &   0x00ff) + (data <<  8); break;
     }
-    break;
-  //<<20 == 0x100000 == 1mb
-  case 0x4804: sdd1.index[0] = (data & 7) << 20; break;
-  case 0x4805: sdd1.index[1] = (data & 7) << 20; break;
-  case 0x4806: sdd1.index[2] = (data & 7) << 20; break;
-  case 0x4807: sdd1.index[3] = (data & 7) << 20; break;
+    return cpu_mmio[addr & 0x7f]->mmio_write(addr, data);
+  }
+
+  switch(addr) {
+    case 0x4800: sdd1_enable = data; break;
+    case 0x4801: xfer_enable = data; break;
+
+    case 0x4804: mmc[0] = (data & 7) << 20; break;
+    case 0x4805: mmc[1] = (data & 7) << 20; break;
+    case 0x4806: mmc[2] = (data & 7) << 20; break;
+    case 0x4807: mmc[3] = (data & 7) << 20; break;
   }
 }
 
-void SDD1::dma_begin(uint8 channel, uint32 addr, uint16 length) {
-  if(sdd1.active[channel] == true) {
-    sdd1.active[channel] = false;
-    sdd1.dma_active   = true;
-    sdd1.buffer_index = 0;
-    sdd1.buffer_size  = length;
-    sdd1emu.decompress(addr, (length) ? length : 65536, sdd1.buffer);
-  }
+//SDD1::read() is mapped to $[c0-ff]:[0000-ffff]
+//the design is meant to be as close to the hardware design as possible, thus this code
+//avoids adding S-DD1 hooks inside S-CPU::DMA emulation.
+//
+//the real S-DD1 cannot see $420b (DMA enable) writes, as they are not placed on the bus.
+//however, $43x0-$43xf writes (DMAx channel settings) most likely do appear on the bus.
+//the S-DD1 also requires fixed addresses for transfers, which wouldn't be necessary if
+//it could see $420b writes (eg it would know when the transfer should begin.)
+//
+//the hardware needs a way to distinguish program code after $4801 writes from DMA
+//decompression that follows soon after.
+//
+//the only plausible design for hardware would be for the S-DD1 to spy on DMAx settings,
+//and begin spooling decompression on writes to $4801 that activate a channel. after that,
+//it feeds decompressed data only when the ROM read address matches the DMA channel address.
+//
+//the actual S-DD1 transfer can occur on any channel, but it is most likely limited to
+//one transfer per $420b write (for spooling purposes). however, this is not known for certain.
+uint8 SDD1::read(unsigned addr) {
+  if(sdd1_enable & xfer_enable) {
+    //at least one channel has S-DD1 decompression enabled ...
+    for(unsigned i = 0; i < 8; i++) {
+      if(sdd1_enable & xfer_enable & (1 << i)) {
+        //S-DD1 always uses fixed transfer mode, so address will not change during transfer
+        if(addr == dma[i].addr) {
+          if(!buffer.ready) {
+            //first byte read for channel performs full decompression.
+            //this really should stream byte-by-byte, but it's not necessary since the size is known
+            buffer.offset = 0;
+            buffer.size = dma[i].size ? dma[i].size : 65536;
+
+            //sdd1emu calls this function; it needs to access uncompressed data;
+            //so temporarily disable decompression mode for decompress() call.
+            uint8 temp = sdd1_enable;
+            sdd1_enable = false;
+            sdd1emu.decompress(addr, buffer.size, buffer.data);
+            sdd1_enable = temp;
+
+            buffer.ready = true;
+          }
+
+          //fetch a decompressed byte; once buffer is depleted, disable channel and invalidate buffer
+          uint8 data = buffer.data[(uint16)buffer.offset++];
+          if(buffer.offset >= buffer.size) {
+            buffer.ready = false;
+            xfer_enable &= ~(1 << i);
+          }
+
+          return data;
+        }  //address matched
+      }  //channel enabled
+    }  //channel loop
+  }  //S-DD1 decompressor enabled
+
+  //S-DD1 decompression mode inactive; return ROM data
+  return memory::cartrom.read(mmc[(addr >> 20) & 3] + (addr & 0x0fffff));
 }
 
-bool SDD1::dma_active() {
-  return sdd1.dma_active;
+void SDD1::write(unsigned addr, uint8 data) {
 }
 
-uint8 SDD1::dma_read() {
-  if(--sdd1.buffer_size == 0) {
-    sdd1.dma_active = false;
-  }
-
-//sdd1.buffer[] is 65536 bytes, and sdd1.buffer_index
-//is of type uint16, so no buffer overflow is possible
-  return sdd1.buffer[sdd1.buffer_index++];
+SDD1::SDD1() {
+  buffer.data = new uint8[65536];
 }
 
-SDD1::SDD1() {}
+SDD1::~SDD1() {
+  delete[] buffer.data;
+}

src/chip/sdd1/sdd1.h

@@ -1,32 +0,0 @@
-#include "sdd1emu.h"
-
-class SDD1 : public MMIO {
-public:
-SDD1emu sdd1emu;
-
-struct {
-  uint32 index[4];      //memory mapping registers
-  uint8  buffer[65536]; //pointer to decompressed S-DD1 data,
-                        //max. DMA length is 65536
-  uint16 buffer_index;  //DMA read index into S-DD1 decompression buffer
-  uint16 buffer_size;
-  bool   active[8];     //true when DMA channel should pass through S-DD1
-  bool   dma_active;
-} sdd1;
-  void   init();
-  void   enable();
-  void   power();
-  void   reset();
-  uint32 offset(uint32 addr);
-
-  void   dma_begin(uint8 channel, uint32 addr, uint16 length);
-  bool   dma_active();
-  uint8  dma_read();
-
-  uint8  mmio_read (uint16 addr);
-  void   mmio_write(uint16 addr, uint8 data);
-
-  SDD1();
-};
-
-extern SDD1 sdd1;

src/chip/sdd1/sdd1.hpp

@@ -0,0 +1,40 @@
+#include "sdd1emu.hpp"
+
+class SDD1 : public MMIO, public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 mmio_read(unsigned addr);
+  void mmio_write(unsigned addr, uint8 data);
+
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+
+  SDD1();
+  ~SDD1();
+
+private:
+  MMIO *cpu_mmio[0x80];  //bus spying hooks to glean information for struct dma[]
+
+  uint8 sdd1_enable;     //channel bit-mask
+  uint8 xfer_enable;     //channel bit-mask
+  unsigned mmc[4];       //memory map controller ROM indices
+
+  struct {
+    unsigned addr;       //$43x2-$43x4 -- DMA transfer address
+    uint16 size;         //$43x5-$43x6 -- DMA transfer size
+  } dma[8];
+
+  SDD1emu sdd1emu;
+  struct {
+    uint8 *data;         //pointer to decompressed S-DD1 data (65536 bytes)
+    uint16 offset;       //read index into S-DD1 decompression buffer
+    unsigned size;       //length of data buffer; reads decrement counter, set ready to false at 0
+    bool ready;          //true when data[] is valid; false to invoke sdd1emu.decompress()
+  } buffer;
+};
+
+extern SDD1 sdd1;

src/chip/sdd1/sdd1emu.cpp

@@ -1,3 +1,5 @@
+#ifdef SDD1_CPP
+
 /************************************************************************
 
 S-DD1'algorithm emulation code
@@ -28,7 +30,7 @@ understood.
 
 ************************************************************************/
 
-#define SDD1_read(__addr) (r_mem->read(__addr))
+#define SDD1_read(__addr) (sdd1.read(__addr))
 
 ////////////////////////////////////////////////////
 
@@ -445,3 +447,5 @@ SDD1emu::SDD1emu() :
 }
 
 ///////////////////////////////////////////////////////////
+
+#endif

src/chip/spc7110/decomp.cpp

@@ -0,0 +1,511 @@
+#ifdef SPC7110_CPP
+
+uint8 SPC7110Decomp::read() {
+  if(decomp_buffer_length == 0) {
+    //decompress at least (decomp_buffer_size / 2) bytes to the buffer
+    switch(decomp_mode) {
+      case 0: mode0(false); break;
+      case 1: mode1(false); break;
+      case 2: mode2(false); break;
+      default: return 0x00;
+    }
+  }
+
+  uint8 data = decomp_buffer[decomp_buffer_rdoffset++];
+  decomp_buffer_rdoffset &= decomp_buffer_size - 1;
+  decomp_buffer_length--;
+  return data;
+}
+
+void SPC7110Decomp::write(uint8 data) {
+  decomp_buffer[decomp_buffer_wroffset++] = data;
+  decomp_buffer_wroffset &= decomp_buffer_size - 1;
+  decomp_buffer_length++;
+}
+
+uint8 SPC7110Decomp::dataread() {
+  unsigned size = memory::cartrom.size() - 0x100000;
+  while(decomp_offset >= size) decomp_offset -= size;
+  return memory::cartrom.read(0x100000 + decomp_offset++);
+}
+
+void SPC7110Decomp::init(unsigned mode, unsigned offset, unsigned index) {
+  decomp_mode = mode;
+  decomp_offset = offset;
+
+  decomp_buffer_rdoffset = 0;
+  decomp_buffer_wroffset = 0;
+  decomp_buffer_length   = 0;
+
+  //reset context states
+  for(unsigned i = 0; i < 32; i++) {
+    context[i].index  = 0;
+    context[i].invert = 0;
+  }
+
+  switch(decomp_mode) {
+    case 0: mode0(true); break;
+    case 1: mode1(true); break;
+    case 2: mode2(true); break;
+  }
+
+  //decompress up to requested output data index
+  while(index--) read();
+}
+
+//
+
+void SPC7110Decomp::mode0(bool init) {
+  static uint8 val, in, span;
+  static int out, inverts, lps, in_count;
+
+  if(init == true) {
+    out = inverts = lps = 0;
+    span = 0xff;
+    val = dataread();
+    in = dataread();
+    in_count = 8;
+    return;
+  }
+
+  while(decomp_buffer_length < (decomp_buffer_size >> 1)) {
+    for(unsigned bit = 0; bit < 8; bit++) {
+      //get context
+      uint8 mask = (1 << (bit & 3)) - 1;
+      uint8 con = mask + ((inverts & mask) ^ (lps & mask));
+      if(bit > 3) con += 15;
+
+      //get prob and mps
+      unsigned prob = probability(con);
+      unsigned mps = (((out >> 15) & 1) ^ context[con].invert);
+
+      //get bit
+      unsigned flag_lps;
+      if(val <= span - prob) { //mps
+        span = span - prob;
+        out = (out << 1) + mps;
+        flag_lps = 0;
+      } else { //lps
+        val = val - (span - (prob - 1));
+        span = prob - 1;
+        out = (out << 1) + 1 - mps;
+        flag_lps = 1;
+      }
+
+      //renormalize
+      unsigned shift = 0;
+      while(span < 0x7f) {
+        shift++;
+
+        span = (span << 1) + 1;
+        val = (val << 1) + (in >> 7);
+
+        in <<= 1;
+        if(--in_count == 0) {
+          in = dataread();
+          in_count = 8;
+        }
+      }
+
+      //update processing info
+      lps = (lps << 1) + flag_lps;
+      inverts = (inverts << 1) + context[con].invert;
+
+      //update context state
+      if(flag_lps & toggle_invert(con)) context[con].invert ^= 1;
+      if(flag_lps) context[con].index = next_lps(con);
+      else if(shift) context[con].index = next_mps(con);
+    }
+
+    //save byte
+    write(out);
+  }
+}
+
+void SPC7110Decomp::mode1(bool init) {
+  static int pixelorder[4], realorder[4];
+  static uint8 in, val, span;
+  static int out, inverts, lps, in_count;
+
+  if(init == true) {
+    for(unsigned i = 0; i < 4; i++) pixelorder[i] = i;
+    out = inverts = lps = 0;
+    span = 0xff;
+    val = dataread();
+    in = dataread();
+    in_count = 8;
+    return;
+  }
+
+  while(decomp_buffer_length < (decomp_buffer_size >> 1)) {
+    for(unsigned pixel = 0; pixel < 8; pixel++) {
+      //get first symbol context
+      unsigned a = ((out >> (1 * 2)) & 3);
+      unsigned b = ((out >> (7 * 2)) & 3);
+      unsigned c = ((out >> (8 * 2)) & 3);
+      unsigned con = (a == b) ? (b != c) : (b == c) ? 2 : 4 - (a == c);
+
+      //update pixel order
+      unsigned m, n;
+      for(m = 0; m < 4; m++) if(pixelorder[m] == a) break;
+      for(n = m; n > 0; n--) pixelorder[n] = pixelorder[n - 1];
+      pixelorder[0] = a;
+
+      //calculate the real pixel order
+      for(m = 0; m < 4; m++) realorder[m] = pixelorder[m];
+
+      //rotate reference pixel c value to top
+      for(m = 0; m < 4; m++) if(realorder[m] == c) break;
+      for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
+      realorder[0] = c;
+
+      //rotate reference pixel b value to top
+      for(m = 0; m < 4; m++) if(realorder[m] == b) break;
+      for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
+      realorder[0] = b;
+
+      //rotate reference pixel a value to top
+      for(m = 0; m < 4; m++) if(realorder[m] == a) break;
+      for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
+      realorder[0] = a;
+
+      //get 2 symbols
+      for(unsigned bit = 0; bit < 2; bit++) {
+        //get prob
+        unsigned prob = probability(con);
+
+        //get symbol
+        unsigned flag_lps;
+        if(val <= span - prob) { //mps
+          span = span - prob;
+          flag_lps = 0;
+        } else { //lps
+          val = val - (span - (prob - 1));
+          span = prob - 1;
+          flag_lps = 1;
+        }
+
+        //renormalize
+        unsigned shift = 0;
+        while(span < 0x7f) {
+          shift++;
+
+          span = (span << 1) + 1;
+          val = (val << 1) + (in >> 7);
+
+          in <<= 1;
+          if(--in_count == 0) {
+            in = dataread();
+            in_count = 8;
+          }
+        }
+
+        //update processing info
+        lps = (lps << 1) + flag_lps;
+        inverts = (inverts << 1) + context[con].invert;
+
+        //update context state
+        if(flag_lps & toggle_invert(con)) context[con].invert ^= 1;
+        if(flag_lps) context[con].index = next_lps(con);
+        else if(shift) context[con].index = next_mps(con);
+
+        //get next context
+        con = 5 + (con << 1) + ((lps ^ inverts) & 1);
+      }
+
+      //get pixel
+      b = realorder[(lps ^ inverts) & 3];
+      out = (out << 2) + b;
+    }
+
+    //turn pixel data into bitplanes
+    unsigned data = morton_2x8(out);
+    write(data >> 8);
+    write(data >> 0);
+  }
+}
+
+void SPC7110Decomp::mode2(bool init) {
+  static int pixelorder[16], realorder[16];
+  static uint8 bitplanebuffer[16], buffer_index;
+  static uint8 in, val, span;
+  static int out0, out1, inverts, lps, in_count;
+
+  if(init == true) {
+    for(unsigned i = 0; i < 16; i++) pixelorder[i] = i;
+    buffer_index = 0;
+    out0 = out1 = inverts = lps = 0;
+    span = 0xff;
+    val = dataread();
+    in = dataread();
+    in_count = 8;
+    return;
+  }
+
+  while(decomp_buffer_length < (decomp_buffer_size >> 1)) {
+    for(unsigned pixel = 0; pixel < 8; pixel++) {
+      //get first symbol context
+      unsigned a = ((out0 >> (0 * 4)) & 15);
+      unsigned b = ((out0 >> (7 * 4)) & 15);
+      unsigned c = ((out1 >> (0 * 4)) & 15);
+      unsigned con = 0;
+      unsigned refcon = (a == b) ? (b != c) : (b == c) ? 2 : 4 - (a == c);
+
+      //update pixel order
+      unsigned m, n;
+      for(m = 0; m < 16; m++) if(pixelorder[m] == a) break;
+      for(n = m; n >  0; n--) pixelorder[n] = pixelorder[n - 1];
+      pixelorder[0] = a;
+
+      //calculate the real pixel order
+      for(m = 0; m < 16; m++) realorder[m] = pixelorder[m];
+
+      //rotate reference pixel c value to top
+      for(m = 0; m < 16; m++) if(realorder[m] == c) break;
+      for(n = m; n >  0; n--) realorder[n] = realorder[n - 1];
+      realorder[0] = c;
+
+      //rotate reference pixel b value to top
+      for(m = 0; m < 16; m++) if(realorder[m] == b) break;
+      for(n = m; n >  0; n--) realorder[n] = realorder[n - 1];
+      realorder[0] = b;
+
+      //rotate reference pixel a value to top
+      for(m = 0; m < 16; m++) if(realorder[m] == a) break;
+      for(n = m; n >  0; n--) realorder[n] = realorder[n - 1];
+      realorder[0] = a;
+
+      //get 4 symbols
+      for(unsigned bit = 0; bit < 4; bit++) {
+        //get prob
+        unsigned prob = probability(con);
+
+        //get symbol
+        unsigned flag_lps;
+        if(val <= span - prob) { //mps
+          span = span - prob;
+          flag_lps = 0;
+        } else { //lps
+          val = val - (span - (prob - 1));
+          span = prob - 1;
+          flag_lps = 1;
+        }
+
+        //renormalize
+        unsigned shift = 0;
+        while(span < 0x7f) {
+          shift++;
+
+          span = (span << 1) + 1;
+          val = (val << 1) + (in >> 7);
+
+          in <<= 1;
+          if(--in_count == 0) {
+            in = dataread();
+            in_count = 8;
+          }
+        }
+
+        //update processing info
+        lps = (lps << 1) + flag_lps;
+        unsigned invertbit = context[con].invert;
+        inverts = (inverts << 1) + invertbit;
+
+        //update context state
+        if(flag_lps & toggle_invert(con)) context[con].invert ^= 1;
+        if(flag_lps) context[con].index = next_lps(con);
+        else if(shift) context[con].index = next_mps(con);
+
+        //get next context
+        con = mode2_context_table[con][flag_lps ^ invertbit] + (con == 1 ? refcon : 0);
+      }
+
+      //get pixel
+      b = realorder[(lps ^ inverts) & 0x0f];
+      out1 = (out1 << 4) + ((out0 >> 28) & 0x0f);
+      out0 = (out0 << 4) + b;
+    }
+
+    //convert pixel data into bitplanes
+    unsigned data = morton_4x8(out0);
+    write(data >> 24);
+    write(data >> 16);
+    bitplanebuffer[buffer_index++] = data >> 8;
+    bitplanebuffer[buffer_index++] = data >> 0;
+
+    if(buffer_index == 16) {
+      for(unsigned i = 0; i < 16; i++) write(bitplanebuffer[i]);
+      buffer_index = 0;
+    }
+  }
+}
+
+//
+
+const uint8 SPC7110Decomp::evolution_table[53][4] = {
+//{ prob, nextlps, nextmps, toggle invert },
+
+  { 0x5a,  1,  1, 1 },
+  { 0x25,  6,  2, 0 },
+  { 0x11,  8,  3, 0 },
+  { 0x08, 10,  4, 0 },
+  { 0x03, 12,  5, 0 },
+  { 0x01, 15,  5, 0 },
+
+  { 0x5a,  7,  7, 1 },
+  { 0x3f, 19,  8, 0 },
+  { 0x2c, 21,  9, 0 },
+  { 0x20, 22, 10, 0 },
+  { 0x17, 23, 11, 0 },
+  { 0x11, 25, 12, 0 },
+  { 0x0c, 26, 13, 0 },
+  { 0x09, 28, 14, 0 },
+  { 0x07, 29, 15, 0 },
+  { 0x05, 31, 16, 0 },
+  { 0x04, 32, 17, 0 },
+  { 0x03, 34, 18, 0 },
+  { 0x02, 35,  5, 0 },
+
+  { 0x5a, 20, 20, 1 },
+  { 0x48, 39, 21, 0 },
+  { 0x3a, 40, 22, 0 },
+  { 0x2e, 42, 23, 0 },
+  { 0x26, 44, 24, 0 },
+  { 0x1f, 45, 25, 0 },
+  { 0x19, 46, 26, 0 },
+  { 0x15, 25, 27, 0 },
+  { 0x11, 26, 28, 0 },
+  { 0x0e, 26, 29, 0 },
+  { 0x0b, 27, 30, 0 },
+  { 0x09, 28, 31, 0 },
+  { 0x08, 29, 32, 0 },
+  { 0x07, 30, 33, 0 },
+  { 0x05, 31, 34, 0 },
+  { 0x04, 33, 35, 0 },
+  { 0x04, 33, 36, 0 },
+  { 0x03, 34, 37, 0 },
+  { 0x02, 35, 38, 0 },
+  { 0x02, 36,  5, 0 },
+
+  { 0x58, 39, 40, 1 },
+  { 0x4d, 47, 41, 0 },
+  { 0x43, 48, 42, 0 },
+  { 0x3b, 49, 43, 0 },
+  { 0x34, 50, 44, 0 },
+  { 0x2e, 51, 45, 0 },
+  { 0x29, 44, 46, 0 },
+  { 0x25, 45, 24, 0 },
+
+  { 0x56, 47, 48, 1 },
+  { 0x4f, 47, 49, 0 },
+  { 0x47, 48, 50, 0 },
+  { 0x41, 49, 51, 0 },
+  { 0x3c, 50, 52, 0 },
+  { 0x37, 51, 43, 0 },
+};
+
+const uint8 SPC7110Decomp::mode2_context_table[32][2] = {
+//{ next 0, next 1 },
+
+  {  1,  2 },
+
+  {  3,  8 },
+  { 13, 14 },
+
+  { 15, 16 },
+  { 17, 18 },
+  { 19, 20 },
+  { 21, 22 },
+  { 23, 24 },
+  { 25, 26 },
+  { 25, 26 },
+  { 25, 26 },
+  { 25, 26 },
+  { 25, 26 },
+  { 27, 28 },
+  { 29, 30 },
+
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+  { 31, 31 },
+
+  { 31, 31 },
+};
+
+uint8 SPC7110Decomp::probability  (unsigned n) { return evolution_table[context[n].index][0]; }
+uint8 SPC7110Decomp::next_lps     (unsigned n) { return evolution_table[context[n].index][1]; }
+uint8 SPC7110Decomp::next_mps     (unsigned n) { return evolution_table[context[n].index][2]; }
+bool  SPC7110Decomp::toggle_invert(unsigned n) { return evolution_table[context[n].index][3]; }
+
+unsigned SPC7110Decomp::morton_2x8(unsigned data) {
+  //reverse morton lookup: de-interleave two 8-bit values
+  //15, 13, 11,  9,  7,  5,  3,  1 -> 15- 8
+  //14, 12, 10,  8,  6,  4,  2,  0 ->  7- 0
+  return morton16[0][(data >>  0) & 255] + morton16[1][(data >>  8) & 255];
+}
+
+unsigned SPC7110Decomp::morton_4x8(unsigned data) {
+  //reverse morton lookup: de-interleave four 8-bit values
+  //31, 27, 23, 19, 15, 11,  7,  3 -> 31-24
+  //30, 26, 22, 18, 14, 10,  6,  2 -> 23-16
+  //29, 25, 21, 17, 13,  9,  5,  1 -> 15- 8
+  //28, 24, 20, 16, 12,  8,  4,  0 ->  7- 0
+  return morton32[0][(data >>  0) & 255] + morton32[1][(data >>  8) & 255]
+       + morton32[2][(data >> 16) & 255] + morton32[3][(data >> 24) & 255];
+}
+
+//
+
+void SPC7110Decomp::reset() {
+  //mode 3 is invalid; this is treated as a special case to always return 0x00
+  //set to mode 3 so that reading decomp port before starting first decomp will return 0x00
+  decomp_mode = 3;
+
+  decomp_buffer_rdoffset = 0;
+  decomp_buffer_wroffset = 0;
+  decomp_buffer_length   = 0;
+}
+
+SPC7110Decomp::SPC7110Decomp() {
+  decomp_buffer = new uint8_t[decomp_buffer_size];
+  reset();
+
+  //initialize reverse morton lookup tables
+  for(unsigned i = 0; i < 256; i++) {
+    #define map(x, y) (((i >> x) & 1) << y)
+    //2x8-bit
+    morton16[1][i] = map(7, 15) + map(6,  7) + map(5, 14) + map(4,  6)
+                   + map(3, 13) + map(2,  5) + map(1, 12) + map(0,  4);
+    morton16[0][i] = map(7, 11) + map(6,  3) + map(5, 10) + map(4,  2)
+                   + map(3,  9) + map(2,  1) + map(1,  8) + map(0,  0);
+    //4x8-bit
+    morton32[3][i] = map(7, 31) + map(6, 23) + map(5, 15) + map(4,  7)
+                   + map(3, 30) + map(2, 22) + map(1, 14) + map(0,  6);
+    morton32[2][i] = map(7, 29) + map(6, 21) + map(5, 13) + map(4,  5)
+                   + map(3, 28) + map(2, 20) + map(1, 12) + map(0,  4);
+    morton32[1][i] = map(7, 27) + map(6, 19) + map(5, 11) + map(4,  3)
+                   + map(3, 26) + map(2, 18) + map(1, 10) + map(0,  2);
+    morton32[0][i] = map(7, 25) + map(6, 17) + map(5,  9) + map(4,  1)
+                   + map(3, 24) + map(2, 16) + map(1,  8) + map(0,  0);
+    #undef map
+  }
+}
+
+SPC7110Decomp::~SPC7110Decomp() {
+  delete[] decomp_buffer;
+}
+
+#endif

src/chip/spc7110/decomp.hpp

@@ -0,0 +1,45 @@
+class SPC7110Decomp {
+public:
+  uint8 read();
+  void init(unsigned mode, unsigned offset, unsigned index);
+  void reset();
+
+  SPC7110Decomp();
+  ~SPC7110Decomp();
+
+private:
+  unsigned decomp_mode;
+  unsigned decomp_offset;
+
+  //read() will spool chunks half the size of decomp_buffer_size
+  enum { decomp_buffer_size = 64 }; //must be >= 64, and must be a power of two
+  uint8 *decomp_buffer;
+  unsigned decomp_buffer_rdoffset;
+  unsigned decomp_buffer_wroffset;
+  unsigned decomp_buffer_length;
+
+  void write(uint8 data);
+  uint8 dataread();
+
+  void mode0(bool init);
+  void mode1(bool init);
+  void mode2(bool init);
+
+  static const uint8 evolution_table[53][4];
+  static const uint8 mode2_context_table[32][2];
+
+  struct ContextState {
+    uint8 index;
+    uint8 invert;
+  } context[32];
+
+  uint8 probability(unsigned n);
+  uint8 next_lps(unsigned n);
+  uint8 next_mps(unsigned n);
+  bool toggle_invert(unsigned n);
+
+  unsigned morton16[2][256];
+  unsigned morton32[4][256];
+  unsigned morton_2x8(unsigned data);
+  unsigned morton_4x8(unsigned data);
+};

src/chip/spc7110/spc7110.cpp

@@ -0,0 +1,672 @@
+#include <../base.hpp>
+#include <../cart/cart.hpp>
+#define SPC7110_CPP
+
+#include "spc7110.hpp"
+#include "decomp.cpp"
+
+const unsigned SPC7110::months[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
+
+void SPC7110::init() {}
+
+void SPC7110::enable() {
+  uint16_t limit = (cartridge.has_spc7110rtc() ? 0x4842 : 0x483f);
+  for(uint16_t i = 0x4800; i <= limit; i++) memory::mmio.map(i, *this);
+}
+
+void SPC7110::power() {
+  reset();
+}
+
+void SPC7110::reset() {
+  r4801 = 0x00;
+  r4802 = 0x00;
+  r4803 = 0x00;
+  r4804 = 0x00;
+  r4805 = 0x00;
+  r4806 = 0x00;
+  r4807 = 0x00;
+  r4808 = 0x00;
+  r4809 = 0x00;
+  r480a = 0x00;
+  r480b = 0x00;
+  r480c = 0x00;
+
+  decomp.reset();
+
+  r4811 = 0x00;
+  r4812 = 0x00;
+  r4813 = 0x00;
+  r4814 = 0x00;
+  r4815 = 0x00;
+  r4816 = 0x00;
+  r4817 = 0x00;
+  r4818 = 0x00;
+
+  r481x = 0x00;
+  r4814_latch = false;
+  r4815_latch = false;
+
+  r4820 = 0x00;
+  r4821 = 0x00;
+  r4822 = 0x00;
+  r4823 = 0x00;
+  r4824 = 0x00;
+  r4825 = 0x00;
+  r4826 = 0x00;
+  r4827 = 0x00;
+  r4828 = 0x00;
+  r4829 = 0x00;
+  r482a = 0x00;
+  r482b = 0x00;
+  r482c = 0x00;
+  r482d = 0x00;
+  r482e = 0x00;
+  r482f = 0x00;
+
+  r4830 = 0x00;
+  mmio_write(0x4831, 0);
+  mmio_write(0x4832, 1);
+  mmio_write(0x4833, 2);
+  r4834 = 0x00;
+
+  r4840 = 0x00;
+  r4841 = 0x00;
+  r4842 = 0x00;
+
+  if(cartridge.has_spc7110rtc()) {
+    rtc_state = RTCS_Inactive;
+    rtc_mode  = RTCM_Linear;
+    rtc_index = 0;
+  }
+}
+
+unsigned SPC7110::datarom_addr(unsigned addr) {
+  unsigned size = memory::cartrom.size() - 0x100000;
+  while(addr >= size) addr -= size;
+  return addr + 0x100000;
+}
+
+unsigned SPC7110::data_pointer()   { return r4811 + (r4812 << 8) + (r4813 << 16); }
+unsigned SPC7110::data_adjust()    { return r4814 + (r4815 << 8); }
+unsigned SPC7110::data_increment() { return r4816 + (r4817 << 8); }
+void SPC7110::set_data_pointer(unsigned addr) { r4811 = addr; r4812 = addr >> 8; r4813 = addr >> 16; }
+void SPC7110::set_data_adjust(unsigned addr)  { r4814 = addr; r4815 = addr >> 8; }
+
+void SPC7110::update_time(int offset) {
+  time_t rtc_time
+  = (memory::cartrtc.read(16) <<  0)
+  | (memory::cartrtc.read(17) <<  8)
+  | (memory::cartrtc.read(18) << 16)
+  | (memory::cartrtc.read(19) << 24);
+  time_t current_time = time(0) - offset;
+
+  //sizeof(time_t) is platform-dependent; though memory::cartrtc needs to be platform-agnostic.
+  //yet platforms with 32-bit signed time_t will overflow every ~68 years. handle this by
+  //accounting for overflow at the cost of 1-bit precision (to catch underflow). this will allow
+  //memory::cartrtc timestamp to remain valid for up to ~34 years from the last update, even if
+  //time_t overflows. calculation should be valid regardless of number representation, time_t size,
+  //or whether time_t is signed or unsigned.
+  time_t diff
+  = (current_time >= rtc_time)
+  ? (current_time - rtc_time)
+  : (std::numeric_limits<time_t>::max() - rtc_time + current_time + 1);  //compensate for overflow
+  if(diff > std::numeric_limits<time_t>::max() / 2) diff = 0;            //compensate for underflow
+
+  bool update = true;
+  if(memory::cartrtc.read(13) & 1) update = false;  //do not update if CR0 timer disable flag is set
+  if(memory::cartrtc.read(15) & 3) update = false;  //do not update if CR2 timer disable flags are set
+
+  if(diff > 0 && update == true) {
+    unsigned second  = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
+    unsigned minute  = memory::cartrtc.read( 2) + memory::cartrtc.read( 3) * 10;
+    unsigned hour    = memory::cartrtc.read( 4) + memory::cartrtc.read( 5) * 10;
+    unsigned day     = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
+    unsigned month   = memory::cartrtc.read( 8) + memory::cartrtc.read( 9) * 10;
+    unsigned year    = memory::cartrtc.read(10) + memory::cartrtc.read(11) * 10;
+    unsigned weekday = memory::cartrtc.read(12);
+
+    day--;
+    month--;
+    year += (year >= 90) ? 1900 : 2000;  //range = 1990-2089
+
+    second += diff;
+    while(second >= 60) {
+      second -= 60;
+
+      minute++;
+      if(minute < 60) continue;
+      minute = 0;
+
+      hour++;
+      if(hour < 24) continue;
+      hour = 0;
+
+      day++;
+      weekday = (weekday + 1) % 7;
+      unsigned days = months[month % 12];
+      if(days == 28) {
+        bool leapyear = false;
+        if((year % 4) == 0) {
+          leapyear = true;
+          if((year % 100) == 0 && (year % 400) != 0) leapyear = false;
+        }
+        if(leapyear) days++;
+      }
+      if(day < days) continue;
+      day = 0;
+
+      month++;
+      if(month < 12) continue;
+      month = 0;
+
+      year++;
+    }
+
+    day++;
+    month++;
+    year %= 100;
+
+    memory::cartrtc.write( 0, second % 10);
+    memory::cartrtc.write( 1, second / 10);
+    memory::cartrtc.write( 2, minute % 10);
+    memory::cartrtc.write( 3, minute / 10);
+    memory::cartrtc.write( 4, hour % 10);
+    memory::cartrtc.write( 5, hour / 10);
+    memory::cartrtc.write( 6, day % 10);
+    memory::cartrtc.write( 7, day / 10);
+    memory::cartrtc.write( 8, month % 10);
+    memory::cartrtc.write( 9, month / 10);
+    memory::cartrtc.write(10, year % 10);
+    memory::cartrtc.write(11, (year / 10) % 10);
+    memory::cartrtc.write(12, weekday % 7);
+  }
+
+  memory::cartrtc.write(16, current_time >>  0);
+  memory::cartrtc.write(17, current_time >>  8);
+  memory::cartrtc.write(18, current_time >> 16);
+  memory::cartrtc.write(19, current_time >> 24);
+}
+
+uint8 SPC7110::mmio_read(unsigned addr) {
+  addr &= 0xffff;
+
+  switch(addr) {
+    //==================
+    //decompression unit
+    //==================
+
+    case 0x4800: {
+      uint16 counter = (r4809 + (r480a << 8));
+      counter--;
+      r4809 = counter;
+      r480a = counter >> 8;
+      return decomp.read();
+    }
+    case 0x4801: return r4801;
+    case 0x4802: return r4802;
+    case 0x4803: return r4803;
+    case 0x4804: return r4804;
+    case 0x4805: return r4805;
+    case 0x4806: return r4806;
+    case 0x4807: return r4807;
+    case 0x4808: return r4808;
+    case 0x4809: return r4809;
+    case 0x480a: return r480a;
+    case 0x480b: return r480b;
+    case 0x480c: {
+      uint8 status = r480c;
+      r480c &= 0x7f;
+      return status;
+    }
+
+    //==============
+    //data port unit
+    //==============
+
+    case 0x4810: {
+      if(r481x != 0x07) return 0x00;
+
+      unsigned addr = data_pointer();
+      unsigned adjust = data_adjust();
+      if(r4818 & 8) adjust = (int16)adjust;  //16-bit sign extend
+
+      unsigned adjustaddr = addr;
+      if(r4818 & 2) {
+        adjustaddr += adjust;
+        set_data_adjust(adjust + 1);
+      }
+
+      uint8 data = memory::cartrom.read(datarom_addr(adjustaddr));
+      if(!(r4818 & 2)) {
+        unsigned increment = (r4818 & 1) ? data_increment() : 1;
+        if(r4818 & 4) increment = (int16)increment;  //16-bit sign extend
+
+        if((r4818 & 16) == 0) {
+          set_data_pointer(addr + increment);
+        } else {
+          set_data_adjust(adjust + increment);
+        }
+      }
+
+      return data;
+    }
+    case 0x4811: return r4811;
+    case 0x4812: return r4812;
+    case 0x4813: return r4813;
+    case 0x4814: return r4814;
+    case 0x4815: return r4815;
+    case 0x4816: return r4816;
+    case 0x4817: return r4817;
+    case 0x4818: return r4818;
+    case 0x481a: {
+      if(r481x != 0x07) return 0x00;
+
+      unsigned addr = data_pointer();
+      unsigned adjust = data_adjust();
+      if(r4818 & 8) adjust = (int16)adjust;  //16-bit sign extend
+
+      uint8 data = memory::cartrom.read(datarom_addr(addr + adjust));
+      if((r4818 & 0x60) == 0x60) {
+        if((r4818 & 16) == 0) {
+          set_data_pointer(addr + adjust);
+        } else {
+          set_data_adjust(adjust + adjust);
+        }
+      }
+
+      return data;
+    }
+
+    //=========
+    //math unit
+    //=========
+
+    case 0x4820: return r4820;
+    case 0x4821: return r4821;
+    case 0x4822: return r4822;
+    case 0x4823: return r4823;
+    case 0x4824: return r4824;
+    case 0x4825: return r4825;
+    case 0x4826: return r4826;
+    case 0x4827: return r4827;
+    case 0x4828: return r4828;
+    case 0x4829: return r4829;
+    case 0x482a: return r482a;
+    case 0x482b: return r482b;
+    case 0x482c: return r482c;
+    case 0x482d: return r482d;
+    case 0x482e: return r482e;
+    case 0x482f: {
+      uint8 status = r482f;
+      r482f &= 0x7f;
+      return status;
+    }
+
+    //===================
+    //memory mapping unit
+    //===================
+
+    case 0x4830: return r4830;
+    case 0x4831: return r4831;
+    case 0x4832: return r4832;
+    case 0x4833: return r4833;
+    case 0x4834: return r4834;
+
+    //====================
+    //real-time clock unit
+    //====================
+
+    case 0x4840: return r4840;
+    case 0x4841: {
+      if(rtc_state == RTCS_Inactive || rtc_state == RTCS_ModeSelect) return 0x00;
+
+      r4842 = 0x80;
+      uint8 data = memory::cartrtc.read(rtc_index);
+      rtc_index = (rtc_index + 1) & 15;
+      return data;
+    }
+    case 0x4842: {
+      uint8 status = r4842;
+      r4842 &= 0x7f;
+      return status;
+    }
+  }
+
+  return cpu.regs.mdr;
+}
+
+void SPC7110::mmio_write(unsigned addr, uint8 data) {
+  addr &= 0xffff;
+
+  switch(addr) {
+    //==================
+    //decompression unit
+    //==================
+
+    case 0x4801: r4801 = data; break;
+    case 0x4802: r4802 = data; break;
+    case 0x4803: r4803 = data; break;
+    case 0x4804: r4804 = data; break;
+    case 0x4805: r4805 = data; break;
+    case 0x4806: {
+      r4806 = data;
+
+      unsigned table   = (r4801 + (r4802 << 8) + (r4803 << 16));
+      unsigned index   = (r4804 << 2);
+      unsigned length  = (r4809 + (r480a << 8));
+      unsigned addr    = datarom_addr(table + index);
+      unsigned mode    = (memory::cartrom.read(addr + 0));
+      unsigned offset  = (memory::cartrom.read(addr + 1) << 16)
+                       + (memory::cartrom.read(addr + 2) <<  8)
+                       + (memory::cartrom.read(addr + 3) <<  0);
+
+      decomp.init(mode, offset, (r4805 + (r4806 << 8)) << mode);
+      r480c = 0x80;
+    } break;
+
+    case 0x4807: r4807 = data; break;
+    case 0x4808: r4808 = data; break;
+    case 0x4809: r4809 = data; break;
+    case 0x480a: r480a = data; break;
+    case 0x480b: r480b = data; break;
+
+    //==============
+    //data port unit
+    //==============
+
+    case 0x4811: r4811 = data; r481x |= 0x01; break;
+    case 0x4812: r4812 = data; r481x |= 0x02; break;
+    case 0x4813: r4813 = data; r481x |= 0x04; break;
+    case 0x4814: {
+      r4814 = data;
+      r4814_latch = true;
+      if(!r4815_latch) break;
+      if(!(r4818 & 2)) break;
+      if(r4818 & 0x10) break;
+
+      if((r4818 & 0x60) == 0x20) {
+        unsigned increment = data_adjust() & 0xff;
+        if(r4818 & 8) increment = (int8)increment;  //8-bit sign extend
+        set_data_pointer(data_pointer() + increment);
+      } else if((r4818 & 0x60) == 0x40) {
+        unsigned increment = data_adjust();
+        if(r4818 & 8) increment = (int16)increment;  //16-bit sign extend
+        set_data_pointer(data_pointer() + increment);
+      }
+    } break;
+    case 0x4815: {
+      r4815 = data;
+      r4815_latch = true;
+      if(!r4814_latch) break;
+      if(!(r4818 & 2)) break;
+      if(r4818 & 0x10) break;
+
+      if((r4818 & 0x60) == 0x20) {
+        unsigned increment = data_adjust() & 0xff;
+        if(r4818 & 8) increment = (int8)increment;  //8-bit sign extend
+        set_data_pointer(data_pointer() + increment);
+      } else if((r4818 & 0x60) == 0x40) {
+        unsigned increment = data_adjust();
+        if(r4818 & 8) increment = (int16)increment;  //16-bit sign extend
+        set_data_pointer(data_pointer() + increment);
+      }
+    } break;
+    case 0x4816: r4816 = data; break;
+    case 0x4817: r4817 = data; break;
+    case 0x4818: {
+      if(r481x != 0x07) break;
+
+      r4818 = data;
+      r4814_latch = r4815_latch = false;
+    } break;
+
+    //=========
+    //math unit
+    //=========
+
+    case 0x4820: r4820 = data; break;
+    case 0x4821: r4821 = data; break;
+    case 0x4822: r4822 = data; break;
+    case 0x4823: r4823 = data; break;
+    case 0x4824: r4824 = data; break;
+    case 0x4825: {
+      r4825 = data;
+
+      if(r482e & 1) {
+        //signed 16-bit x 16-bit multiplication
+        int16 r0 = (int16)(r4824 + (r4825 << 8));
+        int16 r1 = (int16)(r4820 + (r4821 << 8));
+
+        signed result = r0 * r1;
+        r4828 = result;
+        r4829 = result >> 8;
+        r482a = result >> 16;
+        r482b = result >> 24;
+      } else {
+        //unsigned 16-bit x 16-bit multiplication
+        uint16 r0 = (uint16)(r4824 + (r4825 << 8));
+        uint16 r1 = (uint16)(r4820 + (r4821 << 8));
+
+        unsigned result = r0 * r1;
+        r4828 = result;
+        r4829 = result >> 8;
+        r482a = result >> 16;
+        r482b = result >> 24;
+      }
+
+      r482f = 0x80;
+    } break;
+    case 0x4826: r4826 = data; break;
+    case 0x4827: {
+      r4827 = data;
+
+      if(r482e & 1) {
+        //signed 32-bit x 16-bit division
+        int32 dividend = (int32)(r4820 + (r4821 << 8) + (r4822 << 16) + (r4823 << 24));
+        int16 divisor  = (int16)(r4826 + (r4827 << 8));
+
+        int32 quotient;
+        int16 remainder;
+
+        if(divisor) {
+          quotient  = (int32)(dividend / divisor);
+          remainder = (int32)(dividend % divisor);
+        } else {
+          //illegal division by zero
+          quotient  = 0;
+          remainder = dividend & 0xffff;
+        }
+
+        r4828 = quotient;
+        r4829 = quotient >> 8;
+        r482a = quotient >> 16;
+        r482b = quotient >> 24;
+
+        r482c = remainder;
+        r482d = remainder >> 8;
+      } else {
+        //unsigned 32-bit x 16-bit division
+        uint32 dividend = (uint32)(r4820 + (r4821 << 8) + (r4822 << 16) + (r4823 << 24));
+        uint16 divisor  = (uint16)(r4826 + (r4827 << 8));
+
+        uint32 quotient;
+        uint16 remainder;
+
+        if(divisor) {
+          quotient  = (uint32)(dividend / divisor);
+          remainder = (uint16)(dividend % divisor);
+        } else {
+          //illegal division by zero
+          quotient  = 0;
+          remainder = dividend & 0xffff;
+        }
+
+        r4828 = quotient;
+        r4829 = quotient >> 8;
+        r482a = quotient >> 16;
+        r482b = quotient >> 24;
+
+        r482c = remainder;
+        r482d = remainder >> 8;
+      }
+
+      r482f = 0x80;
+    } break;
+
+    case 0x482e: {
+      //reset math unit
+      r4820 = r4821 = r4822 = r4823 = 0;
+      r4824 = r4825 = r4826 = r4827 = 0;
+      r4828 = r4829 = r482a = r482b = 0;
+      r482c = r482d = 0;
+
+      r482e = data;
+    } break;
+
+    //===================
+    //memory mapping unit
+    //===================
+
+    case 0x4830: r4830 = data; break;
+
+    case 0x4831: {
+      r4831 = data;
+      dx_offset = datarom_addr((data & 7) * 0x100000);
+    } break;
+
+    case 0x4832: {
+      r4832 = data;
+      ex_offset = datarom_addr((data & 7) * 0x100000);
+    } break;
+
+    case 0x4833: {
+      r4833 = data;
+      fx_offset = datarom_addr((data & 7) * 0x100000);
+    } break;
+
+    case 0x4834: r4834 = data; break;
+
+    //====================
+    //real-time clock unit
+    //====================
+
+    case 0x4840: {
+      r4840 = data;
+      if(!(r4840 & 1)) {
+        //disable RTC
+        rtc_state = RTCS_Inactive;
+        update_time();
+      } else {
+        //enable RTC
+        r4842 = 0x80;
+        rtc_state = RTCS_ModeSelect;
+      }
+    } break;
+
+    case 0x4841: {
+      r4841 = data;
+
+      switch(rtc_state) {
+        case RTCS_ModeSelect: {
+          if(data == RTCM_Linear || data == RTCM_Indexed) {
+            r4842 = 0x80;
+            rtc_state = RTCS_IndexSelect;
+            rtc_mode  = (RTC_Mode)data;
+            rtc_index = 0;
+          }
+        } break;
+
+        case RTCS_IndexSelect: {
+          r4842 = 0x80;
+          rtc_index = data & 15;
+          if(rtc_mode == RTCM_Linear) rtc_state = RTCS_Write;
+        } break;
+
+        case RTCS_Write: {
+          r4842 = 0x80;
+
+          //control register 0
+          if(rtc_index == 13) {
+            //increment second counter
+            if(data & 2) update_time(+1);
+
+            //round minute counter
+            if(data & 8) {
+              update_time();
+
+              unsigned second = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
+              //clear seconds
+              memory::cartrtc.write(0, 0);
+              memory::cartrtc.write(1, 0);
+
+              if(second >= 30) update_time(+60);
+            }
+          }
+
+          //control register 2
+          if(rtc_index == 15) {
+            //disable timer and clear second counter
+            if((data & 1) && !(memory::cartrtc.read(15) & 1)) {
+              update_time();
+
+              //clear seconds
+              memory::cartrtc.write(0, 0);
+              memory::cartrtc.write(1, 0);
+            }
+
+            //disable timer
+            if((data & 2) && !(memory::cartrtc.read(15) & 2)) {
+              update_time();
+            }
+          }
+
+          memory::cartrtc.write(rtc_index, data & 15);
+          rtc_index = (rtc_index + 1) & 15;
+        } break;
+      } //switch(rtc_state)
+    } break;
+  }
+}
+
+uint8 SPC7110::read(unsigned addr) {
+  //$[00-0f|80-8f]:[8000-ffff], $[c0-cf]:[0000-ffff] mapped directly to memory::cartrom
+
+  if((addr & 0xffe000) == 0x006000 || (addr & 0xffe000) == 0x306000) {
+    //$[00|30]:[6000-7fff]
+    return memory::cartram.read(addr & 0x1fff);
+  }
+
+  if((addr & 0xff0000) == 0x500000) {
+    //$[50]:[0000-ffff]
+    return mmio_read(0x4800);
+  }
+
+  if((addr & 0xf00000) == 0xd00000) {
+    //$[d0-df]:[0000-ffff]
+    return memory::cartrom.read(dx_offset + (addr & 0x0fffff));
+  }
+
+  if((addr & 0xf00000) == 0xe00000) {
+    //$[e0-ef]:[0000-ffff]
+    return memory::cartrom.read(ex_offset + (addr & 0x0fffff));
+  }
+
+  if((addr & 0xf00000) == 0xf00000) {
+    //$[f0-ff]:[0000-ffff]
+    return memory::cartrom.read(fx_offset + (addr & 0x0fffff));
+  }
+
+  return cpu.regs.mdr;
+}
+
+void SPC7110::write(unsigned addr, uint8 data) {
+  if((addr & 0xffe000) == 0x006000 || (addr & 0xffe000) == 0x306000) {
+    //$[00|30]:[6000-7fff]
+    if(r4830 & 0x80) memory::cartram.write(addr & 0x1fff, data);
+    return;
+  }
+}
+
+SPC7110::SPC7110() {
+}

src/chip/spc7110/spc7110.hpp

@@ -0,0 +1,133 @@
+/*****
+ * SPC7110 emulator - version 0.03 (2008-08-10)
+ * Copyright (c) 2008, byuu and neviksti
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * The software is provided "as is" and the author disclaims all warranties
+ * with regard to this software including all implied warranties of
+ * merchantibility and fitness, in no event shall the author be liable for
+ * any special, direct, indirect, or consequential damages or any damages
+ * whatsoever resulting from loss of use, data or profits, whether in an
+ * action of contract, negligence or other tortious action, arising out of
+ * or in connection with the use or performance of this software.
+ *****/
+
+#include "decomp.hpp"
+
+class SPC7110 : public MMIO, public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  unsigned datarom_addr(unsigned addr);
+
+  unsigned data_pointer();
+  unsigned data_adjust();
+  unsigned data_increment();
+  void set_data_pointer(unsigned addr);
+  void set_data_adjust(unsigned addr);
+
+  void update_time(int offset = 0);
+  time_t create_time();
+
+  uint8 mmio_read (unsigned addr);
+  void  mmio_write(unsigned addr, uint8 data);
+
+  uint8 read (unsigned addr);
+  void  write(unsigned addr, uint8 data);
+
+  //spc7110decomp
+  void decomp_init();
+  uint8 decomp_read();
+
+  SPC7110();
+
+private:
+  //==================
+  //decompression unit
+  //==================
+  uint8 r4801; //compression table low
+  uint8 r4802; //compression table high
+  uint8 r4803; //compression table bank
+  uint8 r4804; //compression table index
+  uint8 r4805; //decompression buffer index low
+  uint8 r4806; //decompression buffer index high
+  uint8 r4807; //???
+  uint8 r4808; //???
+  uint8 r4809; //compression length low
+  uint8 r480a; //compression length high
+  uint8 r480b; //decompression control register
+  uint8 r480c; //decompression status
+
+  SPC7110Decomp decomp;
+
+  //==============
+  //data port unit
+  //==============
+  uint8 r4811; //data pointer low
+  uint8 r4812; //data pointer high
+  uint8 r4813; //data pointer bank
+  uint8 r4814; //data adjust low
+  uint8 r4815; //data adjust high
+  uint8 r4816; //data increment low
+  uint8 r4817; //data increment high
+  uint8 r4818; //data port control register
+
+  uint8 r481x;
+
+  bool r4814_latch;
+  bool r4815_latch;
+
+  //=========
+  //math unit
+  //=========
+  uint8 r4820; //16-bit multiplicand B0, 32-bit dividend B0
+  uint8 r4821; //16-bit multiplicand B1, 32-bit dividend B1
+  uint8 r4822; //32-bit dividend B2
+  uint8 r4823; //32-bit dividend B3
+  uint8 r4824; //16-bit multiplier B0
+  uint8 r4825; //16-bit multiplier B1
+  uint8 r4826; //16-bit divisor B0
+  uint8 r4827; //16-bit divisor B1
+  uint8 r4828; //32-bit product B0, 32-bit quotient B0
+  uint8 r4829; //32-bit product B1, 32-bit quotient B1
+  uint8 r482a; //32-bit product B2, 32-bit quotient B2
+  uint8 r482b; //32-bit product B3, 32-bit quotient B3
+  uint8 r482c; //16-bit remainder B0
+  uint8 r482d; //16-bit remainder B1
+  uint8 r482e; //math control register
+  uint8 r482f; //math status
+
+  //===================
+  //memory mapping unit
+  //===================
+  uint8 r4830; //SRAM write enable
+  uint8 r4831; //$[d0-df]:[0000-ffff] mapping
+  uint8 r4832; //$[e0-ef]:[0000-ffff] mapping
+  uint8 r4833; //$[f0-ff]:[0000-ffff] mapping
+  uint8 r4834; //???
+
+  unsigned dx_offset;
+  unsigned ex_offset;
+  unsigned fx_offset;
+
+  //====================
+  //real-time clock unit
+  //====================
+  uint8 r4840; //RTC latch
+  uint8 r4841; //RTC index/data port
+  uint8 r4842; //RTC status
+
+  enum RTC_State { RTCS_Inactive, RTCS_ModeSelect, RTCS_IndexSelect, RTCS_Write } rtc_state;
+  enum RTC_Mode  { RTCM_Linear = 0x03, RTCM_Indexed = 0x0c } rtc_mode;
+  unsigned rtc_index;
+
+  static const unsigned months[12];
+};
+
+extern SPC7110 spc7110;

src/chip/srtc/srtc.cpp

@@ -1,189 +1,226 @@
-/*
-  S-RTC chip emulation
-  Used by Hudson Soft in Dai Kaijuu Monogatari II and Far East of Eden Zero.
-  Currently, only the former is supported by bsnes.
-
-  Original S-RTC emulation code via John Weidman/SNES9x
-  Rewritten for compatibility with bsnes via byuu
-
-  The S-RTC is a real-time clock chip that was added to the above two carts
-  to allow the games to maintain the current time, even when the game was not
-  powered on. Thus allowing special events at certain times, and on certain
-  dates. Hudson Soft called this the PLG (Player's Life Gameplay System).
-
-  This chip is a special case to the term 'emulation' itself.
-  There are a few different ways to go about emulating this chip, and each
-  result in a different style of emulation.
-
-  The first is to simply return the current PC system time when the S-RTC is
-  read from. This emulates the original S-RTC in the sense that it always
-  returns the true current time, ignoring the speed that the SNES itself is
-  running at. The downside to this method is that you lose the ability to set
-  the time to whatever you choose inside the game itself. It will always return
-  the true time, regardless. This can be overcome by changing the PC system time,
-  which actually adds a greater degree of control over event timing, very useful
-  for emulation. It also has a timeshifting flaw discussed below.
-
-  The second is to run the S-RTC relative to the SNES speed. This means that
-  if the emulator is sped up (via fast forward key, frameskipping, etc), or
-  slowed down (via slowdown key, system bottlenecking, etc); the time increments
-  slower, thus ~60 frames on the SNES equal one second. Without this, timeshifting
-  will occur between the S-RTC and the real SNES.
-
-  The third and final method is to save a copy of the local system time when the
-  S-RTC is initially set, and compare the current system time against this value
-  when setting the S-RTC time. This overcomes the first methods' shortcoming of
-  not allowing the player to set the time in-game, however a new problem arises.
-  You now have to save the time when the RTC was initially set to both savestates
-  and to save-game data. This would require an extra file, or the breaking of
-  perhaps the only standard format (.srm savegame backups) in the entire SNES
-  emulation scene. You also give up the control of being able to override the
-  RTC clock at will via the PC system time outside of emulation.
-  The first method has another advantage over the third: Dai Kaijuu Monogatari II
-  only allows dates in the range of the years 1996-2199. The first method gets
-  around this limitation. But who knows, maybe it will break something in the
-  game if the date exceeds 2199... I guess we'll worry about that in two hundred
-  years from now.
-
-  For my implementation, I chose to go with the first method. Both for simplicity
-  and because I did not wish to create a new method for saving the system time
-  whenever the RTC is set.
-*/
-
-#include "../../base.h"
-
-void SRTC::set_time() {
-time_t rawtime;
-tm *t;
-  ::time(&rawtime);
-  t = localtime(&rawtime);
-
-//see srtc.h for format of srtc.data[]
-  srtc.data[0]  = t->tm_sec % 10;
-  srtc.data[1]  = t->tm_sec / 10;
-  srtc.data[2]  = t->tm_min % 10;
-  srtc.data[3]  = t->tm_min / 10;
-  srtc.data[4]  = t->tm_hour % 10;
-  srtc.data[5]  = t->tm_hour / 10;
-  srtc.data[6]  = t->tm_mday % 10;
-  srtc.data[7]  = t->tm_mday / 10;
-  srtc.data[8]  = t->tm_mon + 1;
-  srtc.data[9]  = t->tm_year % 10;
-  srtc.data[10] = (t->tm_year / 10) % 10;
-  srtc.data[11] = 9 + (t->tm_year / 100);
-  srtc.data[12] = t->tm_wday;
-}
-
-void SRTC::init() {}
-
-void SRTC::enable() {
-  r_mem->set_mmio_mapper(0x2800, this);
-  r_mem->set_mmio_mapper(0x2801, this);
-}
-
-void SRTC::power() {
-  memset(&srtc, 0, sizeof(srtc));
-  reset();
-}
-
-void SRTC::reset() {
-  srtc.index = -1;
-  srtc.mode  = SRTC_READ;
-}
-
-uint8 SRTC::mmio_read(uint16 addr) {
-  switch(addr) {
-
-  case 0x2800: {
-    if(srtc.mode == SRTC_READ) {
-      if(srtc.index < 0) {
-        set_time();
-        srtc.index++;
-        return 0x0f; //send start message
-      } else if(srtc.index > MAX_SRTC_INDEX) {
-        srtc.index = -1;
-        return 0x0f; //send finished message
-      } else {
-        return srtc.data[srtc.index++];
-      }
-    } else {
-      return 0x00;
-    }
-  } break;
-
-  case 0x2801: {
-  } break;
-
-  }
-
-  return r_cpu->regs.mdr;
-}
-
-//Please see notes above about the implementation of the S-RTC
-//Writes are stored the srtc.data[] array, but they are ignored
-//as reads will refresh the data array with the current system
-//time. The write method is only here for the sake of faux
-//emulation of the real hardware.
-void SRTC::mmio_write(uint16 addr, uint8 data) {
-  switch(addr) {
-
-  case 0x2800: {
-  } break;
-
-  case 0x2801: {
-    data &= 0x0f; //only the low four bits are used
-
-    if(data >= 0x0d) {
-      switch(data) {
-      case 0x0d:
-        srtc.mode  = SRTC_READ;
-        srtc.index = -1;
-        break;
-      case 0x0e:
-        srtc.mode = SRTC_COMMAND;
-        break;
-      case 0x0f:
-      //unknown behaviour
-        break;
-      }
-      return;
-    }
-
-    if(srtc.mode == SRTC_WRITE) {
-      if(srtc.index >= 0 && srtc.index < MAX_SRTC_INDEX) {
-        srtc.data[srtc.index++] = data;
-
-        if(srtc.index == MAX_SRTC_INDEX) {
-        //all S-RTC data has been loaded by program
-          srtc.data[srtc.index++] = 0x00; //day_of_week
-        }
-      }
-    } else if(srtc.mode == SRTC_COMMAND) {
-      switch(data) {
-      case SRTC_COMMAND_CLEAR:
-        memset(srtc.data, 0, MAX_SRTC_INDEX + 1);
-        srtc.index = -1;
-        srtc.mode  = SRTC_READY;
-        break;
-      case SRTC_COMMAND_WRITE:
-        srtc.index = 0;
-        srtc.mode  = SRTC_WRITE;
-        break;
-      default:
-      //unknown behaviour
-        srtc.mode  = SRTC_READY;
-        break;
-      }
-    } else {
-      if(srtc.mode == SRTC_READ) {
-      //ignore writes while in read mode
-      } else if(srtc.mode == SRTC_READY) {
-      //unknown behaviour
-      }
-    }
-  } break;
-
-  }
-}
-
-SRTC::SRTC() {}
+#include <../base.hpp>
+#include <../cart/cart.hpp>
+#include "srtc.hpp"
+
+const unsigned SRTC::months[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
+
+void SRTC::init() {
+}
+
+void SRTC::enable() {
+  memory::mmio.map(0x2800, *this);
+  memory::mmio.map(0x2801, *this);
+}
+
+void SRTC::power() {
+  reset();
+}
+
+void SRTC::reset() {
+  rtc_mode = RTCM_Read;
+  rtc_index = -1;
+  update_time();
+}
+
+void SRTC::update_time() {
+  time_t rtc_time
+  = (memory::cartrtc.read(16) <<  0)
+  | (memory::cartrtc.read(17) <<  8)
+  | (memory::cartrtc.read(18) << 16)
+  | (memory::cartrtc.read(19) << 24);
+  time_t current_time = time(0);
+
+  //sizeof(time_t) is platform-dependent; though memory::cartrtc needs to be platform-agnostic.
+  //yet platforms with 32-bit signed time_t will overflow every ~68 years. handle this by
+  //accounting for overflow at the cost of 1-bit precision (to catch underflow). this will allow
+  //memory::cartrtc timestamp to remain valid for up to ~34 years from the last update, even if
+  //time_t overflows. calculation should be valid regardless of number representation, time_t size,
+  //or whether time_t is signed or unsigned.
+  time_t diff
+  = (current_time >= rtc_time)
+  ? (current_time - rtc_time)
+  : (std::numeric_limits<time_t>::max() - rtc_time + current_time + 1);  //compensate for overflow
+  if(diff > std::numeric_limits<time_t>::max() / 2) diff = 0;            //compensate for underflow
+
+  if(diff > 0) {
+    unsigned second  = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
+    unsigned minute  = memory::cartrtc.read( 2) + memory::cartrtc.read( 3) * 10;
+    unsigned hour    = memory::cartrtc.read( 4) + memory::cartrtc.read( 5) * 10;
+    unsigned day     = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
+    unsigned month   = memory::cartrtc.read( 8);
+    unsigned year    = memory::cartrtc.read( 9) + memory::cartrtc.read(10) * 10 + memory::cartrtc.read(11) * 100;
+    unsigned weekday = memory::cartrtc.read(12);
+
+    day--;
+    month--;
+    year += 1000;
+
+    second += diff;
+    while(second >= 60) {
+      second -= 60;
+
+      minute++;
+      if(minute < 60) continue;
+      minute = 0;
+
+      hour++;
+      if(hour < 24) continue;
+      hour = 0;
+
+      day++;
+      weekday = (weekday + 1) % 7;
+      unsigned days = months[month % 12];
+      if(days == 28) {
+        bool leapyear = false;
+        if((year % 4) == 0) {
+          leapyear = true;
+          if((year % 100) == 0 && (year % 400) != 0) leapyear = false;
+        }
+        if(leapyear) days++;
+      }
+      if(day < days) continue;
+      day = 0;
+
+      month++;
+      if(month < 12) continue;
+      month = 0;
+
+      year++;
+    }
+
+    day++;
+    month++;
+    year -= 1000;
+
+    memory::cartrtc.write( 0, second % 10);
+    memory::cartrtc.write( 1, second / 10);
+    memory::cartrtc.write( 2, minute % 10);
+    memory::cartrtc.write( 3, minute / 10);
+    memory::cartrtc.write( 4, hour % 10);
+    memory::cartrtc.write( 5, hour / 10);
+    memory::cartrtc.write( 6, day % 10);
+    memory::cartrtc.write( 7, day / 10);
+    memory::cartrtc.write( 8, month);
+    memory::cartrtc.write( 9, year % 10);
+    memory::cartrtc.write(10, (year / 10) % 10);
+    memory::cartrtc.write(11, year / 100);
+    memory::cartrtc.write(12, weekday % 7);
+  }
+
+  memory::cartrtc.write(16, current_time >>  0);
+  memory::cartrtc.write(17, current_time >>  8);
+  memory::cartrtc.write(18, current_time >> 16);
+  memory::cartrtc.write(19, current_time >> 24);
+}
+
+//returns day of week for specified date
+//eg 0 = Sunday, 1 = Monday, ... 6 = Saturday
+//usage: weekday(2008, 1, 1) returns weekday of January 1st, 2008
+unsigned SRTC::weekday(unsigned year, unsigned month, unsigned day) {
+  unsigned y = 1900, m = 1;  //epoch is 1900-01-01
+  unsigned sum = 0;          //number of days passed since epoch
+
+  year = max(1900, year);
+  month = max(1, min(12, month));
+  day = max(1, min(31, day));
+
+  while(y < year) {
+    bool leapyear = false;
+    if((y % 4) == 0) {
+      leapyear = true;
+      if((y % 100) == 0 && (y % 400) != 0) leapyear = false;
+    }
+    sum += leapyear ? 366 : 365;
+    y++;
+  }
+
+  while(m < month) {
+    unsigned days = months[m - 1];
+    if(days == 28) {
+      bool leapyear = false;
+      if((y % 4) == 0) {
+        leapyear = true;
+        if((y % 100) == 0 && (y % 400) != 0) leapyear = false;
+      }
+      if(leapyear) days++;
+    }
+    sum += days;
+    m++;
+  }
+
+  sum += day - 1;
+  return (sum + 1) % 7;  //1900-01-01 was a Monday
+}
+
+uint8 SRTC::mmio_read(unsigned addr) {
+  addr &= 0xffff;
+
+  if(addr == 0x2800) {
+    if(rtc_mode != RTCM_Read) return 0x00;
+
+    if(rtc_index < 0) {
+      update_time();
+      rtc_index++;
+      return 0x0f;
+    } else if(rtc_index > 12) {
+      rtc_index = -1;
+      return 0x0f;
+    } else {
+      return memory::cartrtc.read(rtc_index++);
+    }
+  }
+
+  return cpu.regs.mdr;
+}
+
+void SRTC::mmio_write(unsigned addr, uint8 data) {
+  addr &= 0xffff;
+
+  if(addr == 0x2801) {
+    data &= 0x0f;  //only the low four bits are used
+
+    if(data == 0x0d) {
+      rtc_mode = RTCM_Read;
+      rtc_index = -1;
+      return;
+    }
+
+    if(data == 0x0e) {
+      rtc_mode = RTCM_Command;
+      return;
+    }
+
+    if(data == 0x0f) return;  //unknown behavior
+
+    if(rtc_mode == RTCM_Write) {
+      if(rtc_index >= 0 && rtc_index < 12) {
+        memory::cartrtc.write(rtc_index++, data);
+
+        if(rtc_index == 12) {
+          //day of week is automatically calculated and written
+          unsigned day   = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
+          unsigned month = memory::cartrtc.read( 8);
+          unsigned year  = memory::cartrtc.read( 9) + memory::cartrtc.read(10) * 10 + memory::cartrtc.read(11) * 100;
+          year += 1000;
+
+          memory::cartrtc.write(rtc_index++, weekday(year, month, day));
+        }
+      }
+    } else if(rtc_mode == RTCM_Command) {
+      if(data == 0) {
+        rtc_mode = RTCM_Write;
+        rtc_index = 0;
+      } else if(data == 4) {
+        rtc_mode = RTCM_Ready;
+        rtc_index = -1;
+        for(unsigned i = 0; i < 13; i++) memory::cartrtc.write(i, 0);
+      } else {
+        //unknown behavior
+        rtc_mode = RTCM_Ready;
+      }
+    }
+  }
+}
+
+SRTC::SRTC() {
+}

src/chip/srtc/srtc.h

@@ -1,52 +0,0 @@
-class SRTC : public MMIO {
-public:
-enum { MAX_SRTC_INDEX = 0x0c };
-
-enum {
-  SRTC_READ = 0,
-  SRTC_WRITE,
-  SRTC_COMMAND,
-  SRTC_READY
-};
-
-enum {
-  SRTC_COMMAND_WRITE = 0,
-  SRTC_COMMAND_CLEAR = 4
-};
-
-/******************************
-[srtc.data structure]
-Index  Description   Range
------  -----------   -----
-    0  Seconds low   0-9
-    1  Seconds high  0-5
-    2  Minutes low   0-9
-    3  Minutes high  0-5
-    4  Hour low      0-9
-    5  Hour high     0-2
-    6  Day low       0-9
-    7  Day high      0-3
-    8  Month         1-12
-    9  Year ones     0-9
-   10  Year tens     0-9
-   11  Year hundreds 9-11 (9=19xx, 10=20xx, 11=21xx)
-   12  Day of week   0-6  (0=Sunday, ...)
-******************************/
-struct {
-  int8  index;
-  uint8 mode;
-  uint8 data[MAX_SRTC_INDEX + 1];
-} srtc;
-  void  set_time();
-  void  init();
-  void  enable();
-  void  power();
-  void  reset();
-
-  uint8 mmio_read (uint16 addr);
-  void  mmio_write(uint16 addr, uint8 data);
-
-  SRTC();
-};
-
-extern SRTC srtc;

src/chip/srtc/srtc.hpp

@@ -0,0 +1,22 @@
+class SRTC : public MMIO {
+public:
+  void update_time();
+  unsigned weekday(unsigned year, unsigned month, unsigned day);
+
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 mmio_read (unsigned addr);
+  void  mmio_write(unsigned addr, uint8 data);
+
+  SRTC();
+
+private:
+  static const unsigned months[12];
+  enum RTC_Mode { RTCM_Ready, RTCM_Command, RTCM_Read, RTCM_Write } rtc_mode;
+  signed rtc_index;
+};
+
+extern SRTC srtc;

src/chip/st010/st010.cpp

@@ -1,5 +1,8 @@
-#include "../../base.h"
-#include "st010_data.h"
+#include <../base.hpp>
+#define ST010_CPP
+
+#include "st010.hpp"
+#include "st010_data.hpp"
 #include "st010_op.cpp"
 
 int16 ST010::sin(int16 theta) {
@@ -60,23 +63,23 @@ void ST010::reset() {
 
 //
 
-uint8 ST010::read(uint16 addr) {
+uint8 ST010::read(unsigned addr) {
   return readb(addr);
 }
 
-void ST010::write(uint16 addr, uint8 data) {
+void ST010::write(unsigned addr, uint8 data) {
   writeb(addr, data);
 
-  if(addr == 0x0021 && data & 0x80) {
+  if((addr & 0xfff) == 0x0021 && (data & 0x80)) {
     switch(ram[0x0020]) {
-    case 0x01: op_01(); break;
-    case 0x02: op_02(); break;
-    case 0x03: op_03(); break;
-    case 0x04: op_04(); break;
-    case 0x05: op_05(); break;
-    case 0x06: op_06(); break;
-    case 0x07: op_07(); break;
-    case 0x08: op_08(); break;
+      case 0x01: op_01(); break;
+      case 0x02: op_02(); break;
+      case 0x03: op_03(); break;
+      case 0x04: op_04(); break;
+      case 0x05: op_05(); break;
+      case 0x06: op_06(); break;
+      case 0x07: op_07(); break;
+      case 0x08: op_08(); break;
     }
 
     ram[0x0021] &= ~0x80;

src/chip/st010/st010.hpp

@@ -1,8 +1,19 @@
-class ST010 { public:
-uint8 ram[0x1000];
-static const int16 sin_table[256];
-static const int16 mode7_scale[176];
-static const uint8 arctan[32][32];
+class ST010 : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read (unsigned addr);
+  void  write(unsigned addr, uint8 data);
+
+private:
+  uint8 ram[0x1000];
+  static const int16 sin_table[256];
+  static const int16 mode7_scale[176];
+  static const uint8 arctan[32][32];
+
 //interfaces to sin table
   int16 sin(int16 theta);
   int16 cos(int16 theta);
@@ -26,15 +37,6 @@ static const uint8 arctan[32][32];
   void op_08();
 
   void op_01(int16 x0, int16 y0, int16 &x1, int16 &y1, int16 &quadrant, int16 &theta);
-
-//base
-  void init();
-  void enable();
-  void power();
-  void reset();
-
-  uint8 read (uint16 addr);
-  void  write(uint16 addr, uint8 data);
 };
 
 extern ST010 st010;

src/chip/st010/st010_op.cpp

@@ -1,3 +1,5 @@
+#ifdef ST010_CPP
+
 //ST-010 emulation code - Copyright (C) 2003 The Dumper, Matthew Kendora, Overload, Feather
 //bsnes port - Copyright (C) 2007 byuu
 
@@ -255,3 +257,5 @@ int16 x1, y1;
   writew(0x0010, x1);
   writew(0x0012, y1);
 }
+
+#endif

src/chip/superfx/core/core.h

@@ -1,3 +0,0 @@
-void op_unknown() {}
-
-void op_00();

src/chip/superfx/core/op0x.cpp

@@ -1,7 +0,0 @@
-//STOP
-void SuperFX::op_00() {
-  regs.sfr.g = 0;
-  regs.sfr.b = 0;
-  regs.sfr.alt1 = 0;
-  regs.sfr.alt2 = 0;
-}

src/chip/superfx/memory/read.cpp

@@ -1,64 +0,0 @@
-uint8 SuperFX::mmio_read(uint16 addr) {
-  switch(addr) {
-  case 0x3000: return regs.r0.l;
-  case 0x3001: return regs.r0.h;
-  case 0x3002: return regs.r1.l;
-  case 0x3003: return regs.r1.h;
-  case 0x3004: return regs.r2.l;
-  case 0x3005: return regs.r2.h;
-  case 0x3006: return regs.r3.l;
-  case 0x3007: return regs.r3.h;
-  case 0x3008: return regs.r4.l;
-  case 0x3009: return regs.r4.h;
-  case 0x300a: return regs.r5.l;
-  case 0x300b: return regs.r5.h;
-  case 0x300c: return regs.r6.l;
-  case 0x300d: return regs.r6.h;
-  case 0x300e: return regs.r7.l;
-  case 0x300f: return regs.r7.h;
-
-  case 0x3010: return regs.r8.l;
-  case 0x3011: return regs.r8.h;
-  case 0x3012: return regs.r9.l;
-  case 0x3013: return regs.r9.h;
-  case 0x3014: return regs.r10.l;
-  case 0x3015: return regs.r10.h;
-  case 0x3016: return regs.r11.l;
-  case 0x3017: return regs.r11.h;
-  case 0x3018: return regs.r12.l;
-  case 0x3019: return regs.r12.h;
-  case 0x301a: return regs.r13.l;
-  case 0x301b: return regs.r13.h;
-  case 0x301c: return regs.r14.l;
-  case 0x301d: return regs.r14.h;
-  case 0x301e: return regs.r15.l;
-  case 0x301f: return regs.r15.h;
-
-//0x3020 - 0x302f unused
-
-  case 0x3030: return regs.sfr;
-  case 0x3031: return regs.sfr >> 8;
-  case 0x3032: return 0x00; //unused
-  case 0x3033: return 0x00; //BRAMR (write only)
-  case 0x3034: return regs.pbr;
-  case 0x3035: return 0x00; //unused
-  case 0x3036: return regs.rombr;
-  case 0x3037: return 0x00; //CFGR (write only)
-  case 0x3038: return 0x00; //SCBR (write only)
-  case 0x3039: return 0x00; //CLSR (write only)
-  case 0x303a: return 0x00; //SCMR (write only)
-  case 0x303b: return regs.vcr;
-  case 0x303c: return regs.rambr;
-  case 0x303d: return 0x00; //unused
-  case 0x303e: return regs.cbr;
-  case 0x303f: return regs.cbr >> 8;
-
-//0x3040 - 0x30ff unused
-  }
-
-  if(addr >= 0x3100 && addr <= 0x32ff) {
-    return cache[addr - 0x3100];
-  }
-
-  return 0x00;
-}

src/chip/superfx/memory/write.cpp

@@ -1,63 +0,0 @@
-void SuperFX::mmio_write(uint16 addr, uint8 data) {
-  switch(addr) {
-  case 0x3000: regs.r0.l  = data; return;
-  case 0x3001: regs.r0.h  = data; return;
-  case 0x3002: regs.r1.l  = data; return;
-  case 0x3003: regs.r1.h  = data; return;
-  case 0x3004: regs.r2.l  = data; return;
-  case 0x3005: regs.r2.h  = data; return;
-  case 0x3006: regs.r3.l  = data; return;
-  case 0x3007: regs.r3.h  = data; return;
-  case 0x3008: regs.r4.l  = data; return;
-  case 0x3009: regs.r4.h  = data; return;
-  case 0x300a: regs.r5.l  = data; return;
-  case 0x300b: regs.r5.h  = data; return;
-  case 0x300c: regs.r6.l  = data; return;
-  case 0x300d: regs.r6.h  = data; return;
-  case 0x300e: regs.r7.l  = data; return;
-  case 0x300f: regs.r7.h  = data; return;
-
-  case 0x3010: regs.r8.l  = data; return;
-  case 0x3011: regs.r8.h  = data; return;
-  case 0x3012: regs.r9.l  = data; return;
-  case 0x3013: regs.r9.h  = data; return;
-  case 0x3014: regs.r10.l = data; return;
-  case 0x3015: regs.r10.h = data; return;
-  case 0x3016: regs.r11.l = data; return;
-  case 0x3017: regs.r11.h = data; return;
-  case 0x3018: regs.r12.l = data; return;
-  case 0x3019: regs.r12.h = data; return;
-  case 0x301a: regs.r13.l = data; return;
-  case 0x301b: regs.r13.h = data; return;
-  case 0x301c: regs.r14.l = data; return;
-  case 0x301d: regs.r14.h = data; return;
-  case 0x301e: regs.r15.l = data; return;
-  case 0x301f: regs.r15.h = data; return;
-
-//0x3020 - 0x302f unused
-
-  case 0x3030: regs.sfr.l = data & 0x7e; return; //mask invalid bits
-  case 0x3031: regs.sfr.h = data & 0x9f; return; //mask invalid bits
-  case 0x3032: return; //unused
-  case 0x3033: regs.bramr = data; return;
-  case 0x3034: regs.pbr = data; return;
-  case 0x3035: return; //unused
-  case 0x3036: return; //ROMBR (read only)
-  case 0x3037: regs.cfgr = data; return;
-  case 0x3038: regs.scbr = data; return;
-  case 0x3039: regs.clsr = data; return;
-  case 0x303a: regs.scmr = data; return;
-  case 0x303b: return; //VCR (read only)
-  case 0x303c: return; //RAMBR (read only)
-  case 0x303d: return; //unused
-  case 0x303e: return; //CBR low (read only)
-  case 0x303f: return; //CBR high (read only)
-
-//0x3040 - 0x30ff unused
-  }
-
-  if(addr >= 0x3100 && addr <= 0x32ff) {
-    cache[addr - 0x3100] = data;
-    return;
-  }
-}

src/chip/superfx/regs.h

@@ -1,174 +0,0 @@
-struct Reg16 {
-  union {
-    uint16 w;
-    struct { uint8 order_lsb2(l, h); };
-  };
-
-  inline operator unsigned() const { return w; }
-  inline unsigned operator=(const unsigned i) { return w = i; }
-
-  Reg16() : w(0) {}
-};
-
-template<int bit> struct RegFlag8 {
-  uint8 data;
-
-  inline operator bool() const { return data & bit; }
-  inline bool operator=(const bool i) { i ? data |= bit : data &= ~bit; return i; }
-};
-
-template<int bit> struct RegFlag16 {
-  uint16 data;
-
-  inline operator bool() const { return data & bit; }
-  inline bool operator=(const bool i) { i ? data |= bit : data &= ~bit; return i; }
-};
-
-struct SFR {
-  union {
-    uint16 w;
-    struct { uint8 order_lsb2(l, h); };
-    RegFlag16<0x0002> z;    //zero flag
-    RegFlag16<0x0004> c;    //carry flag
-    RegFlag16<0x0008> s;    //sign flag
-    RegFlag16<0x0010> v;    //overflow flag
-    RegFlag16<0x0020> g;    //go flag
-    RegFlag16<0x0040> r;    //ROM read using r14 flag
-    RegFlag16<0x0100> alt1; //alternate instruction 1 flag
-    RegFlag16<0x0200> alt2; //alternate instruction 2 flag
-    RegFlag16<0x0400> il;   //immediate lower 8-bit flag
-    RegFlag16<0x0800> ih;   //immediate upper 8-bit flag
-    RegFlag16<0x1000> b;    //WITH instruction flag
-    RegFlag16<0x8000> irq;  //interrupt flag
-  };
-
-  inline operator unsigned() const { return w & 0x9f7e; } //invalid flag bits always return 0 when read
-  inline unsigned operator=(const unsigned i) { return w = i & 0x9f7e; }
-
-  SFR() : w(0) {}
-};
-
-struct RAMBR {
-  union {
-    uint8 b;
-    RegFlag8<0x01> bank;
-  };
-
-  inline operator unsigned() const { return b & 0x01; }
-  inline unsigned operator=(const unsigned i) { return b = i & 0x01; }
-
-  RAMBR() : b(0) {}
-};
-
-struct CBR {
-  uint16 w;
-
-  inline operator unsigned() const { return w & 0xfff0; }
-  inline unsigned operator=(const unsigned i) { return w = i & 0xfff0; }
-
-  CBR() : w(0) {}
-};
-
-struct SCMR {
-  union {
-    uint8 b;
-    RegFlag8<0x01> md0; //color mode low
-    RegFlag8<0x02> md1; //color mode high
-    RegFlag8<0x04> ht0; //height low
-    RegFlag8<0x08> ran; //ram enable
-    RegFlag8<0x10> ron; //rom enable
-    RegFlag8<0x20> ht1; //height high
-  };
-
-  inline operator unsigned() const { return b; }
-  inline unsigned operator=(const unsigned i) { return b = i; }
-
-  SCMR() : b(0) {}
-};
-
-struct BRAMR {
-  union {
-    uint8 b;
-    RegFlag8<0x01> flag;
-  };
-
-  inline operator unsigned() const { return b; }
-  inline unsigned operator=(const unsigned i) { return b = i; }
-
-  BRAMR() : b(0) {}
-};
-
-struct CFGR {
-  union {
-    uint8 b;
-    RegFlag8<0x20> ms0; //multiplier speed selection
-    RegFlag8<0x80> irq; //irq mask flag
-  };
-
-  inline operator unsigned() const { return b; }
-  inline unsigned operator=(const unsigned i) { return b = i; }
-
-  CFGR() : b(0) {}
-};
-
-struct CLSR {
-  union {
-    uint8 b;
-    RegFlag8<0x01> flag;
-  };
-
-  inline operator unsigned() const { return b; }
-  inline unsigned operator=(const unsigned i) { return b = i; }
-
-  CLSR() : b(0) {}
-};
-
-struct POR {
-  union {
-    uint8 b;
-    RegFlag8<0x01> transparent; //transparent flag
-    RegFlag8<0x02> dither;      //dither flag
-    RegFlag8<0x04> highnibble;  //high nibble flag
-    RegFlag8<0x08> freezehigh;  //freeze high flag
-    RegFlag8<0x10> obj;         //OBJ flag
-  };
-
-  inline operator unsigned() const { return b; }
-  inline unsigned operator=(const unsigned i) { return b = i; }
-
-  POR() : b(0) {}
-};
-
-struct Regs {
-  Reg16  r0;    //default source/destination register
-  Reg16  r1;    //pixel plot X position register
-  Reg16  r2;    //pixel plot Y position register
-  Reg16  r3;
-  Reg16  r4;    //lower 16-bit result of lmult
-  Reg16  r5;
-  Reg16  r6;    //multiplier for fmult and lmult
-  Reg16  r7;    //fixed point texel X position for merge
-  Reg16  r8;    //fixed point texel Y position for merge
-  Reg16  r9;
-  Reg16  r10;
-  Reg16  r11;   //return address set by link
-  Reg16  r12;   //loop counter
-  Reg16  r13;   //loop point address
-  Reg16  r14;   //rom address for getb, getbh, getbl, getbs
-  Reg16  r15;   //program counter
-
-  SFR    sfr;   //status/flag register
-  uint8  pbr;   //program bank register
-  uint8  rombr; //rom bank register
-  RAMBR  rambr; //ram bank register
-  CBR    cbr;   //cache base register
-  uint8  scbr;  //screen base register
-  SCMR   scmr;  //screen mode register
-  BRAMR  bramr; //backup ram register
-  uint8  vcr;   //version code register
-  CFGR   cfgr;  //config register
-  CLSR   clsr;  //clock select register
-
-  uint8  colr;  //color register
-  POR    por;   //plot option register
-} regs;

src/chip/superfx/superfx.cpp

@@ -1,42 +0,0 @@
-#include "../../base.h"
-
-#include "core/op0x.cpp"
-
-#include "memory/read.cpp"
-#include "memory/write.cpp"
-
-void SuperFX::init() {
-}
-
-void SuperFX::enable() {
-  for(uint i = 0x3000; i <= 0x32ff; i++) {
-    r_mem->set_mmio_mapper(i, this);
-  }
-}
-
-void SuperFX::power() {
-  reset();
-}
-
-void SuperFX::reset() {
-  regs.r0  = 0;
-  regs.r1  = 0;
-  regs.r2  = 0;
-  regs.r3  = 0;
-  regs.r4  = 0;
-  regs.r5  = 0;
-  regs.r6  = 0;
-  regs.r7  = 0;
-  regs.r8  = 0;
-  regs.r9  = 0;
-  regs.r10 = 0;
-  regs.r11 = 0;
-  regs.r12 = 0;
-  regs.r13 = 0;
-  regs.r14 = 0;
-  regs.r15 = 0;
-
-  regs.sfr = 0;
-
-  memset(cache, 0, sizeof cache);
-}

src/chip/superfx/superfx.h

@@ -1,17 +0,0 @@
-class SuperFX : public MMIO { public:
-  #include "core/core.h"
-
-  void init();
-  void enable();
-  void power();
-  void reset();
-
-  uint8 mmio_read (uint16 addr);
-  void  mmio_write(uint16 addr, uint8 data);
-
-private:
-  #include "regs.h"
-  uint8 cache[512]; //cache RAM
-};
-
-extern SuperFX superfx;

src/clean.bat

@@ -1,2 +1 @@
-::@make PLATFORM=win-mingw4-lui clean
-@make PLATFORM=win-visualc-lui clean
+@mingw32-make platform=win compiler=mingw32-gcc clean

src/clean.sh

@@ -1,2 +1 @@
-#!/bin/sh
-make PLATFORM=x-gcc-lui clean
+make platform=x compiler=gcc clean

src/config/config.cpp

@@ -1,125 +0,0 @@
-namespace config {
-
-Config& config() {
-static Config config;
-  return config;
-}
-
-string file_updatepath(const char *req_file, const char *req_path) {
-string file(req_file);
-  replace(file, "\\", "/");
-  if(!req_path || strlen(req_path) == 0) { return file; }
-
-string path(req_path);
-  replace(path, "\\", "/");
-  if(!strend(path, "/")) { strcat(path, "/"); }
-
-  if(strbegin(path, "./")) {
-    strltrim(path, "./");
-  string temp;
-    strcpy(temp, config::path.base);
-    strcat(temp, path);
-    strcpy(path, temp);
-  }
-
-stringarray part;
-  split(part, "/", file);
-  strcat(path, part[count(part) - 1]);
-  return path;
-}
-
-StringSetting Path::base(0, "fs.base_path",
-  "Path that bsnes resides in", "");
-StringSetting Path::rom(&config(), "path.rom",
-  "Default path to look for ROM files in (\"\" = use default directory)", "");
-StringSetting Path::save(&config(), "path.save",
-  "Default path for all save RAM and cheat files (\"\" = use current directory)", "");
-StringSetting Path::bios(&config(), "path.bios",
-  "Path where BIOS file(s) are located\n"
-  "Supported BIOS files:\n"
-  "stbios.bin - Bandai Sufami Turbo"
-  "", "./bios");
-
-StringSetting Path::save_ext(&config(), "path.save_ext",
-  "Extension to be used for all save RAM files", "srm");
-
-IntegerSetting SNES::gamma_ramp(&config(), "snes.colorfilter.gamma_ramp",
-  "Use precalculated TV-style gamma ramp", IntegerSetting::Boolean, true);
-IntegerSetting SNES::sepia(&config(), "snes.colorfilter.sepia",
-  "Convert color to sepia tone", IntegerSetting::Boolean, false);
-IntegerSetting SNES::grayscale(&config(), "snes.colorfilter.grayscale",
-  "Convert color to grayscale tone", IntegerSetting::Boolean, false);
-IntegerSetting SNES::invert(&config(), "snes.colorfilter.invert",
-  "Invert output image colors", IntegerSetting::Boolean, false);
-IntegerSetting SNES::contrast(&config(), "snes.colorfilter.contrast",
-  "Contrast", IntegerSetting::Decimal, 0);
-IntegerSetting SNES::brightness(&config(), "snes.colorfilter.brightness",
-  "Brightness", IntegerSetting::Decimal, 0);
-IntegerSetting SNES::gamma(&config(), "snes.colorfilter.gamma",
-  "Gamma", IntegerSetting::Decimal, 80);
-
-IntegerSetting SNES::ntsc_merge_fields(&config(), "snes.ntsc_merge_fields",
-  "Merge fields in NTSC video filter\n"
-  "Set to true if using filter at any refresh rate other than 60hz\n"
-  "", IntegerSetting::Boolean, true);
-
-IntegerSetting SNES::mute(&config(), "snes.mute", "Mutes SNES audio output when enabled",
-  IntegerSetting::Boolean, false);
-
-IntegerSetting SNES::controller_port0(&config(), "snes.controller_port_1",
-  "Controller attached to SNES port 1", IntegerSetting::Decimal, ::SNES::DEVICEID_JOYPAD1);
-IntegerSetting SNES::controller_port1(&config(), "snes.controller_port_2",
-  "Controller attached to SNES port 2", IntegerSetting::Decimal, ::SNES::DEVICEID_JOYPAD2);
-
-IntegerSetting CPU::ntsc_clock_rate(&config(), "cpu.ntsc_clock_rate",
-  "NTSC S-CPU clock rate (in hz)", IntegerSetting::Decimal, 21477272);
-IntegerSetting CPU::pal_clock_rate(&config(), "cpu.pal_clock_rate",
-  "PAL S-CPU clock rate (in hz)", IntegerSetting::Decimal, 21281370);
-
-IntegerSetting CPU::hdma_enable(0, "cpu.hdma_enable",
-  "Enable HDMA effects", IntegerSetting::Boolean, true);
-
-IntegerSetting SMP::ntsc_clock_rate(&config(), "smp.ntsc_clock_rate",
-  "NTSC S-SMP clock rate (in hz)", IntegerSetting::Decimal, 24606720);
-IntegerSetting SMP::pal_clock_rate(&config(), "smp.pal_clock_rate",
-  "PAL S-SMP clock rate (in hz)", IntegerSetting::Decimal, 24606720);
-
-IntegerSetting PPU::Hack::render_scanline_position(&config(), "ppu.hack.render_scanline_position",
-  "Approximate HCLOCK position to render at for scanline-based renderers",
-  IntegerSetting::Decimal, 512);
-IntegerSetting PPU::Hack::obj_cache(&config(), "ppu.hack.obj_cache",
-  "Cache OAM OBJ attributes one scanline before rendering\n"
-  "This is technically closer to the actual operation of the SNES,\n"
-  "but can cause problems in some games if enabled",
-  IntegerSetting::Boolean, false);
-IntegerSetting PPU::Hack::oam_address_invalidation(&config(), "ppu.hack.oam_address_invalidation",
-  "OAM access address changes during active display, as the S-PPU reads\n"
-  "data to render the display. Thusly, the address retrieved when accessing\n"
-  "OAM during active display is unpredictable. Unfortunately, the exact\n"
-  "algorithm for this is completely unknown at this time. It is more hardware\n"
-  "accurate to enable this setting, but one must *not* rely on the actual\n"
-  "address to match hardware under emulation.",
-  IntegerSetting::Boolean, true);
-IntegerSetting PPU::Hack::cgram_address_invalidation(&config(), "ppu.hack.cgram_address_invalidation",
-  "CGRAM access address changes during active display (excluding hblank), as\n"
-  "the S-PPU reads data to render the display. Thusly, as with OAM, the access\n"
-  "address is unpredictable. Again, enabling this setting is more hardware\n"
-  "accurate, but one must *not* rely on the actual address to match hardware\n"
-  "under emulation.",
-  IntegerSetting::Boolean, true);
-
-IntegerSetting PPU::opt_enable(0, "ppu.opt_enable", "Enable offset-per-tile effects", IntegerSetting::Boolean, true);
-IntegerSetting PPU::bg1_pri0_enable(0, "ppu.bg1_pri0_enable", "Enable BG1 Priority 0", IntegerSetting::Boolean, true);
-IntegerSetting PPU::bg1_pri1_enable(0, "ppu.bg1_pri1_enable", "Enable BG1 Priority 1", IntegerSetting::Boolean, true);
-IntegerSetting PPU::bg2_pri0_enable(0, "ppu.bg2_pri0_enable", "Enable BG2 Priority 0", IntegerSetting::Boolean, true);
-IntegerSetting PPU::bg2_pri1_enable(0, "ppu.bg2_pri1_enable", "Enable BG2 Priority 1", IntegerSetting::Boolean, true);
-IntegerSetting PPU::bg3_pri0_enable(0, "ppu.bg3_pri0_enable", "Enable BG3 Priority 0", IntegerSetting::Boolean, true);
-IntegerSetting PPU::bg3_pri1_enable(0, "ppu.bg3_pri1_enable", "Enable BG3 Priority 1", IntegerSetting::Boolean, true);
-IntegerSetting PPU::bg4_pri0_enable(0, "ppu.bg4_pri0_enable", "Enable BG4 Priority 0", IntegerSetting::Boolean, true);
-IntegerSetting PPU::bg4_pri1_enable(0, "ppu.bg4_pri1_enable", "Enable BG4 Priority 1", IntegerSetting::Boolean, true);
-IntegerSetting PPU::oam_pri0_enable(0, "ppu.oam_pri0_enable", "Enable OAM Priority 0", IntegerSetting::Boolean, true);
-IntegerSetting PPU::oam_pri1_enable(0, "ppu.oam_pri1_enable", "Enable OAM Priority 1", IntegerSetting::Boolean, true);
-IntegerSetting PPU::oam_pri2_enable(0, "ppu.oam_pri2_enable", "Enable OAM Priority 2", IntegerSetting::Boolean, true);
-IntegerSetting PPU::oam_pri3_enable(0, "ppu.oam_pri3_enable", "Enable OAM Priority 3", IntegerSetting::Boolean, true);
-
-};

src/config/config.h

@@ -1,46 +0,0 @@
-namespace config {
-
-extern Config& config();
-
-string file_updatepath(const char *, const char *);
-
-extern struct Path {
-  static StringSetting base, rom, save, bios;
-  static StringSetting save_ext;
-} path;
-
-extern struct SNES {
-  static IntegerSetting gamma_ramp, sepia, grayscale, invert, contrast, brightness, gamma;
-  static IntegerSetting ntsc_merge_fields;
-  static IntegerSetting mute;
-  static IntegerSetting controller_port0;
-  static IntegerSetting controller_port1;
-} snes;
-
-extern struct CPU {
-  static IntegerSetting ntsc_clock_rate, pal_clock_rate;
-  static IntegerSetting hdma_enable;
-} cpu;
-
-extern struct SMP {
-  static IntegerSetting ntsc_clock_rate, pal_clock_rate;
-} smp;
-
-extern struct PPU {
-  struct Hack {
-    static IntegerSetting render_scanline_position;
-    static IntegerSetting obj_cache;
-    static IntegerSetting oam_address_invalidation;
-    static IntegerSetting cgram_address_invalidation;
-  } hack;
-
-  static IntegerSetting opt_enable;
-  static IntegerSetting bg1_pri0_enable, bg1_pri1_enable;
-  static IntegerSetting bg2_pri0_enable, bg2_pri1_enable;
-  static IntegerSetting bg3_pri0_enable, bg3_pri1_enable;
-  static IntegerSetting bg4_pri0_enable, bg4_pri1_enable;
-  static IntegerSetting oam_pri0_enable, oam_pri1_enable;
-  static IntegerSetting oam_pri2_enable, oam_pri3_enable;
-} ppu;
-
-};

src/cpu/cpu.cpp

@@ -1,8 +1,16 @@
-#include "../base.h"
+#include <../base.hpp>
+#define CPU_CPP
+
 #include "dcpu.cpp"
 
+void CPU::power() {
+  cpu_version = snes.config.cpu.version;
+}
+
+void CPU::reset() {
+}
+
 CPU::CPU() {
-  cpu_version = 1;
 }
 
 CPU::~CPU() {

src/cpu/cpu.h

@@ -1,92 +0,0 @@
-#include "cpuregs.h"
-
-class CPU : public MMIO {
-public:
-  virtual void enter() = 0;
-
-public:
-//CPU version number
-//* 1 and 2 are known
-//* reported by $4210
-//* affects DRAM refresh behavior
-uint8 cpu_version;
-
-//timing
-  virtual uint16 vcounter() = 0;
-  virtual uint16 hcounter() = 0;
-  virtual uint16 hclock() = 0;
-  virtual bool   interlace() = 0;
-  virtual bool   interlace_field() = 0;
-  virtual bool   overscan() = 0;
-  virtual uint16 region_scanlines() = 0;
-  virtual void   set_interlace(bool r) = 0;
-  virtual void   set_overscan (bool r) = 0;
-
-CPURegs regs;
-  virtual uint8 port_read (uint8 port) = 0;
-  virtual void  port_write(uint8 port, uint8 value) = 0;
-
-  enum {
-    FLAG_N = 0x80, FLAG_V = 0x40,
-    FLAG_M = 0x20, FLAG_X = 0x10,
-    FLAG_D = 0x08, FLAG_I = 0x04,
-    FLAG_Z = 0x02, FLAG_C = 0x01
-  };
-  virtual uint8  pio_status() = 0;
-  virtual void   scanline() = 0;
-  virtual void   frame() = 0;
-  virtual void   power() = 0;
-  virtual void   reset() = 0;
-
-/*****
- * in opcode-based CPU emulators, the main emulation routine
- * will only be able to call the disassemble_opcode() function
- * on clean opcode edges. but with cycle-based CPU emulators,
- * the CPU may be in the middle of executing an opcode when the
- * emulator (e.g. debugger) wants to disassemble an opcode. this
- * would mean that important registers may not reflect what they
- * did at the start of the opcode (especially regs.pc), so in
- * cycle-based emulators, this function should be overridden to
- * reflect whether or not an opcode has only been partially
- * executed. if not, the debugger should abort attempts to skip,
- * disable, or disassemble the current opcode.
- *****/
-  virtual bool in_opcode() { return false; }
-
-/*****
- * opcode disassembler
- *****/
-enum {
-  OPTYPE_DP = 0,    //dp
-  OPTYPE_DPX,       //dp,x
-  OPTYPE_DPY,       //dp,y
-  OPTYPE_IDP,       //(dp)
-  OPTYPE_IDPX,      //(dp,x)
-  OPTYPE_IDPY,      //(dp),y
-  OPTYPE_ILDP,      //[dp]
-  OPTYPE_ILDPY,     //[dp],y
-  OPTYPE_ADDR,      //addr
-  OPTYPE_ADDRX,     //addr,x
-  OPTYPE_ADDRY,     //addr,y
-  OPTYPE_IADDRX,    //(addr,x)
-  OPTYPE_ILADDR,    //[addr]
-  OPTYPE_LONG,      //long
-  OPTYPE_LONGX,     //long, x
-  OPTYPE_SR,        //sr,s
-  OPTYPE_ISRY,      //(sr,s),y
-  OPTYPE_ADDR_PC,   //pbr:addr
-  OPTYPE_IADDR_PC,  //pbr:(addr)
-  OPTYPE_RELB,      //relb
-  OPTYPE_RELW,      //relw
-};
-
-  void   disassemble_opcode(char *output);
-  uint8  dreadb(uint32 addr);
-  uint16 dreadw(uint32 addr);
-  uint32 dreadl(uint32 addr);
-  uint32 decode(uint8 offset_type, uint32 addr);
-  uint8  opcode_length();
-
-  CPU();
-  virtual ~CPU();
-};

src/cpu/cpu.hpp

@@ -0,0 +1,74 @@
+class CPU : public MMIO {
+public:
+  virtual void enter() = 0;
+
+  //CPU version number
+  //* 1 and 2 are known
+  //* reported by $4210
+  //* affects timing (DRAM refresh, HDMA init, etc)
+  uint8 cpu_version;
+
+  virtual uint8 pio() = 0;
+  virtual bool joylatch() = 0;
+  virtual uint8 port_read(uint8 port) = 0;
+  virtual void port_write(uint8 port, uint8 value) = 0;
+
+  #include "cpuregs.hpp"
+  regs_t regs;
+
+  virtual void scanline() = 0;
+  virtual void power();
+  virtual void reset();
+
+  /*****
+   * in opcode-based CPU emulators, the main emulation routine
+   * will only be able to call the disassemble_opcode() function
+   * on clean opcode edges. but with cycle-based CPU emulators,
+   * the CPU may be in the middle of executing an opcode when the
+   * emulator (e.g. debugger) wants to disassemble an opcode. this
+   * would mean that important registers may not reflect what they
+   * did at the start of the opcode (especially regs.pc), so in
+   * cycle-based emulators, this function should be overridden to
+   * reflect whether or not an opcode has only been partially
+   * executed. if not, the debugger should abort attempts to skip,
+   * disable, or disassemble the current opcode.
+   *****/
+  virtual bool in_opcode() { return false; }
+
+  /*****
+   * opcode disassembler
+   *****/
+  enum {
+    OPTYPE_DP = 0,    //dp
+    OPTYPE_DPX,       //dp,x
+    OPTYPE_DPY,       //dp,y
+    OPTYPE_IDP,       //(dp)
+    OPTYPE_IDPX,      //(dp,x)
+    OPTYPE_IDPY,      //(dp),y
+    OPTYPE_ILDP,      //[dp]
+    OPTYPE_ILDPY,     //[dp],y
+    OPTYPE_ADDR,      //addr
+    OPTYPE_ADDRX,     //addr,x
+    OPTYPE_ADDRY,     //addr,y
+    OPTYPE_IADDRX,    //(addr,x)
+    OPTYPE_ILADDR,    //[addr]
+    OPTYPE_LONG,      //long
+    OPTYPE_LONGX,     //long, x
+    OPTYPE_SR,        //sr,s
+    OPTYPE_ISRY,      //(sr,s),y
+    OPTYPE_ADDR_PC,   //pbr:addr
+    OPTYPE_IADDR_PC,  //pbr:(addr)
+    OPTYPE_RELB,      //relb
+    OPTYPE_RELW,      //relw
+  };
+
+  void   disassemble_opcode(char *output);
+  uint8  dreadb(uint32 addr);
+  uint16 dreadw(uint32 addr);
+  uint32 dreadl(uint32 addr);
+  uint32 decode(uint8 offset_type, uint32 addr);
+  uint8  opcode_length();
+
+  CPU();
+  virtual ~CPU();
+};

src/cpu/cpuregs.h

@@ -1,75 +0,0 @@
-class CPURegFlags {
-public:
-union {
-  uint8 data;
-  struct {
-    bool order_msb8(n:1, v:1, m:1, x:1, d:1, i:1, z:1, c:1);
-  };
-};
-
-  inline operator unsigned() const { return data; }
-  template<typename T> inline unsigned operator  = (const T i) { data  = i; return data; }
-  template<typename T> inline unsigned operator |= (const T i) { data |= i; return data; }
-  template<typename T> inline unsigned operator ^= (const T i) { data ^= i; return data; }
-  template<typename T> inline unsigned operator &= (const T i) { data &= i; return data; }
-
-  CPURegFlags() : data(0) {}
-};
-
-class CPUReg16 {
-public:
-union {
-  uint16 w;
-  struct { uint8 order_lsb2(l, h); };
-};
-
-  inline operator unsigned() const { return w; }
-  template<typename T> inline unsigned operator   = (const T i) { w   = i; return w; }
-  template<typename T> inline unsigned operator  |= (const T i) { w  |= i; return w; }
-  template<typename T> inline unsigned operator  ^= (const T i) { w  ^= i; return w; }
-  template<typename T> inline unsigned operator  &= (const T i) { w  &= i; return w; }
-  template<typename T> inline unsigned operator <<= (const T i) { w <<= i; return w; }
-  template<typename T> inline unsigned operator >>= (const T i) { w >>= i; return w; }
-  template<typename T> inline unsigned operator  += (const T i) { w  += i; return w; }
-  template<typename T> inline unsigned operator  -= (const T i) { w  -= i; return w; }
-  template<typename T> inline unsigned operator  *= (const T i) { w  *= i; return w; }
-  template<typename T> inline unsigned operator  /= (const T i) { w  /= i; return w; }
-  template<typename T> inline unsigned operator  %= (const T i) { w  %= i; return w; }
-
-  CPUReg16() : w(0) {}
-};
-
-class CPUReg24 {
-public:
-union {
-  uint32 d;
-  struct { uint16 order_lsb2(w, wh); };
-  struct { uint8  order_lsb4(l, h, b, bh); };
-};
-
-  inline operator unsigned() const { return d; }
-  template<typename T> inline unsigned operator   = (const T i) { d = uclip<24>(i);      return d; }
-  template<typename T> inline unsigned operator  |= (const T i) { d = uclip<24>(d  | i); return d; }
-  template<typename T> inline unsigned operator  ^= (const T i) { d = uclip<24>(d  ^ i); return d; }
-  template<typename T> inline unsigned operator  &= (const T i) { d = uclip<24>(d  & i); return d; }
-  template<typename T> inline unsigned operator <<= (const T i) { d = uclip<24>(d << i); return d; }
-  template<typename T> inline unsigned operator >>= (const T i) { d = uclip<24>(d >> i); return d; }
-  template<typename T> inline unsigned operator  += (const T i) { d = uclip<24>(d  + i); return d; }
-  template<typename T> inline unsigned operator  -= (const T i) { d = uclip<24>(d  - i); return d; }
-  template<typename T> inline unsigned operator  *= (const T i) { d = uclip<24>(d  * i); return d; }
-  template<typename T> inline unsigned operator  /= (const T i) { d = uclip<24>(d  / i); return d; }
-  template<typename T> inline unsigned operator  %= (const T i) { d = uclip<24>(d  % i); return d; }
-
-  CPUReg24() : d(0) {}
-};
-
-class CPURegs {
-public:
-CPUReg24 pc;
-CPUReg16 a, x, y, s, d;
-CPURegFlags p;
-uint8 db;
-uint8 mdr;
-bool  e;
-  CPURegs() : db(0), mdr(0x00), e(false) {}
-};

src/cpu/cpuregs.hpp

@@ -0,0 +1,74 @@
+struct flag_t {
+  bool n, v, m, x, d, i, z, c;
+
+  inline operator unsigned() const {
+    return (n << 7) + (v << 6) + (m << 5) + (x << 4)
+         + (d << 3) + (i << 2) + (z << 1) + (c << 0);
+  }
+
+  inline unsigned operator=(uint8_t data) {
+    n = data & 0x80; v = data & 0x40; m = data & 0x20; x = data & 0x10;
+    d = data & 0x08; i = data & 0x04; z = data & 0x02; c = data & 0x01;
+    return data;
+  }
+
+  inline unsigned operator|=(unsigned data) { return operator=(operator unsigned() | data); }
+  inline unsigned operator^=(unsigned data) { return operator=(operator unsigned() ^ data); }
+  inline unsigned operator&=(unsigned data) { return operator=(operator unsigned() & data); }
+
+  flag_t() : n(0), v(0), m(0), x(0), d(0), i(0), z(0), c(0) {}
+};
+
+struct reg16_t {
+  union {
+    uint16 w;
+    struct { uint8 order_lsb2(l, h); };
+  };
+
+  inline operator unsigned() const { return w; }
+  inline unsigned operator   = (unsigned i) { return w   = i; }
+  inline unsigned operator  |= (unsigned i) { return w  |= i; }
+  inline unsigned operator  ^= (unsigned i) { return w  ^= i; }
+  inline unsigned operator  &= (unsigned i) { return w  &= i; }
+  inline unsigned operator <<= (unsigned i) { return w <<= i; }
+  inline unsigned operator >>= (unsigned i) { return w >>= i; }
+  inline unsigned operator  += (unsigned i) { return w  += i; }
+  inline unsigned operator  -= (unsigned i) { return w  -= i; }
+  inline unsigned operator  *= (unsigned i) { return w  *= i; }
+  inline unsigned operator  /= (unsigned i) { return w  /= i; }
+  inline unsigned operator  %= (unsigned i) { return w  %= i; }
+
+  reg16_t() : w(0) {}
+};
+
+struct reg24_t {
+  union {
+    uint32 d;
+    struct { uint16 order_lsb2(w, wh); };
+    struct { uint8  order_lsb4(l, h, b, bh); };
+  };
+
+  inline operator unsigned() const { return d; }
+  inline unsigned operator   = (unsigned i) { return d = uclip<24>(i); }
+  inline unsigned operator  |= (unsigned i) { return d = uclip<24>(d  | i); }
+  inline unsigned operator  ^= (unsigned i) { return d = uclip<24>(d  ^ i); }
+  inline unsigned operator  &= (unsigned i) { return d = uclip<24>(d  & i); }
+  inline unsigned operator <<= (unsigned i) { return d = uclip<24>(d << i); }
+  inline unsigned operator >>= (unsigned i) { return d = uclip<24>(d >> i); }
+  inline unsigned operator  += (unsigned i) { return d = uclip<24>(d  + i); }
+  inline unsigned operator  -= (unsigned i) { return d = uclip<24>(d  - i); }
+  inline unsigned operator  *= (unsigned i) { return d = uclip<24>(d  * i); }
+  inline unsigned operator  /= (unsigned i) { return d = uclip<24>(d  / i); }
+  inline unsigned operator  %= (unsigned i) { return d = uclip<24>(d  % i); }
+
+  reg24_t() : d(0) {}
+};
+
+struct regs_t {
+  reg24_t  pc;
+  reg16_t  a, x, y, s, d;
+  flag_t   p;
+  uint8_t  db, mdr;
+  bool     e;
+  regs_t() : db(0), mdr(0), e(false) {}
+};

src/cpu/dcpu.cpp

@@ -1,21 +1,23 @@
+#ifdef CPU_CPP
+
 uint8  CPU::dreadb(uint32 addr) {
   if((addr & 0x40ffff) >= 0x2000 && (addr & 0x40ffff) <= 0x5fff) {
-  //$[00-3f|80-bf]:[2000-5fff]
-  //do not read MMIO registers within debugger
+    //$[00-3f|80-bf]:[2000-5fff]
+    //do not read MMIO registers within debugger
     return 0x00;
   }
-  return r_mem->read(addr);
+  return bus.read(addr);
 }
 
 uint16 CPU::dreadw(uint32 addr) {
-uint16 r;
+  uint16 r;
   r  = dreadb((addr + 0) & 0xffffff) <<  0;
   r |= dreadb((addr + 1) & 0xffffff) <<  8;
   return r;
 }
 
 uint32 CPU::dreadl(uint32 addr) {
-uint32 r;
+  uint32 r;
   r  = dreadb((addr + 0) & 0xffffff) <<  0;
   r |= dreadb((addr + 1) & 0xffffff) <<  8;
   r |= dreadb((addr + 2) & 0xffffff) << 16;
@@ -23,87 +25,89 @@ uint32 r;
 }
 
 uint32 CPU::decode(uint8 offset_type, uint32 addr) {
-uint32 r = 0;
+  uint32 r = 0;
+
   switch(offset_type) {
-  case OPTYPE_DP:
-    r = (regs.d + (addr & 0xffff)) & 0xffff;
-    break;
-  case OPTYPE_DPX:
-    r = (regs.d + regs.x + (addr & 0xffff)) & 0xffff;
-    break;
-  case OPTYPE_DPY:
-    r = (regs.d + regs.y + (addr & 0xffff)) & 0xffff;
-    break;
-  case OPTYPE_IDP:
-    addr = (regs.d + (addr & 0xffff)) & 0xffff;
-    r = (regs.db << 16) + dreadw(addr);
-    break;
-  case OPTYPE_IDPX:
-    addr = (regs.d + regs.x + (addr & 0xffff)) & 0xffff;
-    r = (regs.db << 16) + dreadw(addr);
-    break;
-  case OPTYPE_IDPY:
-    addr = (regs.d + (addr & 0xffff)) & 0xffff;
-    r = (regs.db << 16) + dreadw(addr) + regs.y;
-    break;
-  case OPTYPE_ILDP:
-    addr = (regs.d + (addr & 0xffff)) & 0xffff;
-    r = dreadl(addr);
-    break;
-  case OPTYPE_ILDPY:
-    addr = (regs.d + (addr & 0xffff)) & 0xffff;
-    r = dreadl(addr) + regs.y;
-    break;
-  case OPTYPE_ADDR:
-    r = (regs.db << 16) + (addr & 0xffff);
-    break;
-  case OPTYPE_ADDR_PC:
-    r = (regs.pc.b << 16) + (addr & 0xffff);
-    break;
-  case OPTYPE_ADDRX:
-    r = (regs.db << 16) + (addr & 0xffff) + regs.x;
-    break;
-  case OPTYPE_ADDRY:
-    r = (regs.db << 16) + (addr & 0xffff) + regs.y;
-    break;
-  case OPTYPE_IADDR_PC:
-    r = (regs.pc.b << 16) + (addr & 0xffff);
-    break;
-  case OPTYPE_IADDRX:
-    r = (regs.pc.b << 16) + ((addr + regs.x) & 0xffff);
-    break;
-  case OPTYPE_ILADDR:
-    r = addr;
-    break;
-  case OPTYPE_LONG:
-    r = addr;
-    break;
-  case OPTYPE_LONGX:
-    r = (addr + regs.x);
-    break;
-  case OPTYPE_SR:
-    r = (regs.s + (addr & 0xff)) & 0xffff;
-    break;
-  case OPTYPE_ISRY:
-    addr = (regs.s + (addr & 0xff)) & 0xffff;
-    r = (regs.db << 16) + dreadw(addr) + regs.y;
-    break;
-  case OPTYPE_RELB:
-    r  = (regs.pc.b << 16) + ((regs.pc.w + 2) & 0xffff);
-    r += int8(addr);
-    break;
-  case OPTYPE_RELW:
-    r  = (regs.pc.b << 16) + ((regs.pc.w + 3) & 0xffff);
-    r += int16(addr);
-    break;
+    case OPTYPE_DP:
+      r = (regs.d + (addr & 0xffff)) & 0xffff;
+      break;
+    case OPTYPE_DPX:
+      r = (regs.d + regs.x + (addr & 0xffff)) & 0xffff;
+      break;
+    case OPTYPE_DPY:
+      r = (regs.d + regs.y + (addr & 0xffff)) & 0xffff;
+      break;
+    case OPTYPE_IDP:
+      addr = (regs.d + (addr & 0xffff)) & 0xffff;
+      r = (regs.db << 16) + dreadw(addr);
+      break;
+    case OPTYPE_IDPX:
+      addr = (regs.d + regs.x + (addr & 0xffff)) & 0xffff;
+      r = (regs.db << 16) + dreadw(addr);
+      break;
+    case OPTYPE_IDPY:
+      addr = (regs.d + (addr & 0xffff)) & 0xffff;
+      r = (regs.db << 16) + dreadw(addr) + regs.y;
+      break;
+    case OPTYPE_ILDP:
+      addr = (regs.d + (addr & 0xffff)) & 0xffff;
+      r = dreadl(addr);
+      break;
+    case OPTYPE_ILDPY:
+      addr = (regs.d + (addr & 0xffff)) & 0xffff;
+      r = dreadl(addr) + regs.y;
+      break;
+    case OPTYPE_ADDR:
+      r = (regs.db << 16) + (addr & 0xffff);
+      break;
+    case OPTYPE_ADDR_PC:
+      r = (regs.pc.b << 16) + (addr & 0xffff);
+      break;
+    case OPTYPE_ADDRX:
+      r = (regs.db << 16) + (addr & 0xffff) + regs.x;
+      break;
+    case OPTYPE_ADDRY:
+      r = (regs.db << 16) + (addr & 0xffff) + regs.y;
+      break;
+    case OPTYPE_IADDR_PC:
+      r = (regs.pc.b << 16) + (addr & 0xffff);
+      break;
+    case OPTYPE_IADDRX:
+      r = (regs.pc.b << 16) + ((addr + regs.x) & 0xffff);
+      break;
+    case OPTYPE_ILADDR:
+      r = addr;
+      break;
+    case OPTYPE_LONG:
+      r = addr;
+      break;
+    case OPTYPE_LONGX:
+      r = (addr + regs.x);
+      break;
+    case OPTYPE_SR:
+      r = (regs.s + (addr & 0xff)) & 0xffff;
+      break;
+    case OPTYPE_ISRY:
+      addr = (regs.s + (addr & 0xff)) & 0xffff;
+      r = (regs.db << 16) + dreadw(addr) + regs.y;
+      break;
+    case OPTYPE_RELB:
+      r  = (regs.pc.b << 16) + ((regs.pc.w + 2) & 0xffff);
+      r += int8(addr);
+      break;
+    case OPTYPE_RELW:
+      r  = (regs.pc.b << 16) + ((regs.pc.w + 3) & 0xffff);
+      r += int16(addr);
+      break;
   }
+
   return(r & 0xffffff);
 }
 
 void CPU::disassemble_opcode(char *output) {
-static CPUReg24 pc;
-char t[256];
-char *s = output;
+  static reg24_t pc;
+  char t[256];
+  char *s = output;
 
   if(in_opcode() == true) {
     strcpy(s, "?????? <CPU within opcode>");
@@ -111,365 +115,369 @@ char *s = output;
   }
 
   pc.d = regs.pc.d;
-  sprintf(s, "%0.6x ", uint32(pc.d));
+  sprintf(s, "%.6x ", (uint32)pc.d);
 
-uint8 op  = dreadb(pc.d); pc.w++;
-uint8 op0 = dreadb(pc.d); pc.w++;
-uint8 op1 = dreadb(pc.d); pc.w++;
-uint8 op2 = dreadb(pc.d);
+  uint8 op  = dreadb(pc.d); pc.w++;
+  uint8 op0 = dreadb(pc.d); pc.w++;
+  uint8 op1 = dreadb(pc.d); pc.w++;
+  uint8 op2 = dreadb(pc.d);
+
+  #define op8  ((op0))
+  #define op16 ((op0) | (op1 << 8))
+  #define op24 ((op0) | (op1 << 8) | (op2 << 16))
+  #define a8   (regs.e || regs.p.m)
+  #define x8   (regs.e || regs.p.x)
 
-#define op8  ((op0))
-#define op16 ((op0) | (op1 << 8))
-#define op24 ((op0) | (op1 << 8) | (op2 << 16))
-#define a8   (regs.e || regs.p.m)
-#define x8   (regs.e || regs.p.x)
   switch(op) {
-  case 0x00: sprintf(t, "brk #$%0.2x               ", op8); break;
-  case 0x01: sprintf(t, "ora ($%0.2x,x)   [$%0.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
-  case 0x02: sprintf(t, "cop #$%0.2x               ", op8); break;
-  case 0x03: sprintf(t, "ora $%0.2x,s     [$%0.6x]", op8, decode(OPTYPE_SR, op8)); break;
-  case 0x04: sprintf(t, "tsb $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x05: sprintf(t, "ora $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x06: sprintf(t, "asl $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x07: sprintf(t, "ora [$%0.2x]     [$%0.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
-  case 0x08: sprintf(t, "php                    "); break;
-  case 0x09: if(a8)sprintf(t, "ora #$%0.2x               ", op8);
-             else  sprintf(t, "ora #$%0.4x             ", op16); break;
-  case 0x0a: sprintf(t, "asl a                  "); break;
-  case 0x0b: sprintf(t, "phd                    "); break;
-  case 0x0c: sprintf(t, "tsb $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x0d: sprintf(t, "ora $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x0e: sprintf(t, "asl $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x0f: sprintf(t, "ora $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0x10: sprintf(t, "bpl $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0x11: sprintf(t, "ora ($%0.2x),y   [$%0.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
-  case 0x12: sprintf(t, "ora ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0x13: sprintf(t, "ora ($%0.2x,s),y [$%0.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
-  case 0x14: sprintf(t, "trb $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x15: sprintf(t, "ora $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x16: sprintf(t, "asl $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x17: sprintf(t, "ora [$%0.2x],y   [$%0.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
-  case 0x18: sprintf(t, "clc                    "); break;
-  case 0x19: sprintf(t, "ora $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0x1a: sprintf(t, "inc                    "); break;
-  case 0x1b: sprintf(t, "tcs                    "); break;
-  case 0x1c: sprintf(t, "trb $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x1d: sprintf(t, "ora $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x1e: sprintf(t, "asl $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x1f: sprintf(t, "ora $%0.6x,x [$%0.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
-  case 0x20: sprintf(t, "jsr $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR_PC, op16)); break;
-  case 0x21: sprintf(t, "and ($%0.2x,x)   [$%0.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
-  case 0x22: sprintf(t, "jsl $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0x23: sprintf(t, "and $%0.2x,s     [$%0.6x]", op8, decode(OPTYPE_SR, op8)); break;
-  case 0x24: sprintf(t, "bit $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x25: sprintf(t, "and $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x26: sprintf(t, "rol $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x27: sprintf(t, "and [$%0.2x]     [$%0.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
-  case 0x28: sprintf(t, "plp                    "); break;
-  case 0x29: if(a8)sprintf(t, "and #$%0.2x               ", op8);
-             else  sprintf(t, "and #$%0.4x             ", op16); break;
-  case 0x2a: sprintf(t, "rol a                  "); break;
-  case 0x2b: sprintf(t, "pld                    "); break;
-  case 0x2c: sprintf(t, "bit $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x2d: sprintf(t, "and $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x2e: sprintf(t, "rol $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x2f: sprintf(t, "and $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0x30: sprintf(t, "bmi $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0x31: sprintf(t, "and ($%0.2x),y   [$%0.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
-  case 0x32: sprintf(t, "and ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0x33: sprintf(t, "and ($%0.2x,s),y [$%0.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
-  case 0x34: sprintf(t, "bit $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x35: sprintf(t, "and $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x36: sprintf(t, "rol $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x37: sprintf(t, "and [$%0.2x],y   [$%0.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
-  case 0x38: sprintf(t, "sec                    "); break;
-  case 0x39: sprintf(t, "and $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0x3a: sprintf(t, "dec                    "); break;
-  case 0x3b: sprintf(t, "tsc                    "); break;
-  case 0x3c: sprintf(t, "bit $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x3d: sprintf(t, "and $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x3e: sprintf(t, "rol $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x3f: sprintf(t, "and $%0.6x,x [$%0.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
-  case 0x40: sprintf(t, "rti                    "); break;
-  case 0x41: sprintf(t, "eor ($%0.2x,x)   [$%0.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
-  case 0x42: sprintf(t, "wdm                    "); break;
-  case 0x43: sprintf(t, "eor $%0.2x,s     [$%0.6x]", op8, decode(OPTYPE_SR, op8)); break;
-  case 0x44: sprintf(t, "mvp $%0.2x,$%0.2x            ", op1, op8); break;
-  case 0x45: sprintf(t, "eor $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x46: sprintf(t, "lsr $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x47: sprintf(t, "eor [$%0.2x]     [$%0.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
-  case 0x48: sprintf(t, "pha                    "); break;
-  case 0x49: if(a8)sprintf(t, "eor #$%0.2x               ", op8);
-             else  sprintf(t, "eor #$%0.4x             ", op16); break;
-  case 0x4a: sprintf(t, "lsr a                  "); break;
-  case 0x4b: sprintf(t, "phk                    "); break;
-  case 0x4c: sprintf(t, "jmp $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR_PC, op16)); break;
-  case 0x4d: sprintf(t, "eor $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x4e: sprintf(t, "lsr $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x4f: sprintf(t, "eor $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0x50: sprintf(t, "bvc $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0x51: sprintf(t, "eor ($%0.2x),y   [$%0.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
-  case 0x52: sprintf(t, "eor ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0x53: sprintf(t, "eor ($%0.2x,s),y [$%0.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
-  case 0x54: sprintf(t, "mvn $%0.2x,$%0.2x            ", op1, op8); break;
-  case 0x55: sprintf(t, "eor $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x56: sprintf(t, "lsr $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x57: sprintf(t, "eor [$%0.2x],y   [$%0.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
-  case 0x58: sprintf(t, "cli                    "); break;
-  case 0x59: sprintf(t, "eor $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0x5a: sprintf(t, "phy                    "); break;
-  case 0x5b: sprintf(t, "tcd                    "); break;
-  case 0x5c: sprintf(t, "jml $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0x5d: sprintf(t, "eor $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x5e: sprintf(t, "lsr $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x5f: sprintf(t, "eor $%0.6x,x [$%0.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
-  case 0x60: sprintf(t, "rts                    "); break;
-  case 0x61: sprintf(t, "adc ($%0.2x,x)   [$%0.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
-  case 0x62: sprintf(t, "per $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x63: sprintf(t, "adc $%0.2x,s     [$%0.6x]", op8, decode(OPTYPE_SR, op8)); break;
-  case 0x64: sprintf(t, "stz $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x65: sprintf(t, "adc $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x66: sprintf(t, "ror $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x67: sprintf(t, "adc [$%0.2x]     [$%0.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
-  case 0x68: sprintf(t, "pla                    "); break;
-  case 0x69: if(a8)sprintf(t, "adc #$%0.2x               ", op8);
-             else  sprintf(t, "adc #$%0.4x             ", op16); break;
-  case 0x6a: sprintf(t, "ror a                  "); break;
-  case 0x6b: sprintf(t, "rtl                    "); break;
-  case 0x6c: sprintf(t, "jmp ($%0.4x)   [$%0.6x]", op16, decode(OPTYPE_IADDR_PC, op16)); break;
-  case 0x6d: sprintf(t, "adc $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x6e: sprintf(t, "ror $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x6f: sprintf(t, "adc $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0x70: sprintf(t, "bvs $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0x71: sprintf(t, "adc ($%0.2x),y   [$%0.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
-  case 0x72: sprintf(t, "adc ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0x73: sprintf(t, "adc ($%0.2x,s),y [$%0.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
-  case 0x74: sprintf(t, "stz $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x75: sprintf(t, "adc $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x76: sprintf(t, "ror $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x77: sprintf(t, "adc [$%0.2x],y   [$%0.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
-  case 0x78: sprintf(t, "sei                    "); break;
-  case 0x79: sprintf(t, "adc $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0x7a: sprintf(t, "ply                    "); break;
-  case 0x7b: sprintf(t, "tdc                    "); break;
-  case 0x7c: sprintf(t, "jmp ($%0.4x,x) [$%0.6x]", op16, decode(OPTYPE_IADDRX, op16)); break;
-  case 0x7d: sprintf(t, "adc $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x7e: sprintf(t, "ror $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x7f: sprintf(t, "adc $%0.6x,x [$%0.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
-  case 0x80: sprintf(t, "bra $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0x81: sprintf(t, "sta ($%0.2x,x)   [$%0.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
-  case 0x82: sprintf(t, "brl $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELW, op16)), decode(OPTYPE_RELW, op16)); break;
-  case 0x83: sprintf(t, "sta $%0.2x,s     [$%0.6x]", op8, decode(OPTYPE_SR, op8)); break;
-  case 0x84: sprintf(t, "sty $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x85: sprintf(t, "sta $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x86: sprintf(t, "stx $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0x87: sprintf(t, "sta [$%0.2x]     [$%0.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
-  case 0x88: sprintf(t, "dey                    "); break;
-  case 0x89: if(a8)sprintf(t, "bit #$%0.2x               ", op8);
-             else  sprintf(t, "bit #$%0.4x             ", op16); break;
-  case 0x8a: sprintf(t, "txa                    "); break;
-  case 0x8b: sprintf(t, "phb                    "); break;
-  case 0x8c: sprintf(t, "sty $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x8d: sprintf(t, "sta $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x8e: sprintf(t, "stx $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x8f: sprintf(t, "sta $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0x90: sprintf(t, "bcc $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0x91: sprintf(t, "sta ($%0.2x),y   [$%0.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
-  case 0x92: sprintf(t, "sta ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0x93: sprintf(t, "sta ($%0.2x,s),y [$%0.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
-  case 0x94: sprintf(t, "sty $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x95: sprintf(t, "sta $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0x96: sprintf(t, "stx $%0.2x,y     [$%0.6x]", op8, decode(OPTYPE_DPY, op8)); break;
-  case 0x97: sprintf(t, "sta [$%0.2x],y   [$%0.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
-  case 0x98: sprintf(t, "tya                    "); break;
-  case 0x99: sprintf(t, "sta $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0x9a: sprintf(t, "txs                    "); break;
-  case 0x9b: sprintf(t, "txy                    "); break;
-  case 0x9c: sprintf(t, "stz $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0x9d: sprintf(t, "sta $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x9e: sprintf(t, "stz $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0x9f: sprintf(t, "sta $%0.6x,x [$%0.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
-  case 0xa0: if(x8)sprintf(t, "ldy #$%0.2x               ", op8);
-             else  sprintf(t, "ldy #$%0.4x             ", op16); break;
-  case 0xa1: sprintf(t, "lda ($%0.2x,x)   [$%0.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
-  case 0xa2: if(x8)sprintf(t, "ldx #$%0.2x               ", op8);
-             else  sprintf(t, "ldx #$%0.4x             ", op16); break;
-  case 0xa3: sprintf(t, "lda $%0.2x,s     [$%0.6x]", op8, decode(OPTYPE_SR, op8)); break;
-  case 0xa4: sprintf(t, "ldy $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xa5: sprintf(t, "lda $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xa6: sprintf(t, "ldx $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xa7: sprintf(t, "lda [$%0.2x]     [$%0.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
-  case 0xa8: sprintf(t, "tay                    "); break;
-  case 0xa9: if(a8)sprintf(t, "lda #$%0.2x               ", op8);
-             else  sprintf(t, "lda #$%0.4x             ", op16); break;
-  case 0xaa: sprintf(t, "tax                    "); break;
-  case 0xab: sprintf(t, "plb                    "); break;
-  case 0xac: sprintf(t, "ldy $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xad: sprintf(t, "lda $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xae: sprintf(t, "ldx $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xaf: sprintf(t, "lda $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0xb0: sprintf(t, "bcs $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0xb1: sprintf(t, "lda ($%0.2x),y   [$%0.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
-  case 0xb2: sprintf(t, "lda ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0xb3: sprintf(t, "lda ($%0.2x,s),y [$%0.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
-  case 0xb4: sprintf(t, "ldy $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0xb5: sprintf(t, "lda $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0xb6: sprintf(t, "ldx $%0.2x,y     [$%0.6x]", op8, decode(OPTYPE_DPY, op8)); break;
-  case 0xb7: sprintf(t, "lda [$%0.2x],y   [$%0.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
-  case 0xb8: sprintf(t, "clv                    "); break;
-  case 0xb9: sprintf(t, "lda $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0xba: sprintf(t, "tsx                    "); break;
-  case 0xbb: sprintf(t, "tyx                    "); break;
-  case 0xbc: sprintf(t, "ldy $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0xbd: sprintf(t, "lda $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0xbe: sprintf(t, "ldx $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0xbf: sprintf(t, "lda $%0.6x,x [$%0.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
-  case 0xc0: if(x8)sprintf(t, "cpy #$%0.2x               ", op8);
-             else  sprintf(t, "cpy #$%0.4x             ", op16); break;
-  case 0xc1: sprintf(t, "cmp ($%0.2x,x)   [$%0.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
-  case 0xc2: sprintf(t, "rep #$%0.2x               ", op8); break;
-  case 0xc3: sprintf(t, "cmp $%0.2x,s     [$%0.6x]", op8, decode(OPTYPE_SR, op8)); break;
-  case 0xc4: sprintf(t, "cpy $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xc5: sprintf(t, "cmp $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xc6: sprintf(t, "dec $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xc7: sprintf(t, "cmp [$%0.2x]     [$%0.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
-  case 0xc8: sprintf(t, "iny                    "); break;
-  case 0xc9: if(a8)sprintf(t, "cmp #$%0.2x               ", op8);
-             else  sprintf(t, "cmp #$%0.4x             ", op16); break;
-  case 0xca: sprintf(t, "dex                    "); break;
-  case 0xcb: sprintf(t, "wai                    "); break;
-  case 0xcc: sprintf(t, "cpy $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xcd: sprintf(t, "cmp $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xce: sprintf(t, "dec $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xcf: sprintf(t, "cmp $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0xd0: sprintf(t, "bne $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0xd1: sprintf(t, "cmp ($%0.2x),y   [$%0.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
-  case 0xd2: sprintf(t, "cmp ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0xd3: sprintf(t, "cmp ($%0.2x,s),y [$%0.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
-  case 0xd4: sprintf(t, "pei ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0xd5: sprintf(t, "cmp $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0xd6: sprintf(t, "dec $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0xd7: sprintf(t, "cmp [$%0.2x],y   [$%0.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
-  case 0xd8: sprintf(t, "cld                    "); break;
-  case 0xd9: sprintf(t, "cmp $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0xda: sprintf(t, "phx                    "); break;
-  case 0xdb: sprintf(t, "stp                    "); break;
-  case 0xdc: sprintf(t, "jmp [$%0.4x]   [$%0.6x]", op16, decode(OPTYPE_ILADDR, op16)); break;
-  case 0xdd: sprintf(t, "cmp $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0xde: sprintf(t, "dec $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0xdf: sprintf(t, "cmp $%0.6x,x [$%0.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
-  case 0xe0: if(x8)sprintf(t, "cpx #$%0.2x               ", op8);
-             else  sprintf(t, "cpx #$%0.4x             ", op16); break;
-  case 0xe1: sprintf(t, "sbc ($%0.2x,x)   [$%0.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
-  case 0xe2: sprintf(t, "sep #$%0.2x               ", op8); break;
-  case 0xe3: sprintf(t, "sbc $%0.2x,s     [$%0.6x]", op8, decode(OPTYPE_SR, op8)); break;
-  case 0xe4: sprintf(t, "cpx $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xe5: sprintf(t, "sbc $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xe6: sprintf(t, "inc $%0.2x       [$%0.6x]", op8, decode(OPTYPE_DP, op8)); break;
-  case 0xe7: sprintf(t, "sbc [$%0.2x]     [$%0.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
-  case 0xe8: sprintf(t, "inx                    "); break;
-  case 0xe9: if(a8)sprintf(t, "sbc #$%0.2x               ", op8);
-             else  sprintf(t, "sbc #$%0.4x             ", op16); break;
-  case 0xea: sprintf(t, "nop                    "); break;
-  case 0xeb: sprintf(t, "xba                    "); break;
-  case 0xec: sprintf(t, "cpx $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xed: sprintf(t, "sbc $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xee: sprintf(t, "inc $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xef: sprintf(t, "sbc $%0.6x   [$%0.6x]", op24, decode(OPTYPE_LONG, op24)); break;
-  case 0xf0: sprintf(t, "beq $%0.4x     [$%0.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
-  case 0xf1: sprintf(t, "sbc ($%0.2x),y   [$%0.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
-  case 0xf2: sprintf(t, "sbc ($%0.2x)     [$%0.6x]", op8, decode(OPTYPE_IDP, op8)); break;
-  case 0xf3: sprintf(t, "sbc ($%0.2x,s),y [$%0.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
-  case 0xf4: sprintf(t, "pea $%0.4x     [$%0.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
-  case 0xf5: sprintf(t, "sbc $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0xf6: sprintf(t, "inc $%0.2x,x     [$%0.6x]", op8, decode(OPTYPE_DPX, op8)); break;
-  case 0xf7: sprintf(t, "sbc [$%0.2x],y   [$%0.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
-  case 0xf8: sprintf(t, "sed                    "); break;
-  case 0xf9: sprintf(t, "sbc $%0.4x,y   [$%0.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
-  case 0xfa: sprintf(t, "plx                    "); break;
-  case 0xfb: sprintf(t, "xce                    "); break;
-  case 0xfc: sprintf(t, "jsr ($%0.4x,x) [$%0.6x]", op16, decode(OPTYPE_IADDRX, op16)); break;
-  case 0xfd: sprintf(t, "sbc $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0xfe: sprintf(t, "inc $%0.4x,x   [$%0.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
-  case 0xff: sprintf(t, "sbc $%0.6x,x [$%0.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
+    case 0x00: sprintf(t, "brk #$%.2x               ", op8); break;
+    case 0x01: sprintf(t, "ora ($%.2x,x)   [$%.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
+    case 0x02: sprintf(t, "cop #$%.2x               ", op8); break;
+    case 0x03: sprintf(t, "ora $%.2x,s     [$%.6x]", op8, decode(OPTYPE_SR, op8)); break;
+    case 0x04: sprintf(t, "tsb $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x05: sprintf(t, "ora $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x06: sprintf(t, "asl $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x07: sprintf(t, "ora [$%.2x]     [$%.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
+    case 0x08: sprintf(t, "php                    "); break;
+    case 0x09: if(a8)sprintf(t, "ora #$%.2x               ", op8);
+               else  sprintf(t, "ora #$%.4x             ", op16); break;
+    case 0x0a: sprintf(t, "asl a                  "); break;
+    case 0x0b: sprintf(t, "phd                    "); break;
+    case 0x0c: sprintf(t, "tsb $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x0d: sprintf(t, "ora $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x0e: sprintf(t, "asl $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x0f: sprintf(t, "ora $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0x10: sprintf(t, "bpl $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0x11: sprintf(t, "ora ($%.2x),y   [$%.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
+    case 0x12: sprintf(t, "ora ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0x13: sprintf(t, "ora ($%.2x,s),y [$%.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
+    case 0x14: sprintf(t, "trb $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x15: sprintf(t, "ora $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x16: sprintf(t, "asl $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x17: sprintf(t, "ora [$%.2x],y   [$%.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
+    case 0x18: sprintf(t, "clc                    "); break;
+    case 0x19: sprintf(t, "ora $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0x1a: sprintf(t, "inc                    "); break;
+    case 0x1b: sprintf(t, "tcs                    "); break;
+    case 0x1c: sprintf(t, "trb $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x1d: sprintf(t, "ora $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x1e: sprintf(t, "asl $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x1f: sprintf(t, "ora $%.6x,x [$%.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
+    case 0x20: sprintf(t, "jsr $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR_PC, op16)); break;
+    case 0x21: sprintf(t, "and ($%.2x,x)   [$%.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
+    case 0x22: sprintf(t, "jsl $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0x23: sprintf(t, "and $%.2x,s     [$%.6x]", op8, decode(OPTYPE_SR, op8)); break;
+    case 0x24: sprintf(t, "bit $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x25: sprintf(t, "and $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x26: sprintf(t, "rol $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x27: sprintf(t, "and [$%.2x]     [$%.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
+    case 0x28: sprintf(t, "plp                    "); break;
+    case 0x29: if(a8)sprintf(t, "and #$%.2x               ", op8);
+               else  sprintf(t, "and #$%.4x             ", op16); break;
+    case 0x2a: sprintf(t, "rol a                  "); break;
+    case 0x2b: sprintf(t, "pld                    "); break;
+    case 0x2c: sprintf(t, "bit $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x2d: sprintf(t, "and $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x2e: sprintf(t, "rol $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x2f: sprintf(t, "and $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0x30: sprintf(t, "bmi $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0x31: sprintf(t, "and ($%.2x),y   [$%.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
+    case 0x32: sprintf(t, "and ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0x33: sprintf(t, "and ($%.2x,s),y [$%.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
+    case 0x34: sprintf(t, "bit $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x35: sprintf(t, "and $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x36: sprintf(t, "rol $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x37: sprintf(t, "and [$%.2x],y   [$%.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
+    case 0x38: sprintf(t, "sec                    "); break;
+    case 0x39: sprintf(t, "and $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0x3a: sprintf(t, "dec                    "); break;
+    case 0x3b: sprintf(t, "tsc                    "); break;
+    case 0x3c: sprintf(t, "bit $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x3d: sprintf(t, "and $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x3e: sprintf(t, "rol $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x3f: sprintf(t, "and $%.6x,x [$%.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
+    case 0x40: sprintf(t, "rti                    "); break;
+    case 0x41: sprintf(t, "eor ($%.2x,x)   [$%.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
+    case 0x42: sprintf(t, "wdm                    "); break;
+    case 0x43: sprintf(t, "eor $%.2x,s     [$%.6x]", op8, decode(OPTYPE_SR, op8)); break;
+    case 0x44: sprintf(t, "mvp $%.2x,$%.2x            ", op1, op8); break;
+    case 0x45: sprintf(t, "eor $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x46: sprintf(t, "lsr $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x47: sprintf(t, "eor [$%.2x]     [$%.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
+    case 0x48: sprintf(t, "pha                    "); break;
+    case 0x49: if(a8)sprintf(t, "eor #$%.2x               ", op8);
+               else  sprintf(t, "eor #$%.4x             ", op16); break;
+    case 0x4a: sprintf(t, "lsr a                  "); break;
+    case 0x4b: sprintf(t, "phk                    "); break;
+    case 0x4c: sprintf(t, "jmp $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR_PC, op16)); break;
+    case 0x4d: sprintf(t, "eor $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x4e: sprintf(t, "lsr $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x4f: sprintf(t, "eor $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0x50: sprintf(t, "bvc $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0x51: sprintf(t, "eor ($%.2x),y   [$%.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
+    case 0x52: sprintf(t, "eor ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0x53: sprintf(t, "eor ($%.2x,s),y [$%.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
+    case 0x54: sprintf(t, "mvn $%.2x,$%.2x            ", op1, op8); break;
+    case 0x55: sprintf(t, "eor $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x56: sprintf(t, "lsr $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x57: sprintf(t, "eor [$%.2x],y   [$%.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
+    case 0x58: sprintf(t, "cli                    "); break;
+    case 0x59: sprintf(t, "eor $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0x5a: sprintf(t, "phy                    "); break;
+    case 0x5b: sprintf(t, "tcd                    "); break;
+    case 0x5c: sprintf(t, "jml $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0x5d: sprintf(t, "eor $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x5e: sprintf(t, "lsr $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x5f: sprintf(t, "eor $%.6x,x [$%.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
+    case 0x60: sprintf(t, "rts                    "); break;
+    case 0x61: sprintf(t, "adc ($%.2x,x)   [$%.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
+    case 0x62: sprintf(t, "per $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x63: sprintf(t, "adc $%.2x,s     [$%.6x]", op8, decode(OPTYPE_SR, op8)); break;
+    case 0x64: sprintf(t, "stz $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x65: sprintf(t, "adc $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x66: sprintf(t, "ror $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x67: sprintf(t, "adc [$%.2x]     [$%.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
+    case 0x68: sprintf(t, "pla                    "); break;
+    case 0x69: if(a8)sprintf(t, "adc #$%.2x               ", op8);
+               else  sprintf(t, "adc #$%.4x             ", op16); break;
+    case 0x6a: sprintf(t, "ror a                  "); break;
+    case 0x6b: sprintf(t, "rtl                    "); break;
+    case 0x6c: sprintf(t, "jmp ($%.4x)   [$%.6x]", op16, decode(OPTYPE_IADDR_PC, op16)); break;
+    case 0x6d: sprintf(t, "adc $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x6e: sprintf(t, "ror $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x6f: sprintf(t, "adc $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0x70: sprintf(t, "bvs $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0x71: sprintf(t, "adc ($%.2x),y   [$%.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
+    case 0x72: sprintf(t, "adc ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0x73: sprintf(t, "adc ($%.2x,s),y [$%.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
+    case 0x74: sprintf(t, "stz $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x75: sprintf(t, "adc $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x76: sprintf(t, "ror $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x77: sprintf(t, "adc [$%.2x],y   [$%.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
+    case 0x78: sprintf(t, "sei                    "); break;
+    case 0x79: sprintf(t, "adc $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0x7a: sprintf(t, "ply                    "); break;
+    case 0x7b: sprintf(t, "tdc                    "); break;
+    case 0x7c: sprintf(t, "jmp ($%.4x,x) [$%.6x]", op16, decode(OPTYPE_IADDRX, op16)); break;
+    case 0x7d: sprintf(t, "adc $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x7e: sprintf(t, "ror $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x7f: sprintf(t, "adc $%.6x,x [$%.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
+    case 0x80: sprintf(t, "bra $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0x81: sprintf(t, "sta ($%.2x,x)   [$%.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
+    case 0x82: sprintf(t, "brl $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELW, op16)), decode(OPTYPE_RELW, op16)); break;
+    case 0x83: sprintf(t, "sta $%.2x,s     [$%.6x]", op8, decode(OPTYPE_SR, op8)); break;
+    case 0x84: sprintf(t, "sty $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x85: sprintf(t, "sta $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x86: sprintf(t, "stx $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0x87: sprintf(t, "sta [$%.2x]     [$%.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
+    case 0x88: sprintf(t, "dey                    "); break;
+    case 0x89: if(a8)sprintf(t, "bit #$%.2x               ", op8);
+               else  sprintf(t, "bit #$%.4x             ", op16); break;
+    case 0x8a: sprintf(t, "txa                    "); break;
+    case 0x8b: sprintf(t, "phb                    "); break;
+    case 0x8c: sprintf(t, "sty $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x8d: sprintf(t, "sta $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x8e: sprintf(t, "stx $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x8f: sprintf(t, "sta $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0x90: sprintf(t, "bcc $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0x91: sprintf(t, "sta ($%.2x),y   [$%.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
+    case 0x92: sprintf(t, "sta ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0x93: sprintf(t, "sta ($%.2x,s),y [$%.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
+    case 0x94: sprintf(t, "sty $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x95: sprintf(t, "sta $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0x96: sprintf(t, "stx $%.2x,y     [$%.6x]", op8, decode(OPTYPE_DPY, op8)); break;
+    case 0x97: sprintf(t, "sta [$%.2x],y   [$%.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
+    case 0x98: sprintf(t, "tya                    "); break;
+    case 0x99: sprintf(t, "sta $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0x9a: sprintf(t, "txs                    "); break;
+    case 0x9b: sprintf(t, "txy                    "); break;
+    case 0x9c: sprintf(t, "stz $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0x9d: sprintf(t, "sta $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x9e: sprintf(t, "stz $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0x9f: sprintf(t, "sta $%.6x,x [$%.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
+    case 0xa0: if(x8)sprintf(t, "ldy #$%.2x               ", op8);
+               else  sprintf(t, "ldy #$%.4x             ", op16); break;
+    case 0xa1: sprintf(t, "lda ($%.2x,x)   [$%.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
+    case 0xa2: if(x8)sprintf(t, "ldx #$%.2x               ", op8);
+               else  sprintf(t, "ldx #$%.4x             ", op16); break;
+    case 0xa3: sprintf(t, "lda $%.2x,s     [$%.6x]", op8, decode(OPTYPE_SR, op8)); break;
+    case 0xa4: sprintf(t, "ldy $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xa5: sprintf(t, "lda $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xa6: sprintf(t, "ldx $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xa7: sprintf(t, "lda [$%.2x]     [$%.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
+    case 0xa8: sprintf(t, "tay                    "); break;
+    case 0xa9: if(a8)sprintf(t, "lda #$%.2x               ", op8);
+               else  sprintf(t, "lda #$%.4x             ", op16); break;
+    case 0xaa: sprintf(t, "tax                    "); break;
+    case 0xab: sprintf(t, "plb                    "); break;
+    case 0xac: sprintf(t, "ldy $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xad: sprintf(t, "lda $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xae: sprintf(t, "ldx $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xaf: sprintf(t, "lda $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0xb0: sprintf(t, "bcs $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0xb1: sprintf(t, "lda ($%.2x),y   [$%.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
+    case 0xb2: sprintf(t, "lda ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0xb3: sprintf(t, "lda ($%.2x,s),y [$%.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
+    case 0xb4: sprintf(t, "ldy $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0xb5: sprintf(t, "lda $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0xb6: sprintf(t, "ldx $%.2x,y     [$%.6x]", op8, decode(OPTYPE_DPY, op8)); break;
+    case 0xb7: sprintf(t, "lda [$%.2x],y   [$%.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
+    case 0xb8: sprintf(t, "clv                    "); break;
+    case 0xb9: sprintf(t, "lda $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0xba: sprintf(t, "tsx                    "); break;
+    case 0xbb: sprintf(t, "tyx                    "); break;
+    case 0xbc: sprintf(t, "ldy $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0xbd: sprintf(t, "lda $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0xbe: sprintf(t, "ldx $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0xbf: sprintf(t, "lda $%.6x,x [$%.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
+    case 0xc0: if(x8)sprintf(t, "cpy #$%.2x               ", op8);
+               else  sprintf(t, "cpy #$%.4x             ", op16); break;
+    case 0xc1: sprintf(t, "cmp ($%.2x,x)   [$%.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
+    case 0xc2: sprintf(t, "rep #$%.2x               ", op8); break;
+    case 0xc3: sprintf(t, "cmp $%.2x,s     [$%.6x]", op8, decode(OPTYPE_SR, op8)); break;
+    case 0xc4: sprintf(t, "cpy $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xc5: sprintf(t, "cmp $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xc6: sprintf(t, "dec $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xc7: sprintf(t, "cmp [$%.2x]     [$%.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
+    case 0xc8: sprintf(t, "iny                    "); break;
+    case 0xc9: if(a8)sprintf(t, "cmp #$%.2x               ", op8);
+               else  sprintf(t, "cmp #$%.4x             ", op16); break;
+    case 0xca: sprintf(t, "dex                    "); break;
+    case 0xcb: sprintf(t, "wai                    "); break;
+    case 0xcc: sprintf(t, "cpy $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xcd: sprintf(t, "cmp $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xce: sprintf(t, "dec $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xcf: sprintf(t, "cmp $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0xd0: sprintf(t, "bne $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0xd1: sprintf(t, "cmp ($%.2x),y   [$%.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
+    case 0xd2: sprintf(t, "cmp ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0xd3: sprintf(t, "cmp ($%.2x,s),y [$%.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
+    case 0xd4: sprintf(t, "pei ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0xd5: sprintf(t, "cmp $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0xd6: sprintf(t, "dec $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0xd7: sprintf(t, "cmp [$%.2x],y   [$%.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
+    case 0xd8: sprintf(t, "cld                    "); break;
+    case 0xd9: sprintf(t, "cmp $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0xda: sprintf(t, "phx                    "); break;
+    case 0xdb: sprintf(t, "stp                    "); break;
+    case 0xdc: sprintf(t, "jmp [$%.4x]   [$%.6x]", op16, decode(OPTYPE_ILADDR, op16)); break;
+    case 0xdd: sprintf(t, "cmp $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0xde: sprintf(t, "dec $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0xdf: sprintf(t, "cmp $%.6x,x [$%.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
+    case 0xe0: if(x8)sprintf(t, "cpx #$%.2x               ", op8);
+               else  sprintf(t, "cpx #$%.4x             ", op16); break;
+    case 0xe1: sprintf(t, "sbc ($%.2x,x)   [$%.6x]", op8, decode(OPTYPE_IDPX, op8)); break;
+    case 0xe2: sprintf(t, "sep #$%.2x               ", op8); break;
+    case 0xe3: sprintf(t, "sbc $%.2x,s     [$%.6x]", op8, decode(OPTYPE_SR, op8)); break;
+    case 0xe4: sprintf(t, "cpx $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xe5: sprintf(t, "sbc $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xe6: sprintf(t, "inc $%.2x       [$%.6x]", op8, decode(OPTYPE_DP, op8)); break;
+    case 0xe7: sprintf(t, "sbc [$%.2x]     [$%.6x]", op8, decode(OPTYPE_ILDP, op8)); break;
+    case 0xe8: sprintf(t, "inx                    "); break;
+    case 0xe9: if(a8)sprintf(t, "sbc #$%.2x               ", op8);
+               else  sprintf(t, "sbc #$%.4x             ", op16); break;
+    case 0xea: sprintf(t, "nop                    "); break;
+    case 0xeb: sprintf(t, "xba                    "); break;
+    case 0xec: sprintf(t, "cpx $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xed: sprintf(t, "sbc $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xee: sprintf(t, "inc $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xef: sprintf(t, "sbc $%.6x   [$%.6x]", op24, decode(OPTYPE_LONG, op24)); break;
+    case 0xf0: sprintf(t, "beq $%.4x     [$%.6x]", uint16(decode(OPTYPE_RELB, op8)), decode(OPTYPE_RELB, op8)); break;
+    case 0xf1: sprintf(t, "sbc ($%.2x),y   [$%.6x]", op8, decode(OPTYPE_IDPY, op8)); break;
+    case 0xf2: sprintf(t, "sbc ($%.2x)     [$%.6x]", op8, decode(OPTYPE_IDP, op8)); break;
+    case 0xf3: sprintf(t, "sbc ($%.2x,s),y [$%.6x]", op8, decode(OPTYPE_ISRY, op8)); break;
+    case 0xf4: sprintf(t, "pea $%.4x     [$%.6x]", op16, decode(OPTYPE_ADDR, op16)); break;
+    case 0xf5: sprintf(t, "sbc $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0xf6: sprintf(t, "inc $%.2x,x     [$%.6x]", op8, decode(OPTYPE_DPX, op8)); break;
+    case 0xf7: sprintf(t, "sbc [$%.2x],y   [$%.6x]", op8, decode(OPTYPE_ILDPY, op8)); break;
+    case 0xf8: sprintf(t, "sed                    "); break;
+    case 0xf9: sprintf(t, "sbc $%.4x,y   [$%.6x]", op16, decode(OPTYPE_ADDRY, op16)); break;
+    case 0xfa: sprintf(t, "plx                    "); break;
+    case 0xfb: sprintf(t, "xce                    "); break;
+    case 0xfc: sprintf(t, "jsr ($%.4x,x) [$%.6x]", op16, decode(OPTYPE_IADDRX, op16)); break;
+    case 0xfd: sprintf(t, "sbc $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0xfe: sprintf(t, "inc $%.4x,x   [$%.6x]", op16, decode(OPTYPE_ADDRX, op16)); break;
+    case 0xff: sprintf(t, "sbc $%.6x,x [$%.6x]", op24, decode(OPTYPE_LONGX, op24)); break;
   }
-#undef op8
-#undef op16
-#undef op24
-#undef a8
-#undef x8
+
+  #undef op8
+  #undef op16
+  #undef op24
+  #undef a8
+  #undef x8
 
   strcat(s, t);
   strcat(s, " ");
 
-  sprintf(t, "A:%0.4x X:%0.4x Y:%0.4x S:%0.4x D:%0.4x DB:%0.2x ",
+  sprintf(t, "A:%.4x X:%.4x Y:%.4x S:%.4x D:%.4x DB:%.2x ",
     regs.a.w, regs.x.w, regs.y.w, regs.s.w, regs.d.w, regs.db);
   strcat(s, t);
 
   if(regs.e) {
     sprintf(t, "%c%c%c%c%c%c%c%c",
-      (regs.p.n) ? 'N' : 'n', (regs.p.v) ? 'V' : 'v',
-      (regs.p.m) ? '1' : '0', (regs.p.x) ? 'B' : 'b',
-      (regs.p.d) ? 'D' : 'd', (regs.p.i) ? 'I' : 'i',
-      (regs.p.z) ? 'Z' : 'z', (regs.p.c) ? 'C' : 'c');
+      regs.p.n ? 'N' : 'n', regs.p.v ? 'V' : 'v',
+      regs.p.m ? '1' : '0', regs.p.x ? 'B' : 'b',
+      regs.p.d ? 'D' : 'd', regs.p.i ? 'I' : 'i',
+      regs.p.z ? 'Z' : 'z', regs.p.c ? 'C' : 'c');
   } else {
     sprintf(t, "%c%c%c%c%c%c%c%c",
-      (regs.p.n) ? 'N' : 'n', (regs.p.v) ? 'V' : 'v',
-      (regs.p.m) ? 'M' : 'm', (regs.p.x) ? 'X' : 'x',
-      (regs.p.d) ? 'D' : 'd', (regs.p.i) ? 'I' : 'i',
-      (regs.p.z) ? 'Z' : 'z', (regs.p.c) ? 'C' : 'c');
+      regs.p.n ? 'N' : 'n', regs.p.v ? 'V' : 'v',
+      regs.p.m ? 'M' : 'm', regs.p.x ? 'X' : 'x',
+      regs.p.d ? 'D' : 'd', regs.p.i ? 'I' : 'i',
+      regs.p.z ? 'Z' : 'z', regs.p.c ? 'C' : 'c');
   }
 
   strcat(s, t);
   strcat(s, " ");
 
-  sprintf(t, "V:%3d H:%4d", vcounter(), hclock());
+  sprintf(t, "V:%3d H:%4d", ppu.vcounter(), ppu.hcounter());
   strcat(s, t);
 }
 
-/*****
- * opcode_length() retrieves the length of the next opcode
- * to be executed. It is used by the debugger to step over,
- * disable and proceed cpu opcodes.
- *
- * 5 and 6 are special cases, 5 is used for #consts based on
- * the A register size, 6 for the X/Y register size. the
- * rest are literal sizes. There's no need to test for
- * emulation mode, as regs.p.m/regs.p.x should *always* be
- * set in emulation mode.
- *****/
+//opcode_length() retrieves the length of the next opcode
+//to be executed. It is used by the debugger to step over,
+//disable and proceed cpu opcodes.
+//
+//5 and 6 are special cases, 5 is used for #consts based on
+//the A register size, 6 for the X/Y register size. the
+//rest are literal sizes. There's no need to test for
+//emulation mode, as regs.p.m/regs.p.x should *always* be
+//set in emulation mode.
+
 uint8 CPU::opcode_length() {
-uint8 op, len;
-static uint8 op_len_tbl[256] = {
-//0,1,2,3,  4,5,6,7,  8,9,a,b,  c,d,e,f
+  uint8 op, len;
+  static uint8 op_len_tbl[256] = {
+  //0,1,2,3,  4,5,6,7,  8,9,a,b,  c,d,e,f
 
-  2,2,2,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0x0n
-  2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0x1n
-  3,2,4,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0x2n
-  2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0x3n
+    2,2,2,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0x0n
+    2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0x1n
+    3,2,4,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0x2n
+    2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0x3n
 
-  1,2,2,2,  3,2,2,2,  1,5,1,1,  3,3,3,4, //0x4n
-  2,2,2,2,  3,2,2,2,  1,3,1,1,  4,3,3,4, //0x5n
-  1,2,3,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0x6n
-  2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0x7n
+    1,2,2,2,  3,2,2,2,  1,5,1,1,  3,3,3,4, //0x4n
+    2,2,2,2,  3,2,2,2,  1,3,1,1,  4,3,3,4, //0x5n
+    1,2,3,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0x6n
+    2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0x7n
 
-  2,2,3,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0x8n
-  2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0x9n
-  6,2,6,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0xan
-  2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0xbn
+    2,2,3,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0x8n
+    2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0x9n
+    6,2,6,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0xan
+    2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0xbn
+
+    6,2,2,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0xcn
+    2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0xdn
+    6,2,2,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0xen
+    2,2,2,2,  3,2,2,2,  1,3,1,1,  3,3,3,4  //0xfn
+  };
 
-  6,2,2,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0xcn
-  2,2,2,2,  2,2,2,2,  1,3,1,1,  3,3,3,4, //0xdn
-  6,2,2,2,  2,2,2,2,  1,5,1,1,  3,3,3,4, //0xen
-  2,2,2,2,  3,2,2,2,  1,3,1,1,  3,3,3,4  //0xfn
-};
   if(in_opcode() == true) {
     return 0;
   }
 
   op  = dreadb(regs.pc.d);
   len = op_len_tbl[op];
-  if(len == 5)return (regs.e || regs.p.m) ? 2 : 3;
-  if(len == 6)return (regs.e || regs.p.x) ? 2 : 3;
+  if(len == 5) return (regs.e || regs.p.m) ? 2 : 3;
+  if(len == 6) return (regs.e || regs.p.x) ? 2 : 3;
   return len;
 }
+
+#endif  //ifdef CPU_CPP

src/cpu/scpu/core/cc.bat

@@ -1,3 +0,0 @@
-cl /nologo /O2 scpugen.cpp
-@pause
-@del *.obj

src/cpu/scpu/core/cc.sh

@@ -0,0 +1,4 @@
+g++ -c scpugen.cpp -I../../../lib
+g++ -c ../../../lib/nall/string.cpp -I../../../lib
+g++ -o scpugen scpugen.o string.o
+rm *.o

src/cpu/scpu/core/clean.bat

@@ -1 +0,0 @@
-@del *.exe

src/cpu/scpu/core/clean.sh

@@ -0,0 +1 @@
+rm scpugen

src/cpu/scpu/core/core.cpp

@@ -1,20 +1,23 @@
+#ifdef SCPU_CPP
+
 #include "opfn.cpp"
 
-#include "op_read.cpp"
-#include "op_write.cpp"
-#include "op_rmw.cpp"
-#include "op_pc.cpp"
-#include "op_misc.cpp"
+void sCPU::enter() {
+  initialize:
+  //initial latch values for $213c/$213d
+  //[x]0035 : [y]0000 (53.0 -> 212) [lda $2137]
+  //[x]0038 : [y]0000 (56.5 -> 226) [nop : lda $2137]
+  add_clocks(186);
 
-void sCPU::enter() { loop:
-  if(event.irq) {
-    event.irq = false;
-    if(status.nmi_pending == true) {
+  loop:
+  if(status.interrupt_pending) {
+    status.interrupt_pending = false;
+    if(status.nmi_pending) {
       status.nmi_pending = false;
-      event.irq_vector = (regs.e == false) ? 0xffea : 0xfffa;
-    } else if(status.irq_pending == true) {
+      status.interrupt_vector = (regs.e == false ? 0xffea : 0xfffa);
+    } else if(status.irq_pending) {
       status.irq_pending = false;
-      event.irq_vector = (regs.e == false) ? 0xffee : 0xfffe;
+      status.interrupt_vector = (regs.e == false ? 0xffee : 0xfffe);
     }
     op_irq();
   }
@@ -22,7 +25,13 @@ void sCPU::enter() { loop:
   tracer.trace_cpuop(); //traces CPU opcode (only if tracer is enabled)
 
   status.in_opcode = true;
-  (this->*optbl[op_readpc()])();
+  switch(op_readpc()) {
+    #include "op_read.cpp"
+    #include "op_write.cpp"
+    #include "op_rmw.cpp"
+    #include "op_pc.cpp"
+    #include "op_misc.cpp"
+  }
   status.in_opcode = false;
 
   goto loop;
@@ -31,20 +40,35 @@ void sCPU::enter() { loop:
 void sCPU::op_irq() {
   op_read(regs.pc.d);
   op_io();
-  if(!regs.e)op_writestack(regs.pc.b);
+  if(!regs.e) op_writestack(regs.pc.b);
   op_writestack(regs.pc.h);
   op_writestack(regs.pc.l);
   op_writestack(regs.e ? (regs.p & ~0x10) : regs.p);
-  rd.l = op_read(event.irq_vector + 0);
+  rd.l = op_read(status.interrupt_vector + 0);
   regs.pc.b = 0x00;
   regs.p.i  = 1;
   regs.p.d  = 0;
-  rd.h = op_read(event.irq_vector + 1);
+  rd.h = op_read(status.interrupt_vector + 1);
   regs.pc.w = rd.w;
+}
+
+//immediate, 2-cycle opcodes with I/O cycle will become bus read
+//when an IRQ is to be triggered immediately after opcode completion
+//this affects the following opcodes:
+//  clc, cld, cli, clv, sec, sed, sei,
+//  tax, tay, txa, txy, tya, tyx,
+//  tcd, tcs, tdc, tsc, tsx, txs,
+//  inc, inx, iny, dec, dex, dey,
+//  asl, lsr, rol, ror, nop, xce.
+alwaysinline void sCPU::op_io_irq() {
+  if(status.interrupt_pending) {
+    //IRQ pending, modify I/O cycle to bus read cycle, do not increment PC
+    op_read(regs.pc.d);
+  } else {
+    op_io();
+  }
 }
 
-//
-
 alwaysinline void sCPU::op_io_cond2() {
   if(regs.d.l != 0x00) {
     op_io();
@@ -62,3 +86,5 @@ alwaysinline void sCPU::op_io_cond6(uint16 addr) {
     op_io();
   }
 }
+
+#endif