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Author SHA1 Message Date
byuu
8c591ce44a Update to bsnes v035 release.
Changelog:
    - Added video synchronization support at long last [blargg, byuu].
    - Added audio panel to control volume, latency, frequency and SNES input frequency settings.
    - Added driver panel to select APIs to use for video, audio and input.
    - Added crash handler for driver initialization.
    - Xv and SDL video drivers now work with compositing enabled on Linux/Xorg.
    - Improved ALSA audio driver for Linux.
    - Now using a fixed output frequency, along with a 4-tap hermite resampler.
    - Improved header detection; fixes Batman: Revenge of The Joker and a few fan translations.
    - Frameskip will now randomly choose a frame in each set to display; helps with animations.
    - Locales now support meta-data, which allows for unique translations of the same English input.
2008-08-22 22:28:00 +00:00
byuu
e2cc164f70 Update to bsnes v034r06 release.
This will probably be the last public WIP, so get it now if you want
it.

    http://byuu.cinnamonpirate.com/temp/bsnes_v034_wip06.zip


I used the same "create a child window inside the output window" trick
for Xv that I used for OpenGL, so Xv will now work even with a
compositor enabled.

I also added Video::Synchronize support to OpenGL for Windows. My card
seems to force it on regardless of my driver settings, but maybe
you'll have better luck. That driver had the same issue with
allocating 16MB of memory instead of 4MB (that was due to copy and
pasting of code), so that's fixed too.

This version lowers the CPU<>SMP drifting by an order of magnitude.
You shouldn't notice the speed hit. I can't really get any lower
latency with that, though.

I also restricted the latency range to 25 - 175, with the default
being in the center, 100ms. Quite conservative, given the average we
see is 70-80ms. But you won't notice the difference, and this way we
ensure no popping even in exceptional circumstances by default. 25ms
is doable without video sync and with OSS4+cooked mode, but I
seriously doubt any Windows user will get lower without something
crazy going on with the sound card drivers.

Lastly, I've replaced the 2-tap linear resampler with a 4-tap hermite
resampler. You won't be able to tell the difference, but it's quite
pronounced if you use a waveform analyzer on much higher output
frequencies:

Linear:
Image

Hermite:
Image

Hermite is essentially better than cubic (for which cubic spline is an
optimized version of), as it is better at not going too far away from
the points, so you get a bit less clamping in the extreme cases. But
the difference isn't audible to humans anyway. It's still clearly
inferior to band-limited interpolation, as it will still have
noticeable aliasing of things like square waves and such, but it's
orders of magnitude less complex to implement.

Keep in mind that nobody could tell the difference even with linear
interpolation from the last few WIPs.

----------

Aside from that, I'm pretty much ready to release a new version. If
anyone has any show stoppers, _now_ is the time to say something.
Otherwise I'll probably post something tomorrow or Friday.
2008-08-20 20:36:54 +00:00
byuu
d09e54149b Update to bsnes v034r05 release.
http://byuu.org/temp/bsnes_v034_wip05.zip


OpenGL/Linux now destroys the window and colormap it creates, and it
also avoids allocating 16MB of memory when only 4MB are actually
needed. Forgot to remove the * sizeof(uint32_t) from the buffer
allocation after changing it from malloc to new. I use 4MB because the
internal buffer size is 1024x1024@32bpp. I make it larger than needed
to support both present and future filter requirements (eg HQ4x would
need 1024x960 minimum.)

The X-Video driver will now look for XV_SYNC_TO_VBLANK and add the
video synchronize option when it exists. Unfortunately, that doesn't
stop the binary nvidia driver from ignoring the setting anyway, but it
should be nice for those using the nv driver or somesuch, especially
as it lacks OpenGL support.

For whatever reason, I was able to get my latency in DirectSound down
to 70ms. Not sure if it's related to these changes or not, but I won't
complain. I also needed to set 32150hz / -50 for the input frequency
adjustment. Probably just differences between the monitor timings on
Windows and Linux.

That said, let's get some averages. With the new WIP, be sure to reset
all of your audio and driver settings. It may even default to no
driver at all if you were using a custom one before.

From there, please post the video driver, audio driver, latency and
SNES input adjustment values that work best for you.

> BTW, were you able to look into that status bar bug?


Thanks for pointing that out. The status bar properly restored its
state, but the menu bar did not. Rather than save the menubar state (I
wanted to avoid that for people who accidentally hide the menubar and
then close the app, and don't remember how to re-enable it), I just
made it not save the status bar state at all. Apologies to those who
hate the status bar, you'll have to turn it off more frequently now.
Direct your pitchforks at FirebrandX :P

[No archive available]
2008-08-19 13:55:00 +00:00
byuu
8e4f1be189 Update to bsnes v034r04 release.
14 hours of straight programming brings you this:
    http://byuu.cinnamonpirate.com/temp/bsnes_v034_wip04.zip


Windows binary and source included, binary does not have ZIP+JMA
support enabled, as it's a WIP release.

Yes, vsync works both on Windows and Linux. In fact, it actually seems
to work better on Linux, in that it requires lower audio latencies and
has no troubles at full 5x scale on my 1920x1200 monitor.

Overview of new features:

Most importantly, I've added a new menu group to the settings menu
group, "Synchronize", containing "Synchronize Video" and "Synchronize
Audio" checkboxes. You can have neither, one or both checked. Up to
you. That made the "Uncapped" speed setting redundant, so that was
removed.

Next, there's a new audio configuration panel with lots of new
goodies.

Volume lets you scale audio from 10% to 200%. Note that going over
100% will obviously cause aliasing. It's a much better idea to turn up
your speakers first. But who knows, it could come in handy. On one
machine with OSS4, I couldn't adjust volume in Audacious, and it
always bothered me that it was so much louder than bsnes, so I saw no
reason to cap the volume to 100% here.

Latency lets you control the number of milliseconds between adding
data to the sound buffer and it being played. Note that this is _not_
the absolute latency. Any sound servers and resamplers will obviously
add to this. It increments in steps of 5ms, because I don't want
people wasting their time trying to get it absolutely perfect. 5ms is
a small enough increment that no human being will notice. I also have
to re-create all the buffers and/or device itself when that changes,
so I want to keep it from changing too frequently. Not that there's a
memory / resource leak, but just in case.

PC output frequency let's you control the master frequency for the
sound card output. You can set this to 22050hz (not a good idea, loses
precision, there as a last resort), 32000hz (for purists), 44100hz
(for most cards), 48000hz (for higher end cards -- set as default
because it's a nicer multiple of 32000 than 44100 is) and, yes,
96000hz. And I'm sure all the audiophiles will remark how much better
it sounds, right?

Believe it or not, there's actually some value to higher frequencies
for the vsync. Higher rates lower the rounding errors with
interpolation and such, so you can use lower SNES input rates. And
speaking of which ...

SNES input frequency is what the base SNES input is skewed to. The
basic idea is that you want to get the value as low as possible
without sound crackling. The lower it is, the less video frames
duplicated, the less jerkiness of the video. The higher it is, the
less likely an audio breakup is.

Once again, Linux seems to come out on top here. Because of it's non-
ring buffer approach to audio, both ALSA and OpenAL can insert blank
samples in a way that DirectSound simply cannot. Whatever it does to
BS underflows, it works really well, because you can barely even
notice it.

The default is a tad on the dangerous side. If anything, you may need
to increase it.

Get the right values for everything, and you can easily play games and
never notice any video tearing or audio crackling whatsoever.

Lastly, I removed the "Show Statusbar" option from the misc menu, per
FitzRoy.

Oh, also note that with Linux (both for OpenGL and Xv) and Win/OpenGL,
you have to toggle the vsync enable in your video driver's control
panel. Pain in the ass, that. Linux/SDL and Win/GDI do not vsync. No,
I'm not even going to bother trying to add that to them.

My settings:

Hardware:
nVidia 8800 GTS 320, Intel HDA audio, 24" LG @ 1920x1200x24bpp@60hz

Windows:
Direct3D, DirectSound, Latency = 120ms, PC freq = 48000hz, SNES freq =
32050hz; 4x scale always works, 5x scale misses vblank every few
seconds

Linux:
OpenGL, ALSA, Latency = 60ms, PC freq = 48000hz, SNES freq = 32050hz;
4x and 5x scale always works

I'd be interested in hearing what works best for you guys. I'm
especially interested in how PAL works on a monitor running at 50hz. I
don't have any that can handle that resolution, nor 100hz. I don't
expect scrolling to look great at 100/120hz, as I have no special
handling for it.

> Even if it is wondows-only, you may want to add the option of using
> a short sleep in the advanced options panel.


No, I really can't :P
I tried just to see what would happen, calling Sleep(1) a single time
is enough to jump over the entire vblank period. In the worst case
scenario, you get stuck in a loop, never hitting vblank, and the
framerate drops to 1fps. Trust me, you don't want a sleep in there.

Now, I know you're thinking, "why not let the video card do the sync
for you?" -- well, one, some drivers still eat up all the CPU time in
their loops, and two, by polling the vblank status repeatedly, I
actually get better results with 5x scale in D3D on my system. And I
don't have to destroy the video device to toggle the video sync
enable.

[No archive available]
2008-08-17 20:22:00 +00:00
byuu
f529a84fd1 Update to bsnes v034r03v release.
For Windows / Direct3D / DirectSound _only_.

    http://byuu.cinnamonpirate.com/temp/bsnes_v034_wip03v.zip


Leave it at 100% speed, play NTSC games, leave frameskip off. I don't
care if any of that is broken or not right now.

There are two special variables this time: system.vsync_magic and
system.latency_magic.

The former is the skew for the resampler, you create that many samples
per 32000 samples of output. The latter is the latency in samples. It
will tell you how much total latency you'll end up getting when you
start the emulator.

Note that the system requirements are much greater with the CPU<>SMP
desync trick disabled. It's something like 10-20% slower. So leave off
the filters, please.

If vsync_magic is too low / high, it will tell you on the terminal by
printing an underflow warning. If latency_magic is too low, you'll
hear crackling.

The bad news: no matter what values I plug in, I still get crackling.
I can get it to be pretty rare, but I'm completely unable to get
smooth audio. Maybe you'll have better luck, who knows.

For me at least, the vsync_magic value that sounds best keeps varying
every few minutes between 32100 and 32250. The latency is through the
fucking roof. I've got it over 120ms and it's still not enough to
prevent occasional audio crackling. It's already much too high to be
practical for a release.

Note that without vsync, it only needed to be 60ms, and that was a
conservative number. We could get it down to 20-40ms with the right
hardware.

[No archive available]
2008-08-15 13:27:00 +00:00
byuu
567d415290 Update to bsnes v034r03 release.
New WIP, with _major_ changes to internal header detection.

This should get everything working, if we're lucky. It does get
Batman: RotJ working for the first time, as well as all the fan
translations.

I'm releasing it publicly, as I need all the help I can get with this
one. Windows binary with ZIP+JMA support included along with source
for the penguins.

    byuu.org/temp/bsnes_v034_wip03.zip


Do note that I left the console enabled in the binary. It's not a
release-grade version, anyway. But the main reason was to print the
scoring information. If any games fail, I'd like that information
posted. Might be good to note really close passes, as well, so we can
keep an eye on them for future changes. Right now, I'm only aware of
SFA2 that gets really really close.

Basically, it prints the address it tests for a header at, the score
it ended up getting, and the reset vector's first opcode. If the
values are equal, it defaults to LoROM, then HiROM, then ExHiROM. If
the reset vector is invalid, or the ROM is too small to contain a
header at a certain offset, you won't see any output for that line!
That means a lot of times, you'll only see one line output, and
sometimes you'll see two or three. No worries, just assume missing
means total fail. It only prints output for "possible" header
locations.

If you do test, you don't have to play in-game or anything. The second
you see any visible output whatsoever, that's good enough.

Many thanks to everyone who tests in advance :D

----------

Hunter and tukuyomi, thank you for the kind words and localizations :)

I really hate that table on the download page, and I need to go
through and get names out of all of the locales, but I'd like to get
an "Author:" field in that table on the download page. Sorry it's not
there just yet.

----------

Fes, thanks for the feedback.

> Apparently it has a limit of 65535 bytes for string literals.


I don't have a workaround for that. For whatever reason, ISO didn't
add an "incbin"-style command, and I need a platform-agnostic way of
encoding binary data.

Not for v035, but maybe a while after that, I'll use a more advanced
compressor to get the controller below 64kb of string data. Maybe I
can rig my order-0 arithmetic coder onto the end of LZSS for a quick
and dirty size cut. The reason I don't use 0xnn, 0xnn, is because that
takes 5 bytes of source to encode one byte of input, whereas base-64
strings only take ~1.25 bytes. I didn't want those files to slow down
compilation much.

> # Next, in dictionary.hpp, the first for loop uses 'i' as its
> counter, then declares 'i' again inside the loop body for additional
> work.


Oops, sorry. Didn't get a warning on GCC, so I overlooked it. This is
now fixed.

> # Cartridge::get_base_filename and Cartridge::apply_patch both claim
> to return a value, but don't seem to do so.


First should return the filename, it's just a convenience thing to
allow chaining commands. The second should return result of patching.
I've fixed both now, thanks.

> # spc_dsp.h, nal/file.hpp, and ups.hpp all attempted to include
> stdint.h, which isn't part of vc++. Are those files perhaps meant to
> include nall/stdint.h instead of the standard one?


Microsoft really pisses me off by intentionally ignoring stdint.h.
nall/stdint.hpp was meant as a workaround, so that I didn't have to
special case Visual C++. The idea was to not require you to get one of
those third-party add-ons.

So yes, two of those were a mistake on my part, I used stdint.h on
them before I created my own stdint wrapper. I've corrected both.

As for spc_dsp.h, that shouldn't be compiled. That is for blargg's
reference, unmodified S-DSP emulator. The ones modified to work in
bsnes do not require it. And in fact, only src/dsp/sdsp will compile
at the moment due to memory map changes.

> # pEditbox::get_text seems to declare a dynamically sized stack
> array, which CL balked at.


Hahah, yeah, that would be C99 syntax. Very nice, that.

Looks like I was allocating length*2 wchars, too. I don't know why I
was doing that ... I don't think Microsoft's system even supports the
extended Unicode symbols that need more than 16-bits, and even if so,
they aren't likely to appear in the emulator.

Dropped that back to length+1, and made it use new[]/delete[],
instead. That's one horribly inefficient routine by the way, but
whatever, it works for now.

The rest I can't do much about, sorry. Hopefully it'll make it easier
for you to compile in the future. Sorry for letting the port slip, I
just don't have the patience to load VS2k5 again. Software takes like
three hours to install >_< and creates slower code than GCC4 anyway.
If they'd fix their damn PGO support, I'd be all over it again,
though.
2008-08-13 21:09:15 +00:00
byuu
435a194ccd Update to bsnes v034r02 release.
New WIP.

First, the internal ROM header detected was enhanced. Nach was right,
so I went ahead and did it the right way ... it'll score all three
regions individually now, and then use some heuristics for those
annoying games that duplicate the header entirely in multiple places.
The hardest games to detect, that I recall, are Double Dragon and
Street Fighter Alpha 2, which seem okay. In fact, all ~50 of the games
I have seem to be working fine.
Please let me know if any games fail to start as of this WIP.

Second, finished updating all of src/memory to convert uint ->
unsigned. Yeah, I like the former more, but the latter is a built-in
type. Did the same to hiro, and converted Event to event_t, looks
nicer in code. Part of namespace libhiro, so no worries about other
things named event_t.

Third, added the frameskip cycling code. It just randomly chooses
which of the set of frames to display (random() % (frameskip + 1)).
Seems to work as expected, you can see Link blink when hit even with
FS=1, but obviously it stutters a bit more.

Fourth, I finally added RedDwarf and Nach's latest ALSA code. ALSA
will now with at 75% speed and with speed uncapped. It has the same
overhead as OpenAL. So, unfortunately, due to OpenAL's issues with
completely destroying echo / reverb for some reason, I'm going to have
to recommend Linux users set system.audio to "alsa" from now on :/
FreeBSD users should rely on "libao".

I'd like to release an update this weekend to address the ToP issue,
as well as a missing string in the translate[] hooks and to distribute
the new ALSA updates. I'm worried about the header detection changes
breaking some other games, though. So if you guys wouldn't mind
throwing a bunch of random games at it, I'd appreciate it.

It _should_ be fine, though. In theory, the LoROM / HiROM detection is
identical to the last release still, but I did restructure it, so you
never know ...

Oh, and I updated the website with new locales from Hatsuyuki, Itol,
khiav and wushu. Thanks, guys!

[No archive available]
2008-08-12 09:53:00 +00:00
byuu
df9de289b9 Update to bsnes v034r01 release.
New WIP (yes, already.)
Nothing that affects emulation, just a bunch of core changes I didn't
want to make last-minute before the release.

All of the APURAM / VRAM / OAM / CGRAM memory blocks have been moved
to the Memory class, and I've added operator[] bindings and such so
that I don't have to add .read(), .write() around everything. Required
several dozen individual changes, and I was afraid of introducing a
new bug. Everything looks good so far, anyway.

I also missed the translate[] call around "Paused", so it's not
possible to localize that in the new version. Oops.

> edit and thanks to Jonas Quinn for the $4810 register/Super Power
> League 4 fix.


Definitely, I wasn't going to release a new version this week because
of that bug.

Speaking of which, I just tried SPL4 on the Windows port. Holy hell,
that completely changed my opinion of OpenAL.

Seriously, those on Linux ... compare that game with OpenAL and ALSA.
With DirectSound / ALSA, the game actually has echo / reverb. It's
_completely_ missing with OpenAL. The woman announcer sounds like
she's speaking over a megaphone, but OpenAL makes her sound like she's
two feet away from you. Wild stuff.

And SDL video is going crazy on me now, it seems to be setting each
pixel's alpha value to some sort of inverse of chroma. Eg you can see
the background through the emulator window, and it's completely
transparent on full white / black screens. Really trippy looking.
Definitely be sure to set system.video to "glx" or "xv" if you use the
Linux port.

[No archive available]
2008-08-11 07:24:00 +00:00
byuu
dd83559786 Update to bsnes v034 release.
For this release: SPC7110 emulation speed has been greatly optimized, massive improvements to HDMA timing have been implemented, Multitap support was added, and the user interface was polished a bit more.
Changelog:
    - SPC7110 decompression code updated to latest version by neviksti and converted to a state machine; SPC7110 overhead is now identical to S-DD1 overhead (eg ~5% speed hit over standard games)
    - Fixed a major bug in SPC7110 data port emulation that was crashing Super Power League 4 [Jonas Quinn]
    - HDMA trigger point corrected to H=1104, bus sync timing corrected
    - All illegal DMA A-bus accesses should now be properly blocked
    - DMA state machine rewritten, greatly simplified
    - Major corrections to HDMA run timing; fixes flickering bugs in Mecarobot Golf and Super Mario Kart
    - Emulator now defaults to 2/1/3 SNES (CPU/PPU1/PPU2 revision numbers)
    - Multitap emulation added, can be attached to either or both controller ports; user interface updated to reflect this
    - Status messages (cartridge loaded / unloaded, UPS patch applied, etc) now appear in status bar
    - Added advanced configuration option, "input.analog_axis_resistance", to control gamepad analog stick sensitivity
Also, the SPC7110 emulator download link below was removed: if you are looking for this, please download the bsnes v034 source code, which has the most up-to-date version in the src/chip/spc7110 folder.
2008-08-11 11:33:54 +00:00
byuu
100ef3a271 Update to bsnes v033r09? release.
New WIP, probably not worth downloading.

For the sake of completeness, I finished optimizing the SPC7110 code.
I've converted the pixel buffer rotation from swaps to moves, which
should double the speed of the slowest part. I've also added reverse
morton lookup tables (2x8-bit and 4x-8-bit deinterleaving), which are
8-10x faster than doing it using pure bit logic, I removed the
redundant comparisons from the pixel context lookup (though a compiler
would've done the same anyway), and lastly I've cut the mode2 context
table in half, since the refcon add bit was only set on context 1
anyway. I could've replaced the other half with 5-6 if/else
statements, but I didn't see much of a point in that since it'd only
make the code harder to understand.

That results in a 1-2fps speedup, at best. Really, the code is simply
not a bottleneck. It's pointless to optimize anymore, as any changes
from this point on will just make it harder to understand what's
happening. I only added the morton tables because it does seem to aid
readability.

Also added translate[] wraps around all the new status messages, and
moved the two checkbox options on the paths window to the advanced
options list. No sense cluttering up the UI with near-useless
settings.

> It's hard going back to "Are you sure you'd like to exit?", no
> multiplier eyeball stretching, etc.


Heh, yeah. I never understood the floating point multiplier setups in
some emulators. I guess it's useful if you want your video output size
to be π x _e_.

I thought about the "Are you sure?" thing, it'd be nice if you
accidentally close the emulator, so you don't lose your save. But I
quickly realized that despite using emulators for ten years, I've
never _once_ actually done that. The only point where it might be
appropriate is if I add mouse / SS support, since you may want to have
the cursor near the top right of the window with the menubar off in
windowed mode (though you're just asking for trouble at that point,
honestly.)

To be fair though, you helped design at least half the bsnes GUI, so
obviously you should like it :P

> I should offer a bounty at this point to anyone who can find another
> bug that isn't PPU based.


Super Power League 4 seems to die after an inning or two with a S-SMP
crash. I still need to try screwing with the CPU/SMP scalars and try
substituting with anomie's DSP core to see if it still dies. If
neither of those affect it, it could very well be due to a timing
issue with not emulating the delays of the SPC7110 chip or something.
If someone wants to rule out the DSP core, they could try playing a
SPC dump from the game in one of the plugins that use blargg's core. I
doubt it's that, personally.

The usual rules about special chips apply, but you can list it as a
bug if you like. I probably will with a note. Maybe I can figure it
out before release. Probably not, but who knows.

Sigh, it's always the god damn baseball and golf games, isn't it? I'd
probably half-ass the game too, if it were my job to work on one.

> Two minor things that have probably been forgotten in all this
> excitement that could make the next release: libui is still not
> changed to "hiro" in the license, both online and text based. And
> mudlord wanted to be added to the contributors for his OpenGL stuff.


Ah, thanks. Updated the license file. Decided against listing all the
libraries there for now, as they're getting quite numerous.

As for credits, mudlord is already listed in the source file, and the
contributors list is for people who have submitted code to the core of
the emulator. It's not a good system, I admit. That obviously excludes
you and tetsuo55, despite the fact that your testing has been one of
the most helpful things I've received.

It's not that I mind listing people, but I don't want that window to
become cluttered with 100+ names of everyone up to and including
people pointing out spelling mistakes in WIPs. That would make the
window really onerous to look at.
I really don't want to come off as rude here, I'm really truly
grateful to everyone who has helped out even a little, and I'm happy
to thank them all in some perpetual fashion (eg website thank yous
tend to disappear as the news falls off the page.)

That's the second time someone's brought that list up. I was afraid
that adding such a list would just end up causing problems. Maybe I
should just remove the contributors list on the about screen, and put
everyone in the readme.txt file, so that everyone who ever contributed
anything is listed?

[No archive available]
2008-08-08 14:22:00 +00:00
byuu
bccc5b5a12 Update to bsnes v033r08? release.
I wish I could post the new WIP, I really need it tested. But it looks
like vstech.net (cinnamonpirate.com's host) got sucked into a black
hole, literally. You can't even nslookup it. So ... sorry.

What I did today was:
- remove an unnecessary ternary condition in HDMA CPUsync (no visible
effect on emulation or speed.)
- move controller ports from settings to system.
- rewrite SPC7110 decompression engine from scratch.

The last one obviously the most important. I took neviksti's most
recent decompressor code, made the essential variables static, added a
bool init parameter you can use to start a new decompression sequence,
and built up a dual-indexed (read+write cursor) ring buffer to stream
byte sequences. I set the buffer to >= 32 bytes at a time. I also
simplified a few parts, like the swap sequence for pixel ordering; and
I took out the end of each function that computes length, since that's
no longer needed (nor is bot.)

The result is you can stream an infinite number of bytes safely from
decompression, and nothing will ever go out of bounds of the data ROM.

Speed results on Core 2 Duo E6600 @ stock 2.4GHz:
FEoEZ cart riding sequence - 91fps (was 40fps)
MDH title screen - 111fps (was 29fps)
SPL4 title screen with players running across screen - 118fps (was
35fps)

For comparison, Star Ocean in-game gets ~95fps.

I didn't think we would need that many optimizations to get SPC7110
support running at full speed (how complex could a low-cost IC from
1995 be?), good to see I was right.

As soon as vstech comes back (hopefully tomorrow), I'll post the PD /
BSDL source, and get it sent over to GIGO. Hopefully he can add it to
SNESGT.

Speaking of which ... neviksti:
In your updated DecompMode0.c file, you declare NUM_CONTEXTS as 15,
but it should be 30. I'm guessing it runs fine in isolation (memory
initializes to zero and all that), but when mode 2 ran and set
contexts up to 32; only clearing 15 was resulting in corrupted
graphics all over. No big deal, just mentioning it.

> I don't really understand your (or byuu's) point. If the game does
> indeed works on 99.9% of units...on what do you base yourself to say
> their programming suck or that the game is "broken"? I mean, it
> works, it works right?


This is the problem I have with the black-and-white "bug" label ... it
implies a game is broken to a casual observer, or there is at least
noticeable corruption on at least one screen.

In truth, bsnes has a few visible bugs. Street Racer will flicker one
frame on the title screen, but only one time, and only once every ~4-8
runs. Adventures of Dr Franken and Winter Olympics show one black
scanline because the games update OBSEL at very unusual points mid-
frame.

And there are countless "anti-bugs", eg Battle Blaze on the fighter
select screen is supposed to show some garble up at the top due to
mid-scanline PPU writes. Because bsnes renders an entire scanline at
once, you don't see this. Lots and lots of games will have 1-16 pixels
on one scanline at the left (usually not even visible on TVs) that
flicker due to writing PPU regs past the end of hblank.

BoF2 German detects emulators by reading the division register early.
Since no emulator supports that, you don't see the anti-piracy splash
screen.

All of those could be considered bugs to varying degrees.

I suppose what would be nice is a bug severity ranking system.
"Severe" if it's game ruining, "Moderate" if it's more than one
scanline / frame that glitches graphics or something, and "Minor" for
the stuff 95% of people probably won't even notice. Or something like
that. My point is that it doesn't make a lot of sense to work on the
minor stuff. Most of that will probably go away with a cycle-based PPU
anyway, and the rest will probably continually appear and disappear
with infinitesimal timing changes.

[No archive available]
2008-08-07 13:39:00 +00:00
byuu
acee547da9 Update to bsnes v033r07? release.
And another one.

I've re-written the DMA state machine. I decided to keep it in one FSM
instead of two separate ones, because they honestly share so much. But
I rewrote it to be a lot cleaner, and to handle some really
exceptional edge cases. Due to the design, I was even able to make the
HDMA during DMA edge case "transparent", eg the same codepath is used
for normal HDMA and for HDMA during DMA :D

New WIP passes the last four tests in test_hdmatiming.smc. The ROM
posted doesn't validate the last four yet, so you have to compare the
SRAM file to the source logged values if you care to.

That should be everything with DMA and HDMA timing now, thankfully.
Really happy with that codepath for the very first time. Such an
improvement from the "don't even worry about HDMA syncing" code I had
a few versions ago.

I also reduced the DRAM refresh rotation from 7-lines of code testing
against the NTSC color burst case to 1-line, using the DMA counter
(dram_refresh_pos = 530 + 8 - dma_counter())

Lastly, I added a flush command to the status bar. Any important
messages will now flush all buffered ones to display the new one. Eg
load 10 games back-to-back and it'll say the name of the new game
immediately, instead of scrolling through the other 9. It will still
buffer lesser important ones, like unsupported chip and UPS patch
applied messages. I also removed config / locale path display, because
it annoyed me.

Nearing a release. I want to state machine neviksti's SPC7110
decompression code, and I should be ready on my end.

FitzRoy, I'll give you the final word. If you want controller port
selection moved to "System", I'll do so.

Any show stoppers should be mentioned now. I can't fix the "crash with
Unicode characters in the executable path" issue just yet, so that'll
have to wait.

[No archive available]
2008-08-05 11:58:00 +00:00
byuu
b1b146fd7d Update to bsnes v033r06? release.
New WIP. Adds some more HDMA timing improvements, DMA bus hold
simulation, and hopefully proper detection for ST011, which should
mean that every unsupported game will now notify you of that fact.

Also, I finally got around to writing that status bar message queue
system I mentioned a long time ago. Should make Deathlike happy. It'll
tell you whenever any UI event occurs (load, unload, reset, power
cycle, UPS patch applied, unsupported chip detected, config file /
locale file load, etc.)
Obviously if you turn off the status bar, you won't see them. Not a
problem for me personally: if you want to see status messages, leave
it on.

With that, I removed the annoyingly bland message window, and muted
the terminal message printing, putting it all inside the statusbar
instead.

I also got rid of some now-unused config variables, misc.status_text
(it was kind of overkill to let that be customizable) and
cpu.hdma_enable (it's always enabled now.)

Opinions on the new status bar system welcome.

I've also set the SNES to report itself as 2/1/3, rather than 1/1/1.
Since I don't emulate things like the HDMA conflict crash, I figured I
may as well set it to the CPU revision that doesn't have it.

> Probably the best it's ever been, but Street Racer's track does
> still flicker on "Head to Head" mode.


With the above changes, I was able to eliminate the flicker in-game in
all modes, as well as get rid of it ~80+% of the time on the title
screen. Only once every ~5 restarts will you see it for _maybe_ one
frame.

That's really the best I can do, I'm afraid. It's so subtle I doubt
anyone will even notice it now. Like Winter Olympics and Adventures of
Dr Franken, I'm not going to consider it an active bug (yes, how
convenient), but I'll watch the game closely with future timing
changes. Hopefully it'll go away entirely with more refinements in the
future.

[No archive available]
2008-08-04 06:35:00 +00:00
byuu
53e913e225 Update to bsnes v033r05? release.
New WIP.

After some more hardware testing, it seems my theory from before was
correct. See the HDMA thread for more info if you care.

With those changes plus a few others, I'm now able to get everything
in my "known troublesome" games list to work properly and with no
flickering:
- Breath of Fire 2 (G)
- Earthworm Jim 2 (U+E)
- Energy Breaker
- Jumbo Osaki no Hole in One
- Mecarobot Golf
- Secret of Mana
- Street Racer
- Super Mario Kart

I still can't get Street Racer to flicker, maybe you guys can?
Hopefully not, such a hard-to-trigger bug will be even harder to
debug.

Image
(ignore the framerate, from a pause/resume screen capture.)

And fucking _hell_ that game is hard.

Note that to get BoF2 (G) to work, I had to modify S-SMP cycle timing
from 32040hz*768 to 32041hz*768. It seems the game is very sensitive
to S-CPU <> S-SMP timing, and the improved HDMA timing was just
unlucky enough to just _barely_ miss the handshake. This was further
compounded by there being no input before the point in question to
vary timing.

It's not really a problem with the game itself -- d4s really pushed
the limits of these two chips to pull off that impressive intro. It
was more that I was hitting an extremely tiny window of time that
caused a deadlock.

This timing change only affects S-CPU <> S-SMP communications (eg
handshakes and such), and not timing inside each individual processor.
Recall that both processors in both regions (NTSC and PAL) have
slightly different timings, and the exact timings vary even on real
hardware, as the crystal clocks used are not perfect.

The NTSC S-SMP has been observed at ~32040hz on an oscilloscope by the
guy at alpha-ii.com, which is faster than the stock speed of ~32000hz.
But we still use stock speeds for the S-CPU because that's all we
have. Changing the S-CPU speed a bit would've fixed this as well.

So yeah, the fix is a bit of a kludge, but it's the best I can do when
the problem is in communication between the two chips.

Keep in mind that the S-SMP clock rates are cached in the config file.
You'll either need to delete it, or reset the values to the default in
the advanced panel. Otherwise the game will hang on first run.

Also, I tightened DMA transfer restrictions even more. A-bus accesses
to $4200-421f and $4016-4017 are now blocked. And I also block these
during HDMA line counter / indirect address fetches (as observed on
hardware.) Further, I was previously allowing invalid B->A transfers
to still write the the MMIO reg specified in A, but ignoring the B-bus
read. This seemed wrong: not being able to access the reg should mean
not being able to access it period, so I swapped that around.
Shouldn't affect any known games, but mentioning it just in case.

> Perfect timing matching isn't needed, the games are broken if they
> can't take a normal sized delay for this.


Mortal Kombat II breaks if you're exactly 6 cycles off from expected
timing (but works if you're more than six cycles off.) Jumbo Osaki was
failing by 20 cycles. Wild Guns fails if off by two cycles. A couple
other games were the same. There are roughly _21 million cycles_ in a
second.

Death Brade and some European racing game break if _uninitialized RAM_
doesn't return the values they like.

Uniracers is quite simply _beyond_ broken.

I wish I could get away with just saying the games themselves were
broken (and they are), but when it runs at least 99% of the time on
hardware, you can't use that as an excuse. Everyone will still call it
an emulation bug :(

> Err, not really. Fixed delay for all operations is as dumb as no
> delay for all operations.


I typically like the idea of emulating as much as we can ("building
blocks" and such), if that means guessing approximate delays, so much
the better. But for the DSP-1, adding any delays is even worse in my
opinion. Why?

First, the delay lengths will no doubt vary depending upon how complex
the transfer is. Second, emulating the delays would force us to
implement the DSP-1 as the dedicated processor that it is: thusly, its
overhead would soar from barely noticeable to nearly as intense as
SuperFX / SA-1 emulation. Third, it may be possible to read partially
computed results before the operations finish. We can't even figure
out the partial computations of mere _unsigned multiplication and
division_ in the S-CPU core, so how the hell would we ever plan to
figure out attitude / altitude calculations?

The only feasible way we're going to get this right is to dump the
program ROM and then emulate the instruction set. Even decapping the
DSP-1 has been no help for that, and even if by some miracle we got
the ROM, we'd have to figure out the instruction set and timing with
no documentation. And all of this to improve emulation of a couple of
lackluster action games. Good luck finding someone willing to do all
that for free, and just to end up getting ~90% of people bitching that
suddenly DSP-1 emulation is as demanding as SFX emulation, yet
provides no visible improvement over existing emulation. And it even
requires another DSP1program.rom file that they didn't need before!

Thus, it's really not worth the effort if our entire model of
emulating the chip is busted in such a manner that we couldn't improve
it more even if we wanted to anyway.

[No archive available]
2008-08-03 12:08:00 +00:00
byuu
0cf16ce784 Update to bsnes v033r04? release.
Posted a new WIP which can pass the test_hdmasync ROM I posted in the
other thread.

Please note that it's currently throwing off Jumbo Osaki exactly 50%
of the time. I'll look into it over the weekend. But the change I've
made is correct, so if I can't fix these, the games stay broken :/

One of the most unfortunate parts of emulation: when a game works
because two things are bad, but no longer when only one thing is bad.

[No archive available]
2008-08-01 13:11:00 +00:00
byuu
ce38d577ef Update to bsnes v033r03? release.
New WIP posted.

It adds my new findings on HDMA, which I've posted here:
http://board.zsnes.com/phpBB2/viewtopic.php?t=11804

This effectively fixes Mecarobot Golf once and for all. Interestingly
enough, it also eliminates the track line flickering in Super Mario
Kart.

Image
What a boring screenshot ...

I've tested for regressions with Battle Blaze, Battletoads,
Battletoads & DD, Breath of Fire 2 German, Circuit USA, Der
Langrisser, Energy Breaker, Earthworm Jim 2 (USA and EUR), F1 Grand-
Prix, FF: Mystic Quest, Mortal Kombat I & II, Jumbo Ozaki no Hole in
One, Secret of Mana and Street Racer. Basically, all the usual HDMA
suspects. Looks good to me.

Let me know if you guys find any new regressions, though.

[No archive available]
2008-07-29 06:24:00 +00:00
byuu
0a87b99370 Update to bsnes v033r02? release.
Alright, then. This was the new feature from the last WIP:

Image

Multitap support for Nach and tetsuo55 :)

New WIP up as well. This one adds Pogo's request, there's a new config
variable named input.analog_axis_resistance. The setting works both
for the DirectInput/Windows and SDL/Linux drivers.

It used to be 75% on Windows, 50% on Linux. Now it defaults to 50% on
both platforms. If any of you guys have an analog stick and want to
come up with a better default value, please feel free. I wasn't able
to pull off Ryu's spinning kick thing very easily at 75%, for
instance.

> The WIPs are private. Most of the people with access got it two
> years ago.


I used to give out access to anyone who found a new emulator bug in a
public release, but that's not working so well anymore ...

Eventually I'd like to get a system set up where anyone can get
access, yet avoid having the WIPs leak. I really don't want to bother
emu news site readers with daily WIP updates that change ~3kb of code.

[No archive available]
2008-07-28 09:56:00 +00:00
byuu
82d5761705 Update to bsnes v033r01? release.
Alright, new WIP. Added a new feature so people will stop _harassing_
me about it :P

Try and guess what it is.

[No archive available]
2008-07-27 14:44:00 +00:00
byuu
9133129209 Update to bsnes v033 release.
This release adds SPC7110 emulation, without the need for graphics packs!!, and a rewritten S-RTC (real-time clock) emulator.
SPC7110 support means that Far East of Eden Zero, FEoEZ: Shounen Jump Edition, Momotarou Dentetsu Happy and Super Power League 4 are now all fully playable. I will warn you, the emulation is very slow in this version -- while most areas of each game will run at the same speed as other games, there are a few peak moments where speed will drop by up to ~50%. The reason for the slow-down is that I am currently uncertain how to determine the amount of data to decompress in advance, so I default to the maximum amount possible. The reason I am releasing now anyway, is because I beleive in the "release early, release often" paradigm. It will likely take me a few weeks to finish researching this chip, and I didn't want to keep the work I had private during that time. But rest assured, bsnes v034 should feature much faster SPC7110 emulation.
neviksti, Andreas Naive and jolly_codger worked non-stop on the SPC7110 decompression algorithm for the past two weeks. caitsith2 provided valuable data to the effort. I only wish that I could've been of some use, but alas, I had no role in this. In the end, it was neviksti who managed to crack all three(!!) compression modes of this chip, which turned out to be a customized 8-bit QM-coder with a prediction model. You can read more about this here. I would also like to thank Dark Force and John Weidman (aka The Dumper) for their research notes on the SPC7110 register interface.
For those who don't understand the hoopla about figuring out this compression algorithm when we already had graphics pack simulation, I should note that we have since found a few errors in these packs. Not to mention, you no longer need ~4-16MB packs for each game you wish to run. They work like any other game now. Better still, the chip can now be used to compress new graphics, eg for any future translation efforts on these titles.
The real-time clocks in both Far East of Eden Zero and Dai Kaijuu Monogatari 2 will now save a ".rtc" file in your save folder, which contains the clock as set by the video game, as well as a timestamp from your computer when the time was last updated. It uses the difference between the saved timestamp and current time to update the time. This allows you to specify any time you like, whereas previously bsnes would just use your computer's current time, ignoring the time you set in-game. It also allows the "round clock by 30 seconds" option in both games to work. I avoided this before because this method makes supporting daylight savings time and such impractical, although I should note that the original hardware did not support DST, either. This method was required to pass the SPC7110 tests, and is overall much more faithful to how the original chips worked.
Once again, I'd really like to personally thank neviksti for his tireless efforts. Eliminating graphics packs from SNES emulation was one of my primary reasons for getting involved in the SNES emulation scene. That neviksti managed to crack this algorithm means a lot to me. Thank you so much, neviksti. This release is dedicated to you, now go get some sleep Wink
2008-07-20 00:06:28 +00:00
byuu
7d83cde40a Update to bsnes v032r01? release.
This worked great, thank you. libao is now tolerable on ALSA. Now I
just need to add support for disabling "Audio::Synchronize" (by
disabling sound output, since libao is a blocking API.)

---

EDIT: posted a new WIP, with RedDwarf's ALSA and libao fixes. Both
work very well for me, your mileage may vary.

No Windows binary, as it would be exactly the same as v032a, anyway.
This one's mainly for Linux users who can compile from source.

[No archive available]
2008-06-02 02:00:00 +00:00
byuu
bbc77a6cf2 Update to bsnes v032a release.
- Windows: file open filters are now working once again
    - All ports: emulation speed setting is now properly restored at startup
2008-05-26 08:46:05 +00:00
byuu
ebb9367c68 Update to bsnes v032 release.
- Core: simplified CPU / SMP flag calculations
    - Added ALSA audio output driver to Linux port [Nach]
    - Improved font handling for Windows and Linux ports
    - Greatly cleaned up the user interface
    - Windows port now uses Unicode instead of ANSI
    - Added localization support
    - Config and locale files can now be placed inside bsnes executable directory for single-user mode, if desired
    - Fixed crashing bug with HQ2x on Linux/amd64 port [RedDwarf, Nach]
    - Hid "Power Cycle" option by default, as it is too similar to "Reset"
    - Slighty tweaked program icon [FitzRoy]
    - Minor code cleanups -- replaced union bitfields with templates, improved memory allocation, etc
2008-05-25 18:45:59 +00:00
byuu
96fe8f760d Update to bsnes v031r08? release.
Thank you everyone for the translations! I've also posted a new WIP,
with an improved Japanese locale. No changes to the strings that
anyone has to worry about with theirs.

To strike a compromise, I've removed power cycle from the menu by
default, and added a new config file option, "advanced.enable". Set to
false initially, but if you set it to true and restart, power cycle
will re-appear. I intend to use this option to hide the debugger
functionality if and when that gets re-added, as well. Plus we can
remove other questionably useful / confusing stuff this way. The key
binding for it still shows up (removing it there would be tricky), but
it's not bound to anything by default, either. Sound fair?

Also, something I've been meaning to do for a while now ...
unload/reset/power cycle are now disabled when a cartridge is not
loaded.

[No archive available]
2008-05-22 09:18:00 +00:00
byuu
8abd1b2dfe Update to bsnes v031r07? release.
Okay, new WIP. Couple of changes.

One, I was displaying the warning message about unsupported chips no
matter what. Oops, fixed.

Two, removed the "Select Folder" text. The dialog looks a bit empty
now, but oh well.

Three, added "Ok" to the warning message box strings.

Four, added "Enabled" to the cheat editor strings. You'll notice that
"Disabled" is not there -- it's shared by the speed regulation
setting. I know, sharing strings sucks, but that's pretty much how the
localization system works, sorry. You can use something simple like
"On" / "Off" in place of "Enabled" / "Disabled", if necessary.

Also updated the locale.cfg file for everyone:
http://byuu.cinnamonpirate.com/temp/locale.cfg

[No archive available]
2008-05-20 07:02:00 +00:00
byuu
f6efcbe6fd Update to bsnes v031r06? release.
Okay, I've posted a new WIP, which has a completed locale.cfg file.
Well, it's completed for v032, at least. All translations are going to
have to be updated for every release, sadly.

For those interested in translating it, I'm looking to only have
native speakers perform translations. I don't care if things aren't a
perfect literal translation, so long as the general idea gets across.
But I don't want anyone using machine translation tools, either.
They're very unprofessional, better to wait until someone fluent comes
along. Yes, I know that's ironic given my translation to Japanese:
hoping someone will re-do that one.

The reference locale file is here:
http://byuu.cinnamonpirate.com/temp/locale.cfg

Format is obviously UTF-8. Yours will need to be in this format as
well. Any local encodings will fail miserably.

You can see most of the options in bsnes v031 to see where they come
into play. I have them mostly sorted per window. Some windows share
the same string. I doubt that's going to be a problem, but we'll see.

If you have access to the WIPs, be sure to get the latest one to test
with. If not, and you're willing to translate the UI, feel free to PM
me and I'll happily send you a link to it.

I've added a "Localization by:" field to the about screen. Please feel
free to add your name there.

Next up, I'm trying something a bit different for the config files,
and I've updated readme.txt to reflect this:

bsnes will now check in the same folder as the executable for
bsnes.cfg and locale.cfg. If they're found, bsnes will use these
files. If they are not found, it will use your user profile folder for
storage.

So, if you want bsnes to run in single-user mode, just make sure
bsnes.cfg and/or locale.cfg exist. If not, you can create a blank file
and bsnes will use that next time you run it. If you want multi-user
mode, delete the files. If you want multiple profiles, use single-user
mode and multiple copies of the executable.

I'll be distributing future Windows binaries with blank bsnes.cfg and
locale.cfg files, so that single-user mode is the default. Just delete
them to switch to the old method if you prefer. Hopefully this pleases
everyone.

[No archive available]
2008-05-19 08:48:00 +00:00
byuu
36859ea52c Update to bsnes v031r05? release.
Well, that was certainly a pain in the ass ...

Image

Had to port hiro to full-on Unicode / UTF-16. But the GUI API still
takes UTF-8, it's all converted internally now, bidirectionally.

Oh, and don't make fun of my Japanese :P

---

As for the new WIP, I've included my example locale.cfg. No other
lines will translate, so don't try yet. You need to put it in the
.bsnes folder next to bsnes.cfg. And don't try it unless you have
Japanese fonts, obviously.

[No archive available]
2008-05-15 07:51:00 +00:00
byuu
64589148d4 Update to bsnes v031r04? release.
New WIP.

This one adds DPI-independent font sizing for both Windows and Linux.
With that, I've reduced the font size back down to "Tahoma 8" on
Windows, and "Sans 8" on Linux.

Because of that, I was able to reduce textbox and button height from
30 to 25, and label, checkbox and radiobox height from 20 to 18. In
other words, the UI looks like it did back with v019.

There's only one tiny flaw with the Linux port, I'm unable to change
the font face for the listbox column header. It's not actually a
widget, so it ignores my gtk_container_foreach ->
gtk_widget_modify_font() calls. Any help would be greatly appreciated.

I've also added FitzRoy's new icon. It seems to only have 32-bit
icons, and no 256-color icons ... I guess we'll see how that looks on
Win2k soon enough.

Lastly, statusbar toggle was broken in the last WIP, that's fixed now.

[No archive available]
2008-05-12 05:26:00 +00:00
byuu
89ae1101ee Update to bsnes v031r03? release.
Another WIP. This one changes the GUI toolkit to not invoke callbacks
when the API is used to set the state of widgets. With that it was
really easy to get the speedreg / frameskip checks to update when
using the keyboard controls.

What I really need for this WIP is testing to see if any UI elements
are now broken as a result of the change. For example, try and get a
checkbox to not represent the actual state of something. Eg a
frameskip of 2 but the checkbox is on 0. Also check startup states and
that sort of thing.

The UI code really needs to be cleaned up at this point ...

[No archive available]
2008-05-07 06:30:00 +00:00
byuu
340d86845a Update to bsnes v031r02? release.
New WIP. Please be sure to test a few games with this one to look for
regressions.

I got tired of using bit packing for CPU / SMP register flags, because
they do not mask the upper bits properly.

In other words, (assume big endian) if you have struct { uint8_t n:1,
v:1, m:1, x:1, d:1, i:1, z:1, c:1; } p; and you set p.m = 7; it will
set p.v and p.n as well. It doesn't cast the type to bool.

So I rewrote the old template struct trick, but bound it with a
reference rather than relying upon union alignment. Looks something
like this:

    template<int mask>
    struct CPUFlag {
      uint8 &data;

      inline operator bool() const { return data & mask; }
      inline CPUFlag& operator=(bool i) { data = (data & ~mask) | (-i
    & mask); return *this; }

      CPUFlag(uint8 &data_) : data(data_) {}
    };

    class CPURegFlags {

    public:
      uint8 data;
      CPUFlag<0x80> n;
      CPUFlag<0x40> v;
    ...
      CPURegFlags() : data(0), n(data), v(data), m(data), x(data),
    d(data), i(data), z(data), c(data) {}

    };


Surprisingly, benchmarks show this method is ~2x faster, but flags
were never a bottleneck so it won't affect bsnes' speed.

Anyway, with this, I decided to get rid of the confusing and stupid
!!() stuff all throughout the CMP and SMP opfn.cpp files. It's no
longer needed since the template assignment takes only a boolean
argument. Anything not zero becomes one with that.

So code such as this:

    uint8 sSMP::op_adc(uint8 x, uint8 y) {
    int16 r = x + y + regs.p.c;
      regs.p.n = !!(r & 0x80);
      regs.p.v = !!(~(x ^ y) & (y ^ (uint8)r) & 0x80);
      regs.p.h = !!((x ^ y ^ (uint8)r) & 0x10);
      regs.p.z = ((uint8)r == 0);
      regs.p.c = (r > 0xff);
      return r;
    }


Now looks like this:

    uint8 sSMP::op_adc(uint8 x, uint8 y) {
      int r = x + y + regs.p.c;
      regs.p.n = r & 0x80;
      regs.p.v = ~(x ^ y) & (x ^ r) & 0x80;
      regs.p.h = (x ^ y ^ r) & 0x10;
      regs.p.z = (uint8)r == 0;
      regs.p.c = r > 0xff;
      return r;
    }


I also took the time to figure out how the hell the overflow stuff
worked. Pretty neat stuff.

Essentially, overflow is set when you add/subtract two positive or two
negative numbers, and the result ends up with a different sign. Hence,
the sign overflowed, so your negative number is now positive, or vice
versa.

A simple way to simulate it is:
int result = (int8_t)x + (int8_t)y;
bool overflow = (result < -128 || result > 127);

But there's no reason to perform signed math, since the result can't
be used for anything else, not even any other flags, as the opcode
math is always unsigned.

So to implement it with this:
int result = (uint8_t)x + (uint8_t)y;

We just verify that both signs in x and y are the same, and that their
sign is different from the result to set overflow, eg:
bool overflow = (x & 0x80) == (y & 0x80) && (x & 0x80) != (result &
0x80);

But that's kind of slow. We can test a single bit for equality and
merge the &0x80's by using a XOR table:
0^0=0, 0^1=1, 1^0=1, 1^1=0
The trick here is that if the two bits are equal, we get 0, if they
are not equal, we get one.

So if we want to see if x&0x80 == y&0x80, we can do:
!((x ^ y) & 0x80);

... or we can simply invert the XOR result so that 1 = equal, 0 =
different, eg ~(x ^ y) & 0x80;

The latter is nice because it keeps the bit positions in-tact. Whereas
the former reduces to 1 or 0, the latter remains 0x80 or 0x00. This is
good for chaining, as I'll demonstrate below.

Do the same for the second test and we get:
bool overflow = ~(x ^ y) & 0x80 && (x ^ result) & 0x80;

We complement the former because we want to verify they are the same,
we don't for the latter because we want to verify that they have
changed.

Now we can basically use one more trick to combine the two bit masks
here. We want to return 1 when overflow is set, so we can look for a
pattern that will only return one when both the first and second tests
pass.

An AND table works great here. 0&0=0, 0&1=0, 1&0=0, 1&1=1. Only if
both are true do we end up with 1.

So this means we can AND the two results, and then mask the only bit
we care about once to get the result, eg:
bool overflow = ~(x ^ y) & (x ^ result) & 0x80;

And there we go, that's where that bizarre math trick comes from. I
realized while doing this something that bugged me in the past.

I used to think that for some reason, the S-SMP add overflow test
required x^y & y^r, whereas S-CPU add overflow used x^y & x^r.
Probably because I read the algorithm from Snes9x's sources or
something.

But that was flawed -- since addition is commutative, it doesn't
matter whether the latter is x^result or y^result. Only in subtraction
does the order matter, where you must always use x^result to test the
initial value every time.

Subtraction switches up things a little. It sets overflow only when
the signs of x and y are _different_, and when x and the result are
also different, eg:
bool overflow = (x ^ y) & (x ^ result) & 0x80;

Fun stuff, huh?

So I was wanting this tested thoroughly, just in case there was a typo
or something when updating the opfn.cpp files.

---

That said, I also polished up the UI a bit. Moved disabled to the
bottom of the speed regulation list, and added key / joypad bindings
for "exit emulator", "speed regulation increase / decrease" and
"frameskip increase / decrease".

I know these key bindings do not update the menubar radiobox positions
yet. I'll get that taken care of shortly.

[No archive available]
2008-04-19 12:03:00 +00:00
byuu
b895f29bed Update to bsnes v031r01? release.
New WIP posted.

Not much to this one.

- added FitzRoy's updated program icon
- removed safe_free / safe_delete / safe_release template functions
- replaced nearly all malloc / free calls with new / delete[]

And lastly ... long ago, I used "File / Edit / Help" to conform to
standard UI design. I quickly replaced Edit with Settings, and later
Help with Misc. Lately, the last one has been bugging me ... "File"?
File what? Why is there a reset system option under file?

So, it may be somewhat controversial, but I renamed File to System,
and dropped the now superfluous " System" from Reset / Power Cycle.

I'd honestly like to remove "Exit" from that menu as well, but I know
I'd be pushing it then.

What I want to do next is move "Disabled" in speed regulation to the
bottom of the list, and add key bindings to increase / decrease speed
regulation. I'd like the step after fastest to be disabled. It makes
sense, as fastest can never be faster than disabled, but disabled can
be faster than fastest.

Other nice ideas would be: a cartridge info option under the system
menu somewhere, frameskip +/- key bindings, an exit emulator key
binding, a new GUI panel with options to warn on reset / unload /
exit, and cleaning up of the event namespace for the UI. Specifically,
start working on a more advanced status panel that can display five-
second alerts that override the normal output.

[No archive available]
2008-04-16 12:59:00 +00:00
byuu
1ef279cb83 Update to bsnes v031 release.
New release posted. Perhaps the most important change was fixing a bug in the Windows port when the keyboard was used for input. For some reason, the IsDialogMessage() function I use for tab key support was causing the main window to emit the Windows error beep every time a key was pressed after a few minutes of use. I do not know why this is, so I have simply disabled the tab key support to prevent this from happening.
Other than that, lots of polishing went into this release. UPS soft-patching will work with the recently released Der Langrisser v1.02 translation, for those curious. You can also store the UPS patches in GZ/ZIP/JMA support, and bsnes will detect this and decompress the patches first. Use the same ".ups" file extension for this, as it detects via file header.
If you wish to try out the newly added OpenGL support: start bsnes, go to Settings->Configuration->Advanced and set system.video to "wgl" (or "glx" for Linux users), and then restart the emulator. Please bear in mind that ATI's OpenGL drivers are an industry-wide joke, so I'd only recommend trying this on an nVidia or Intel video card.
Changelog:
    - Fixed bug and re-enabled HDMA bus sync delays
    - Emulated newly discovered IRQ timing edge case
    - Optimized offset-per-tile rendering
    - Added state-machine implementation of S-DSP core, ~5% speedup
    - Added SPC7110 detection, will now warn that this chip is unsupported
    - Fixed very annoying Windows port OS beeping noise when using keyboard for input
    - Linux port will now save most recent folder when no default ROM path is selected
    - Added OpenGL rendering support to Windows port [krom]
    - Fixed Direct3D pixel mode scaling bug [krom, sinamas, VG]
    - Improved SNES controller graphic [FitzRoy]
    - Added UPS (not IPS) soft-patching support; UPS patch must be made against unheadered ROM
    - As always, cleaned up source code a bit
2008-04-13 23:40:08 +00:00
byuu
0241dd78b7 Update to bsnes v030r08? release.
New WIP posted, which adds the immediate-mode opcode IRQ delay
findings from this past week. Doesn't have any visible effects on
anything. I also went back to a switch table for the CPU / SMP opcodes
instead of the jump table. Shaves ~100kb off the object files and
compiles faster with no speed loss. I used the jump table before to
simplify PGO, but since that's been broken for at least a year now
anyway ...

Fes, thanks for the temporary workaround. I'll try and get a new
release out this weekend if possible. I'd like to have UPS soft-
patching in before the next release, though, hence the delay.

[No archive available]
2008-04-10 11:05:00 +00:00
byuu
a13c3aece6 Update to bsnes v030r07? release.
New WIP.

Direct3D driver: removed diffuse color vertex information, and made
driver re-initialize whenever window size changes. Should fix ATI
resize in pixel scale mode bug once and for all. Confirmation would be
appreciated. Speed will still be bad on some cards that can't handle
large textures, and I don't really want to implement StretchRect()
profiling, so that's still an issue.

Windows/hiro: disabled IsDialogMessage(). This will prevent the tab
key from working in the configuration panel, but will also stop the
main window from beeping every time you push a key -- the lesser of
two evils. Blame Microsoft for this bullshit. IsDialogMessage() should
empty the key buffer, but it doesn't when there are no tabbed controls
on a window. I'll rig something up in the future for this.

Linux/hiro: GTK+ file open / file save / folder select dialogs will
now save the path if you selected a valid file, so that next time you
will start in that folder. This didn't matter if you set hard-coded
paths in bsnes, but it makes a positive difference if you did not.

[No archive available]
2008-04-07 03:34:00 +00:00
byuu
20977817ae Update to bsnes v030r06? release.
New WIP up.

This one fixes HDMA bus sync timing. I verified this was correct per
hardware with the HDMA test sync ROM. It was definitely wrong before.

Secret of Mana, Street Racer and Jumbo Ozaki no Hole in One all work.
Yes, they worked in the official v030 release, but that release had
HDMA sync disabled and rounded.

Mecarobot is improved greatly, but still flickers when the golf course
is moving. If you're as desperate as I am to play this amazing
masterpiece _right now_, you can always hex edit the ROM and change
offset 0x1c6f from 0x40 to 0x80 :)

I'm still investigating that issue more before I start running
hardware tests. I want to rule out things that can't be the cause of
the bug first.

I've also added (hopefully) proper SPC7110 detection. If anyone wants
to test all of them to make sure it works, great. It should give you a
popup now saying that it's unsupported. Down to just needing ST-011
detection now.

[No archive available]
2008-04-03 11:50:00 +00:00
byuu
ba25c82939 Update to bsnes v030r05? release.
New WIP posted, which adds:
- krom's Direct3D fix; point mode at multiples of 3x and higher
without aspect ratio correction is no longer blurry
- FitzRoy's updated SNES controller graphic
- glX improvement for Linux, window will clear to black on startup for
ATI cards now too, but it still doesn't redraw when the window is
damaged because I can't trap the exposure events
- tiny clarification to S-DSP emulator source (use echo_hist_pos enum
instead of just "8")
- started to add SPC7110 _detection_ for the sole purpose of advising
that the chip isn't supported. Not finished yet. Also need to fix
ST-011 detection while I'm at it (it's detected as ST-010 now; they
share ROM type and mapper IDs), and all special chip games should be
covered.
- re-added the slightly incorrect HDMA sync timing. It helps (but
doesn't fix) Mecarobot, it breaks the SoM intro again; but Street
Racer and Jumbo Ozaki are still working right -- looks like other
timing improvements since then were enough for those titles

For those asking for WIP access, I'm really sorry but I have way too
many testers now. It's extremely hard for me to even keep track
anymore. I just don't have the bandwidth.

If you absolutely need a specific WIP, I'll stick it on a file sharing
site or something for you. Otherwise, my apologies for not sending you
the link. I absolutely do appreciate the offers to help beta test,
though.

[No archive available]
2008-04-02 05:41:00 +00:00
byuu
3babe932fd Update to bsnes v030r04? release.
One thing we can always do is add some platform-specific profiling
code. Have bsnes try and determine what the fastest driver is upon
first run. As if I don't have enough to do already, heh.

New WIP, which converts the S-DSP ring buffers to an internal class
object. Surprisingly, it actually does make the code a bit nicer to
look at, although it's kind of unfortunate I can't hijack operator[]=,
heh. I'd be forced to use modulus for that.

Even more surprising, it's about ~2% faster than before. Even though
it's technically even more complex now with three writes instead of
two. Makes no sense at all, but I won't complain. Getting 122fps now
on Zelda 3 load screen.

---

ATI Radeon X300LS:
Direct3D = 64fps
OpenGL = 24(!!)fps

... as if we needed _another_ reason not to buy ATI products. What the
hell was AMD thinking, buying them?
Better yet, why do people buy ATI products? Laptops, I can understand.
But for desktops?? Seriously. That performance is so terrible, you
couldn't even play OpenGL games with that. We really need more OGL
titles to rape ATI on benchmark tests, so that they'll get their heads
out of their asses.

[No archive available]
2008-03-26 08:58:00 +00:00
byuu
6bdeaef0f4 Update to bsnes v030r03 release.
v030 wip3 posted.

This one add's krom's ruby changes, meaning Windows OpenGL support.

For consistency, I changed the Windows system.video setting to "wgl",
and Linux OpenGL to "glx". Linux users should be sure to update that
to avoid SDL video output.

I get ~119fps with OpenGL, and ~120fps with Direct3D. I'd appreciate
if everyone else would test OpenGL support. If it works everywhere
that D3D works, and avoids that texture size slowdown issue, then we
should make it the default driver.

The only issue I see with the driver now is that vsync is enabled no
matter what. You can turn it off in eg the nVidia control panel by
overriding the setting. I also recommend enabling triple buffering.
With that, video is perfectly smooth and audio is ~99.5% perfect. So,
so close. A slight cpu.freq change and you can probably get it
perfect.

God, it's so nice having perfect video and audio. I really wish that
worked across the board. It's absolute euphoria playing games like
that.

[No archive available]
2008-03-26 07:10:00 +00:00
263 changed files with 10770 additions and 7109 deletions

View File

@@ -53,21 +53,19 @@ information in the header. The lack of such a header indicates said file falls
under the bsnes license.
HQ2x filter, author: MaxST, license: LGPL
JMA decompressor, author: NSRT Team, license: GPL (*)
JMA decompressor, author: NSRT Team, license: GPL*
NTSC filter, author: blargg, license: LGPL
zlib decompressor, license: zlib license
(*) bsnes has received an exemption from the copyright holder to use this work.
(* bsnes has received an exemption from the copyright holder to use this work.)
The software also includes works which have been released to the public domain,
which are not bound to any licensing agreements. Below is a complete list of all
such software.
libco, author: byuu
libui, author: byuu
OBC-1 emu, author: byuu
S-DD1 emu, author: Andreas Naive
S-RTC emu, author: byuu
S-DD1 decompressor, author: Andreas Naive
SPC7110 decompressor, author: neviksti
Any software listed above as exemptions may be relicensed individually from
bsnes under their respective terms. However, no bsnes licensed portions can be

View File

@@ -1,10 +1,11 @@
bsnes
Version: 0.030
Version: 0.035
Author: byuu
--------
========
General:
--------
========
bsnes is a Super Nintendo / Super Famicom emulator that began on
October 14th, 2004.
@@ -13,11 +14,37 @@ http://byuu.org/
Please see license.txt for important licensing information.
------------------
==============
Configuration:
==============
bsnes has two configuration files: bsnes.cfg, for program settings; and
locale.cfg, for localization.
For each file, bsnes will start by looking inside the same folder where the
bsnes executable is located. If said file is not found, it will then check your
user profile folder. On Windows, this is located at "%APPDATA%/.bsnes". On all
other operating systems, this is located at "~/.bsnes". If said file is still
not found, it will automatically be created in your user profile folder.
If you wish to use bsnes in single-user mode, be sure that both files exist
inside the same folder as the bsnes executable. If they do not, you can simply
create new blank files and bsnes will use them in the future.
If you wish to use bsnes in multi-user mode, simply delete these two files from
the bsnes executable directory if they exist.
If you wish to have multiple configuration profiles for the same user, you will
need to make copies of the bsnes executable, and use each one in single-user
mode.
==================
Known Limitations:
------------------
==================
S-CPU
- Multiply / Divide register delays not implemented
- Multiply / divide register delays not implemented
- "Glitch" when reading joypad registers during auto polling not implemented
S-PPU
- Uses scanline-based renderer. This is very inaccurate, but few (if any)
@@ -33,9 +60,10 @@ Hardware Bugs
- S-CPU.r1 HDMA crashing bug not emulated
- S-CPU<>S-SMP communication bus conflicts not emulated
---------------------
=====================
Unsupported Hardware:
---------------------
=====================
SA-1
Coprocessor used in many popular games, including:
- Dragon Ball Z Hyper Dimension
@@ -52,26 +80,27 @@ Coprocessor used in many popular games, including:
- Star Fox 2 (unreleased beta)
- Super Mario World 2: Yoshi's Island
SPC7110
Coprocessor used only by the following games:
- Far East of Eden Zero
- Far East of Eden Zero: Shounen Jump no Shou
- Momotarou Densetsu Happy
- Super Power League 4
ST-011
SETA DSP used only by Quick-move Shogi Match with Nidan Rank-holder Morita
SETA DSP used by Quick-move Shogi Match with Nidan Rank-holder Morita
ST-018
SETA RISC CPU used only by Quick-move Shogi Match with Nidan Rank-holder Morita 2
SETA RISC CPU used by Quick-move Shogi Match with Nidan Rank-holder Morita 2
Super Gameboy
Cartridge passthrough used for playing Gameboy games
------------------------
========================
Unsupported Controllers:
------------------------
========================
Mouse
Super Scope
Justifier
Multitap (4-port and 5-port)
=============
Contributors:
=============
Andreas Naive, anomie, blargg, DMV27, FitzRoy, GIGO, Jonas Quinn, kode54, krom,
mudlord, Nach, neviksti, Overload, RedDwarf, Richard Bannister, tetsuo55, TRAC,
zones

View File

@@ -11,7 +11,7 @@ ifneq ($(findstring gcc,$(compiler)),) # GCC family
cpp = $(subst cc,++,$(compiler)) $(flags)
obj = o
rule = -c $< -o $@
link =
link = -s
mkbin = -o$1
mkdef = -D$1
mklib = -l$1
@@ -34,12 +34,12 @@ endif
##########
ifeq ($(platform),x) # X11
ruby = video.glx video.xv video.sdl audio.openal audio.oss audio.ao input.sdl input.x
ruby = video.glx video.xv video.sdl audio.openal audio.oss audio.alsa audio.ao input.sdl input.x
link += `pkg-config --libs gtk+-2.0`
link += $(call mklib,Xtst)
delete = rm -f $1
else ifeq ($(platform),win) # Windows
ruby = video.direct3d video.directdraw video.gdi audio.directsound input.directinput
ruby = video.direct3d video.wgl video.directdraw video.gdi audio.directsound input.directinput
link += $(if $(findstring mingw,$(compiler)),-mwindows)
link += $(call mklib,uuid)
link += $(call mklib,kernel32)
@@ -64,7 +64,9 @@ rubyflags += $(if $(findstring .sdl,$(ruby)),`sdl-config --cflags`)
link += $(if $(findstring video.direct3d,$(ruby)),$(call mklib,d3d9))
link += $(if $(findstring video.directdraw,$(ruby)),$(call mklib,ddraw))
link += $(if $(findstring video.glx,$(ruby)),$(call mklib,GL))
link += $(if $(findstring video.wgl,$(ruby)),$(call mklib,opengl32))
link += $(if $(findstring video.xv,$(ruby)),$(call mklib,Xv))
link += $(if $(findstring audio.alsa,$(ruby)),$(call mklib,asound))
link += $(if $(findstring audio.ao,$(ruby)),$(call mklib,ao))
link += $(if $(findstring audio.directsound,$(ruby)),$(call mklib,dsound))
link += $(if $(findstring audio.openal,$(ruby)),$(if $(call streq,$(platform),x),$(call mklib,openal),$(call mklib,openal32)))
@@ -77,7 +79,7 @@ link += $(if $(findstring input.sdl,$(ruby)),`sdl-config --libs`)
objects = main libco hiro ruby libfilter string reader cart cheat \
memory smemory cpu scpu smp ssmp sdsp ppu bppu snes \
bsx srtc sdd1 cx4 dsp1 dsp2 dsp3 dsp4 obc1 st010
bsx srtc sdd1 spc7110 cx4 dsp1 dsp2 dsp3 dsp4 obc1 st010
ifeq ($(enable_gzip),true)
objects += adler32 compress crc32 deflate gzio inffast inflate inftrees ioapi trees unzip zip zutil
@@ -131,7 +133,7 @@ obj/bsnesrc.$(obj): ui/bsnes.rc; windres ui/bsnes.rc obj/bsnesrc.$(obj)
### libraries ###
#################
obj/ruby.$(obj): lib/ruby/ruby.cpp lib/ruby/*
obj/ruby.$(obj): lib/ruby/ruby.cpp lib/ruby/* lib/ruby/video/* lib/ruby/audio/* lib/ruby/input/*
$(call compile,$(rubydef) $(rubyflags))
obj/hiro.$(obj): lib/hiro/hiro.cpp lib/hiro/* lib/hiro/gtk/* lib/hiro/win/*
$(call compile,$(if $(call streq,$(platform),x),`pkg-config --cflags gtk+-2.0`))
@@ -194,16 +196,17 @@ obj/snes.$(obj): snes/snes.cpp snes/* snes/scheduler/* snes/video/* snes/audio/*
### special chips ###
#####################
obj/bsx.$(obj) : chip/bsx/bsx.cpp chip/bsx/*
obj/srtc.$(obj) : chip/srtc/srtc.cpp chip/srtc/*
obj/sdd1.$(obj) : chip/sdd1/sdd1.cpp chip/sdd1/*
obj/cx4.$(obj) : chip/cx4/cx4.cpp chip/cx4/*
obj/dsp1.$(obj) : chip/dsp1/dsp1.cpp chip/dsp1/*
obj/dsp2.$(obj) : chip/dsp2/dsp2.cpp chip/dsp2/*
obj/dsp3.$(obj) : chip/dsp3/dsp3.cpp chip/dsp3/*
obj/dsp4.$(obj) : chip/dsp4/dsp4.cpp chip/dsp4/*
obj/obc1.$(obj) : chip/obc1/obc1.cpp chip/obc1/*
obj/st010.$(obj): chip/st010/st010.cpp chip/st010/*
obj/bsx.$(obj) : chip/bsx/bsx.cpp chip/bsx/*
obj/srtc.$(obj) : chip/srtc/srtc.cpp chip/srtc/*
obj/sdd1.$(obj) : chip/sdd1/sdd1.cpp chip/sdd1/*
obj/spc7110.$(obj): chip/spc7110/spc7110.cpp chip/spc7110/*
obj/cx4.$(obj) : chip/cx4/cx4.cpp chip/cx4/*
obj/dsp1.$(obj) : chip/dsp1/dsp1.cpp chip/dsp1/*
obj/dsp2.$(obj) : chip/dsp2/dsp2.cpp chip/dsp2/*
obj/dsp3.$(obj) : chip/dsp3/dsp3.cpp chip/dsp3/*
obj/dsp4.$(obj) : chip/dsp4/dsp4.cpp chip/dsp4/*
obj/obc1.$(obj) : chip/obc1/obc1.cpp chip/obc1/*
obj/st010.$(obj) : chip/st010/st010.cpp chip/st010/*
############
### zlib ###

View File

@@ -1,4 +1,4 @@
#define BSNES_VERSION "0.030"
#define BSNES_VERSION "0.035"
#define BSNES_TITLE "bsnes v" BSNES_VERSION
#define BUSCORE sBus
@@ -7,12 +7,16 @@
#define DSPCORE sDSP
#define PPUCORE bPPU
//S-DSP can be encapsulated into a state machine using #define magic
//this avoids ~2.048m co_switch() calls per second (~5% speedup)
#define USE_STATE_MACHINE
//FAST_FRAMESKIP disables calculation of RTO during frameskip
//frameskip offers near-zero speedup if RTO is calculated
//accuracy is not affected by this define when frameskipping is off
#define FAST_FRAMESKIP
//game genie + pro action replay code support (~1-3% speed hit)
//game genie + pro action replay code support (~2% speed hit)
#define CHEAT_SYSTEM
#include <nall/algorithm.hpp>
@@ -21,6 +25,7 @@
#include <nall/config.hpp>
#include <nall/detect.hpp>
#include <nall/function.hpp>
#include <nall/modulo.hpp>
#include <nall/new.hpp>
#include <nall/sort.hpp>
#include <nall/stdint.hpp>
@@ -34,18 +39,5 @@ using namespace nall;
//platform-specific global functions
void alert(const char*, ...);
void dprintf(const char*, ...);
void dprintf(uint, const char*, ...);
namespace source {
enum {
none = 0,
debug,
cpu,
ppu,
smp,
dsp,
bus,
};
};
#include "interface.h"

View File

@@ -1,5 +1,8 @@
#include "../base.h"
#define CART_CPP
#define CART_CPP
#include <nall/crc32.hpp>
#include <nall/ups.hpp>
#include "cart_normal.cpp"
#include "cart_bsx.cpp"
@@ -10,7 +13,7 @@
#include "cart_header.cpp"
namespace memory {
MappedRAM cartrom, cartram;
MappedRAM cartrom, cartram, cartrtc;
MappedRAM bscram;
MappedRAM stArom, stAram;
MappedRAM stBrom, stBram;
@@ -24,42 +27,44 @@ Cartridge::Region Cartridge::region() { return info.region; }
bool Cartridge::loaded() { return cart.loaded; }
void Cartridge::load_begin(CartridgeType cart_type) {
cart.rom = cart.ram = 0;
cart.rom = cart.ram = cart.rtc = 0;
bs.ram = 0;
stA.rom = stA.ram = 0;
stB.rom = stB.ram = 0;
cart.rom_size = cart.ram_size = 0;
cart.rom_size = cart.ram_size = cart.rtc_size = 0;
bs.ram_size = 0;
stA.rom_size = stA.ram_size = 0;
stB.rom_size = stB.ram_size = 0;
info.type = cart_type;
info.patched = false;
info.bsxbase = false;
info.bsxcart = false;
info.bsxflash = false;
info.st = false;
info.superfx = false;
info.sa1 = false;
info.srtc = false;
info.sdd1 = false;
info.cx4 = false;
info.dsp1 = false;
info.dsp2 = false;
info.dsp3 = false;
info.dsp4 = false;
info.obc1 = false;
info.st010 = false;
info.st011 = false;
info.st018 = false;
info.superfx = false;
info.sa1 = false;
info.srtc = false;
info.sdd1 = false;
info.spc7110 = false;
info.spc7110rtc = false;
info.cx4 = false;
info.dsp1 = false;
info.dsp2 = false;
info.dsp3 = false;
info.dsp4 = false;
info.obc1 = false;
info.st010 = false;
info.st011 = false;
info.st018 = false;
info.dsp1_mapper = DSP1Unmapped;
info.header_index = 0xffc0;
info.mapper = LoROM;
info.name[0] = 0;
info.region = NTSC;
info.rom_size = 0;
@@ -69,6 +74,7 @@ void Cartridge::load_begin(CartridgeType cart_type) {
void Cartridge::load_end() {
memory::cartrom.map(cart.rom, cart.rom_size);
memory::cartram.map(cart.ram, cart.ram_size);
memory::cartrtc.map(cart.rtc, cart.rtc_size);
memory::bscram.map(bs.ram, bs.ram_size);
memory::stArom.map(stA.rom, stA.rom_size);
memory::stAram.map(stA.ram, stA.ram_size);
@@ -98,19 +104,20 @@ bool Cartridge::unload() {
bus.unload_cart();
switch(info.type) {
case CartridgeNormal: unload_cart_normal(); break;
case CartridgeBSX: unload_cart_bsx(); break;
case CartridgeBSC: unload_cart_bsc(); break;
case CartridgeSufamiTurbo: unload_cart_st(); break;
case CartridgeNormal: unload_cart_normal(); break;
case CartridgeBSX: unload_cart_bsx(); break;
case CartridgeBSC: unload_cart_bsc(); break;
case CartridgeSufamiTurbo: unload_cart_st(); break;
}
safe_free(cart.rom);
safe_free(cart.ram);
safe_free(bs.ram);
safe_free(stA.rom);
safe_free(stA.ram);
safe_free(stB.rom);
safe_free(stB.ram);
if(cart.rom) { delete[] cart.rom; cart.rom = 0; }
if(cart.ram) { delete[] cart.ram; cart.ram = 0; }
if(cart.rtc) { delete[] cart.rtc; cart.rtc = 0; }
if(bs.ram) { delete[] bs.ram; bs.ram = 0; }
if(stA.rom) { delete[] stA.rom; stA.rom = 0; }
if(stA.ram) { delete[] stA.ram; stA.ram = 0; }
if(stB.rom) { delete[] stB.rom; stB.rom = 0; }
if(stB.ram) { delete[] stB.ram; stB.ram = 0; }
char fn[PATH_MAX];
strcpy(fn, cart.fn);

View File

@@ -18,8 +18,7 @@ public:
VERSION = 0x1b,
ICKSUM = 0x1c,
CKSUM = 0x1e,
RESL = 0x3c,
RESH = 0x3d,
RESETV = 0x3c,
};
enum Region {
@@ -32,6 +31,7 @@ public:
HiROM,
ExLoROM,
ExHiROM,
SPC7110ROM,
BSXROM,
BSCLoROM,
BSCHiROM,
@@ -48,8 +48,8 @@ public:
struct {
bool loaded;
char fn[PATH_MAX];
uint8 *rom, *ram;
uint rom_size, ram_size;
uint8 *rom, *ram, *rtc;
uint rom_size, ram_size, rtc_size;
} cart;
struct {
@@ -69,7 +69,7 @@ public:
uint32 crc32;
char filename[PATH_MAX * 4];
char name[128];
bool patched;
Region region;
MemoryMapper mapper;
@@ -83,7 +83,9 @@ public:
bool superfx;
bool sa1;
bool srtc;
bool sdd1;
bool sdd1;
bool spc7110;
bool spc7110rtc;
bool cx4;
bool dsp1;
bool dsp2;
@@ -117,28 +119,38 @@ public:
void load_end();
bool unload();
unsigned score_header(unsigned);
void find_header();
void read_header();
void read_extended_header();
bool load_file(const char *fn, uint8 *&data, uint &size);
bool save_file(const char *fn, uint8 *data, uint size);
enum CompressionMode {
CompressionNone, //always load without compression
CompressionInspect, //use file header inspection
CompressionAuto, //use file extension or file header inspection (configured by user)
};
bool load_file(const char *fn, uint8 *&data, uint &size, CompressionMode compression = CompressionNone);
bool save_file(const char *fn, uint8 *data, uint size);
bool apply_patch(const uint8_t *pdata, unsigned psize, uint8_t *&data, unsigned &size);
char* modify_extension(char *filename, const char *extension);
char* get_base_filename(char *filename);
char* get_path_filename(char *filename, const char *path, const char *source, const char *extension);
char* get_path_filename(char *filename, const char *path, const char *source, const char *extension);
char* get_patch_filename(const char *source, const char *extension);
char* get_save_filename(const char *source, const char *extension);
char* get_cheat_filename(const char *source, const char *extension);
Cartridge();
~Cartridge();
private:
char savefn[PATH_MAX];
private:
char patchfn[PATH_MAX];
char savefn[PATH_MAX];
char rtcfn[PATH_MAX];
char cheatfn[PATH_MAX];
};
namespace memory {
extern MappedRAM cartrom, cartram;
extern MappedRAM cartrom, cartram, cartrtc;
extern MappedRAM bscram;
extern MappedRAM stArom, stAram;
extern MappedRAM stBrom, stBram;

View File

@@ -9,13 +9,22 @@ void Cartridge::load_cart_bsc(const char *base, const char *slot) {
uint8_t *data = 0;
unsigned size;
load_file(cart.fn, data, size);
load_file(cart.fn, data, size, CompressionAuto);
cart.rom = data, cart.rom_size = size;
if(load_file(get_patch_filename(cart.fn, "ups"), data, size, CompressionInspect) == true) {
apply_patch(data, size, cart.rom, cart.rom_size);
delete[] data;
}
if(*bs.fn) {
if(load_file(bs.fn, data, size) == true) {
if(load_file(bs.fn, data, size, CompressionAuto) == true) {
info.bsxflash = true;
bs.ram = data, bs.ram_size = size;
if(load_file(get_patch_filename(bs.fn, "ups"), data, size, CompressionInspect) == true) {
apply_patch(data, size, bs.ram, bs.ram_size);
delete[] data;
}
}
}
@@ -26,12 +35,12 @@ void Cartridge::load_cart_bsc(const char *base, const char *slot) {
info.region = NTSC;
if(info.ram_size > 0) {
cart.ram = (uint8*)malloc(cart.ram_size = info.ram_size);
cart.ram = new uint8_t[cart.ram_size = info.ram_size];
memset(cart.ram, 0xff, cart.ram_size);
if(load_file(get_save_filename(cart.fn, "srm"), data, size) == true) {
if(load_file(get_save_filename(cart.fn, "srm"), data, size, CompressionNone) == true) {
memcpy(cart.ram, data, min(size, cart.ram_size));
safe_free(data);
delete[] data;
}
}

View File

@@ -14,27 +14,36 @@ void Cartridge::load_cart_bsx(const char *base, const char *slot) {
uint8_t *data = 0;
unsigned size;
load_file(cart.fn, data, size);
load_file(cart.fn, data, size, CompressionAuto);
cart.rom = data, cart.rom_size = size;
cart.ram = 0, cart.ram_size = 0;
if(load_file(get_patch_filename(cart.fn, "ups"), data, size, CompressionInspect) == true) {
apply_patch(data, size, cart.rom, cart.rom_size);
delete[] data;
}
memset(bsxcart.sram.handle (), 0x00, bsxcart.sram.size ());
memset(bsxcart.psram.handle(), 0x00, bsxcart.psram.size());
if(load_file(get_save_filename(cart.fn, "srm"), data, size) == true) {
if(load_file(get_save_filename(cart.fn, "srm"), data, size, CompressionNone) == true) {
memcpy(bsxcart.sram.handle (), data, min(bsxcart.sram.size (), size));
safe_free(data);
delete[] data;
}
if(load_file(get_save_filename(cart.fn, "psr"), data, size) == true) {
if(load_file(get_save_filename(cart.fn, "psr"), data, size, CompressionNone) == true) {
memcpy(bsxcart.psram.handle(), data, min(bsxcart.psram.size(), size));
safe_free(data);
delete[] data;
}
if(*bs.fn) {
if(load_file(bs.fn, data, size) == true) {
if(load_file(bs.fn, data, size, CompressionAuto) == true) {
info.bsxflash = true;
bs.ram = data, bs.ram_size = size;
if(load_file(get_patch_filename(bs.fn, "ups"), data, size, CompressionInspect) == true) {
apply_patch(data, size, bs.ram, bs.ram_size);
delete[] data;
}
}
}

View File

@@ -46,7 +46,9 @@ char* Cartridge::get_base_filename(char *filename) {
}
break;
}
}
}
return filename;
}
char* Cartridge::get_path_filename(char *filename, const char *path, const char *source, const char *extension) {
@@ -72,6 +74,10 @@ char* Cartridge::get_path_filename(char *filename, const char *path, const char
}
return filename;
}
char* Cartridge::get_patch_filename(const char *source, const char *extension) {
return get_path_filename(patchfn, config::path.patch, source, extension);
}
char* Cartridge::get_save_filename(const char *source, const char *extension) {
@@ -82,13 +88,17 @@ char* Cartridge::get_cheat_filename(const char *source, const char *extension) {
return get_path_filename(cheatfn, config::path.cheat, source, extension);
}
bool Cartridge::load_file(const char *fn, uint8 *&data, uint &size) {
dprintf("* Loading \"%s\"...", fn);
bool Cartridge::load_file(const char *fn, uint8 *&data, uint &size, CompressionMode compression) {
if(fexists(fn) == false) return false;
Reader::Type filetype = Reader::Normal;
if(compression == CompressionInspect) filetype = Reader::detect(fn, true);
if(compression == CompressionAuto) filetype = Reader::detect(fn, config::file.autodetect_type);
if(fexists(fn) == false) return false;
switch(Reader::detect(fn)) {
default:
switch(filetype) {
default:
dprintf("* Warning: filetype detected as unsupported compression type.");
dprintf("* Will attempt to load as uncompressed file -- may fail.");
case Reader::Normal: {
FileReader ff(fn);
if(!ff.ready()) {
@@ -132,13 +142,38 @@ bool Cartridge::load_file(const char *fn, uint8 *&data, uint &size) {
}
return true;
}
bool Cartridge::apply_patch(const uint8_t *pdata, const unsigned psize, uint8_t *&data, unsigned &size) {
uint8_t *outdata = 0;
unsigned outsize;
ups patcher;
ups::result result = patcher.apply(pdata, psize, data, size, outdata, outsize);
bool apply = false;
if(result == ups::ok) apply = true;
if(config::file.bypass_patch_crc32 == true) {
if(result == ups::input_crc32_invalid) apply = true;
if(result == ups::output_crc32_invalid) apply = true;
}
//if patch application was successful, replace old data, size with new data, size
if(apply == true) {
delete[] data;
data = new uint8_t[size = outsize];
memcpy(data, outdata, outsize);
}
if(outdata) delete[] outdata;
return apply;
}
bool Cartridge::save_file(const char *fn, uint8 *data, uint size) {
FileWriter ff(fn);
if(!ff.ready())return false;
ff.write(data, size);
return true;
bool Cartridge::save_file(const char *fn, uint8 *data, uint size) {
FILE *fp = fopen(fn, "wb");
if(!fp) return false;
fwrite(data, 1, size, fp);
fclose(fp);
return true;
}
#endif //ifdef CART_CPP

View File

@@ -5,6 +5,7 @@ void Cartridge::read_header() {
uint index = info.header_index;
uint8 mapper = rom[index + MAPPER];
uint8 rom_type = rom[index + ROM_TYPE];
uint8 rom_size = rom[index + ROM_SIZE];
uint8 company = rom[index + COMPANY];
uint8 region = rom[index + REGION] & 0x7f;
@@ -51,6 +52,12 @@ void Cartridge::read_header() {
info.sdd1 = true;
}
if(mapper == 0x3a && (rom_type == 0xf5 || rom_type == 0xf9)) {
info.spc7110 = true;
info.spc7110rtc = (rom_type == 0xf9);
info.mapper = SPC7110ROM;
}
if(mapper == 0x20 && rom_type == 0xf3) {
info.cx4 = true;
}
@@ -93,13 +100,14 @@ void Cartridge::read_header() {
info.obc1 = true;
}
if(mapper == 0x30 && rom_type == 0xf6) {
//TODO: both ST010 and ST011 share the same mapper + rom_type.
//need way to determine which is which.
//for now, default to supported ST010.
if(mapper == 0x30 && rom_type == 0xf6 && rom_size >= 10) {
info.st010 = true;
}
if(mapper == 0x30 && rom_type == 0xf6 && rom_size < 10) {
info.st011 = true;
}
if(mapper == 0x30 && rom_type == 0xf5) {
info.st018 = true;
}
@@ -112,70 +120,95 @@ void Cartridge::read_header() {
//0, 1, 13 = NTSC; 2 - 12 = PAL
info.region = (region <= 1 || region >= 13) ? NTSC : PAL;
}
memcpy(&info.name, &rom[info.header_index + CART_NAME], 21);
info.name[21] = 0;
trim(info.name);
unsigned Cartridge::score_header(unsigned addr) {
if(cart.rom_size < addr + 64) return 0; //image too small to contain header at this location?
uint8 *rom = cart.rom;
int score = 0;
//convert undisplayable characters (half-width katakana, etc) to '?' characters
for(int i = 0; i < 21; i++) {
if(info.name[i] & 0x80) info.name[i] = '?';
}
uint16 resetvector = rom[addr + RESETV] | (rom[addr + RESETV + 1] << 8);
uint16 checksum = rom[addr + CKSUM] | (rom[addr + CKSUM + 1] << 8);
uint16 ichecksum = rom[addr + ICKSUM] | (rom[addr + ICKSUM + 1] << 8);
//always display something
if(!info.name[0]) strcpy(info.name, "(untitled)");
uint8 resetop = rom[(addr & ~0x7fff) | (resetvector & 0x7fff)]; //first opcode executed upon reset
uint8 mapper = rom[addr + MAPPER] & ~0x10; //mask off irrelevent FastROM-capable bit
//$00:[000-7fff] contains uninitialized RAM and MMIO.
//reset vector must point to ROM at $00:[8000-ffff] to be considered valid.
if(resetvector < 0x8000) return 0;
//some images duplicate the header in multiple locations, and others have completely
//invalid header information that cannot be relied upon.
//below code will analyze the first opcode executed at the specified reset vector to
//determine the probability that this is the correct header.
//most likely opcodes
if(resetop == 0x78 //sei
|| resetop == 0x18 //clc (clc; xce)
|| resetop == 0x38 //sec (sec; xce)
|| resetop == 0x9c //stz $nnnn (stz $4200)
|| resetop == 0x4c //jmp $nnnn
|| resetop == 0x5c //jml $nnnnnn
) score += 8;
//plausible opcodes
if(resetop == 0xc2 //rep #$nn
|| resetop == 0xe2 //sep #$nn
|| resetop == 0xad //lda $nnnn
|| resetop == 0xae //ldx $nnnn
|| resetop == 0xac //ldy $nnnn
|| resetop == 0xaf //lda $nnnnnn
|| resetop == 0xa9 //lda #$nn
|| resetop == 0xa2 //ldx #$nn
|| resetop == 0xa0 //ldy #$nn
|| resetop == 0x20 //jsr $nnnn
|| resetop == 0x22 //jsl $nnnnnn
) score += 4;
//implausible opcodes
if(resetop == 0x40 //rti
|| resetop == 0x60 //rts
|| resetop == 0x6b //rtl
|| resetop == 0xcd //cmp $nnnn
|| resetop == 0xec //cpx $nnnn
|| resetop == 0xcc //cpy $nnnn
) score -= 4;
//least likely opcodes
if(resetop == 0x00 //brk #$nn
|| resetop == 0x02 //cop #$nn
|| resetop == 0xdb //stp
|| resetop == 0x42 //wdm
|| resetop == 0xff //sbc $nnnnnn,x
) score -= 8;
//at times, both the header and reset vector's first opcode will match ...
//fallback and rely on info validity in these cases to determine more likely header.
//a valid checksum is the biggest indicator of a valid header.
if((checksum + ichecksum) == 0xffff && (checksum != 0) && (ichecksum != 0)) score += 4;
if(addr == 0x007fc0 && mapper == 0x20) score += 2; //0x20 is usually LoROM
if(addr == 0x00ffc0 && mapper == 0x21) score += 2; //0x21 is usually HiROM
if(addr == 0x007fc0 && mapper == 0x22) score += 2; //0x22 is usually ExLoROM
if(addr == 0x40ffc0 && mapper == 0x25) score += 2; //0x25 is usually ExHiROM
if(rom[addr + COMPANY] == 0x33) score += 2; //0x33 indicates extended header
if(rom[addr + ROM_TYPE] < 0x08) score++;
if(rom[addr + ROM_SIZE] < 0x10) score++;
if(rom[addr + RAM_SIZE] < 0x08) score++;
if(rom[addr + REGION] < 14) score++;
if(score < 0) score = 0;
return score;
}
void Cartridge::find_header() {
int32 score_lo = 0, score_hi = 0, score_ex = 0;
uint8_t *rom = cart.rom;
if(cart.rom_size < 0x010000) {
//cart too small to be anything but lorom
info.header_index = 0x007fc0;
return;
}
if((rom[0x7fc0 + MAPPER] & ~0x10) == 0x20) score_lo++;
if((rom[0xffc0 + MAPPER] & ~0x10) == 0x21) score_hi++;
if(rom[0x7fc0 + ROM_TYPE] < 0x08) score_lo++;
if(rom[0xffc0 + ROM_TYPE] < 0x08) score_hi++;
if(rom[0x7fc0 + ROM_SIZE] < 0x10) score_lo++;
if(rom[0xffc0 + ROM_SIZE] < 0x10) score_hi++;
if(rom[0x7fc0 + RAM_SIZE] < 0x08) score_lo++;
if(rom[0xffc0 + RAM_SIZE] < 0x08) score_hi++;
if(rom[0x7fc0 + REGION] < 14) score_lo++;
if(rom[0xffc0 + REGION] < 14) score_hi++;
if(rom[0x7fc0 + COMPANY] < 3) score_lo++;
if(rom[0xffc0 + COMPANY] < 3) score_hi++;
if(rom[0x7fc0 + RESH] & 0x80) score_lo += 2;
if(rom[0xffc0 + RESH] & 0x80) score_hi += 2;
uint16 cksum, icksum;
cksum = rom[0x7fc0 + CKSUM] | (rom[0x7fc0 + CKSUM + 1] << 8);
icksum = rom[0x7fc0 + ICKSUM] | (rom[0x7fc0 + ICKSUM + 1] << 8);
if((cksum + icksum) == 0xffff && (cksum != 0) && (icksum != 0)) {
score_lo += 8;
}
cksum = rom[0xffc0 + CKSUM] | (rom[0xffc0 + CKSUM + 1] << 8);
icksum = rom[0xffc0 + ICKSUM] | (rom[0xffc0 + ICKSUM + 1] << 8);
if((cksum + icksum) == 0xffff && (cksum != 0) && (icksum != 0)) {
score_hi += 8;
}
if(cart.rom_size < 0x401000) {
score_ex = 0;
} else {
if(rom[0x7fc0 + MAPPER] == 0x32) score_lo++;
else score_ex += 16;
}
unsigned score_lo = score_header(0x007fc0);
unsigned score_hi = score_header(0x00ffc0);
unsigned score_ex = score_header(0x40ffc0);
if(score_ex) score_ex += 4; //favor ExHiROM on images > 32mbits
if(score_lo >= score_hi && score_lo >= score_ex) {
info.header_index = 0x007fc0;

View File

@@ -5,20 +5,26 @@ void Cartridge::load_cart_normal(const char *filename) {
uint8_t *data = 0;
unsigned size;
if(load_file(filename, data, size) == false) return;
if(load_file(filename, data, size, CompressionAuto) == false) return;
strcpy(cart.fn, filename);
load_begin(CartridgeNormal);
//load ROM data, ignore 512-byte header if detected
if((size & 0x7fff) != 512) {
cart.rom = (uint8*)malloc(cart.rom_size = size);
cart.rom = new uint8_t[cart.rom_size = size];
memcpy(cart.rom, data, size);
} else {
cart.rom = (uint8*)malloc(cart.rom_size = size - 512);
cart.rom = new uint8_t[cart.rom_size = size - 512];
memcpy(cart.rom, data + 512, size - 512);
}
safe_free(data);
delete[] data;
if(load_file(get_patch_filename(cart.fn, "ups"), data, size, CompressionInspect) == true) {
apply_patch(data, size, cart.rom, cart.rom_size);
delete[] data;
info.patched = true;
}
info.crc32 = crc32_calculate(cart.rom, cart.rom_size);
@@ -26,12 +32,20 @@ void Cartridge::load_cart_normal(const char *filename) {
read_header();
if(info.ram_size > 0) {
cart.ram = (uint8*)malloc(cart.ram_size = info.ram_size);
cart.ram = new uint8_t[cart.ram_size = info.ram_size];
memset(cart.ram, 0xff, cart.ram_size);
if(load_file(get_save_filename(cart.fn, "srm"), data, size) == true) {
if(load_file(get_save_filename(cart.fn, "srm"), data, size, CompressionNone) == true) {
memcpy(cart.ram, data, min(size, cart.ram_size));
safe_free(data);
delete[] data;
}
}
if(info.srtc || info.spc7110rtc) {
cart.rtc = new(zeromemory) uint8_t[cart.rtc_size = 20];
if(load_file(get_save_filename(cart.fn, "rtc"), data, size, CompressionNone) == true) {
memcpy(cart.rtc, data, min(size, cart.rtc_size));
delete[] data;
}
}
@@ -44,6 +58,7 @@ void Cartridge::load_cart_normal(const char *filename) {
void Cartridge::unload_cart_normal() {
if(cart.ram) save_file(get_save_filename(cart.fn, "srm"), cart.ram, cart.ram_size);
if(cart.rtc) save_file(get_save_filename(cart.fn, "rtc"), cart.rtc, cart.rtc_size);
}
#endif //ifdef CART_CPP

View File

@@ -14,40 +14,52 @@ void Cartridge::load_cart_st(const char *base, const char *slotA, const char *sl
uint8_t *data = 0;
unsigned size;
if(load_file(cart.fn, data, size) == true) {
cart.rom = (uint8*)malloc(cart.rom_size = 0x040000);
if(load_file(cart.fn, data, size, CompressionAuto) == true) {
cart.rom = new(zeromemory) uint8_t[cart.rom_size = 0x040000];
memcpy(cart.rom, data, min(size, cart.rom_size));
safe_free(data);
delete[] data;
if(load_file(get_patch_filename(cart.fn, "ups"), data, size, CompressionInspect) == true) {
apply_patch(data, size, cart.rom, cart.rom_size);
delete[] data;
}
}
if(*stA.fn) {
if(load_file(stA.fn, data, size) == true) {
stA.rom = (uint8*)malloc(stA.rom_size = 0x100000);
if(load_file(stA.fn, data, size, CompressionAuto) == true) {
stA.rom = new(zeromemory) uint8_t[stA.rom_size = 0x100000];
memcpy(stA.rom, data, min(size, stA.rom_size));
safe_free(data);
delete[] data;
if(load_file(get_patch_filename(stA.fn, "ups"), data, size, CompressionInspect) == true) {
apply_patch(data, size, stA.rom, stA.rom_size);
delete[] data;
}
stA.ram = (uint8*)malloc(stA.ram_size = 0x020000);
stA.ram = new uint8_t[stA.ram_size = 0x020000];
memset(stA.ram, 0xff, stA.ram_size);
if(load_file(get_save_filename(stA.fn, "srm"), data, size) == true) {
if(load_file(get_save_filename(stA.fn, "srm"), data, size, CompressionNone) == true) {
memcpy(stA.ram, data, min(size, 0x020000U));
safe_free(data);
delete[] data;
}
}
}
if(*stB.fn) {
if(load_file(stB.fn, data, size) == true) {
stB.rom = (uint8*)malloc(stB.rom_size = 0x100000);
if(load_file(stB.fn, data, size, CompressionAuto) == true) {
stB.rom = new(zeromemory) uint8_t[stB.rom_size = 0x100000];
memcpy(stB.rom, data, min(size, stB.rom_size));
safe_free(data);
delete[] data;
if(load_file(get_patch_filename(stB.fn, "ups"), data, size, CompressionInspect) == true) {
apply_patch(data, size, stB.rom, stB.rom_size);
delete[] data;
}
stB.ram = (uint8*)malloc(stB.ram_size = 0x020000);
stB.ram = new uint8_t[stB.ram_size = 0x020000];
memset(stB.ram, 0xff, stB.ram_size);
if(load_file(get_save_filename(stB.fn, "srm"), data, size) == true) {
if(load_file(get_save_filename(stB.fn, "srm"), data, size, CompressionNone) == true) {
memcpy(stB.ram, data, min(size, 0x020000U));
safe_free(data);
delete[] data;
}
}
}

View File

@@ -1,3 +1,3 @@
::@make platform=win compiler=mingw32-gcc
@make platform=win compiler=mingw32-gcc enable_gzip=true enable_jma=true
@make platform=win compiler=mingw32-gcc
::@make platform=win compiler=mingw32-gcc enable_gzip=true enable_jma=true
@pause

View File

@@ -20,7 +20,7 @@ void BSXCart::reset() {
}
void BSXCart::update_memory_map() {
Memory &cart = (regs.r[0x01] & 0x80) == 0x00 ? (Memory&)bsxflash : (Memory&)psram;
Memory &cart = (regs.r[0x01] & 0x80) == 0x00 ? (Memory&)bsxflash : (Memory&)psram;
if((regs.r[0x02] & 0x80) == 0x00) { //LoROM mapping
bus.map(Bus::MapLinear, 0x00, 0x7d, 0x8000, 0xffff, cart);
@@ -59,7 +59,7 @@ Memory &cart = (regs.r[0x01] & 0x80) == 0x00 ? (Memory&)bsxflash : (Memory&)psra
uint8 BSXCart::mmio_read(uint addr) {
if((addr & 0xf0ffff) == 0x005000) { //$[00-0f]:5000 MMIO
uint8 n = (addr >> 16) & 15;
uint8 n = (addr >> 16) & 15;
return regs.r[n];
}
@@ -72,7 +72,7 @@ uint8 BSXCart::mmio_read(uint addr) {
void BSXCart::mmio_write(uint addr, uint8 data) {
if((addr & 0xf0ffff) == 0x005000) { //$[00-0f]:5000 MMIO
uint8 n = (addr >> 16) & 15;
uint8 n = (addr >> 16) & 15;
regs.r[n] = data;
if(n == 0x0e && data & 0x80) update_memory_map();
return;
@@ -84,16 +84,16 @@ void BSXCart::mmio_write(uint addr, uint8 data) {
}
BSXCart::BSXCart() {
sram_data = (uint8*)malloc( 32 * 1024);
psram_data = (uint8*)malloc(512 * 1024);
sram_data = new uint8_t[ 32 * 1024];
psram_data = new uint8_t[512 * 1024];
sram.map (sram_data, 32 * 1024);
psram.map(psram_data, 512 * 1024);
}
BSXCart::~BSXCart() {
safe_free(sram_data);
safe_free(psram_data);
delete[] sram_data;
delete[] psram_data;
}
#endif //ifdef BSX_CPP

View File

@@ -1,6 +1,7 @@
#include "bsx/bsx.h"
#include "srtc/srtc.h"
#include "sdd1/sdd1.h"
#include "spc7110/spc7110.h"
#include "cx4/cx4.h"
#include "dsp1/dsp1.h"
#include "dsp2/dsp2.h"

511
src/chip/spc7110/decomp.cpp Normal file
View File

@@ -0,0 +1,511 @@
#ifdef SPC7110_CPP
uint8 SPC7110Decomp::read() {
if(decomp_buffer_length == 0) {
//decompress at least (decomp_buffer_size / 2) bytes to the buffer
switch(decomp_mode) {
case 0: mode0(false); break;
case 1: mode1(false); break;
case 2: mode2(false); break;
default: return 0x00;
}
}
uint8 data = decomp_buffer[decomp_buffer_rdoffset++];
decomp_buffer_rdoffset &= decomp_buffer_size - 1;
decomp_buffer_length--;
return data;
}
void SPC7110Decomp::write(uint8 data) {
decomp_buffer[decomp_buffer_wroffset++] = data;
decomp_buffer_wroffset &= decomp_buffer_size - 1;
decomp_buffer_length++;
}
uint8 SPC7110Decomp::dataread() {
unsigned size = memory::cartrom.size() - 0x100000;
while(decomp_offset >= size) decomp_offset -= size;
return memory::cartrom.read(0x100000 + decomp_offset++);
}
void SPC7110Decomp::init(unsigned mode, unsigned offset, unsigned index) {
decomp_mode = mode;
decomp_offset = offset;
decomp_buffer_rdoffset = 0;
decomp_buffer_wroffset = 0;
decomp_buffer_length = 0;
//reset context states
for(unsigned i = 0; i < 32; i++) {
context[i].index = 0;
context[i].invert = 0;
}
switch(decomp_mode) {
case 0: mode0(true); break;
case 1: mode1(true); break;
case 2: mode2(true); break;
}
//decompress up to requested output data index
while(index--) read();
}
//
void SPC7110Decomp::mode0(bool init) {
static uint8 val, in, span;
static int out, inverts, lps, in_count;
if(init == true) {
out = inverts = lps = 0;
span = 0xff;
val = dataread();
in = dataread();
in_count = 8;
return;
}
while(decomp_buffer_length < (decomp_buffer_size >> 1)) {
for(unsigned bit = 0; bit < 8; bit++) {
//get context
uint8 mask = (1 << (bit & 3)) - 1;
uint8 con = mask + ((inverts & mask) ^ (lps & mask));
if(bit > 3) con += 15;
//get prob and mps
unsigned prob = probability(con);
unsigned mps = (((out >> 15) & 1) ^ context[con].invert);
//get bit
unsigned flag_lps;
if(val <= span - prob) { //mps
span = span - prob;
out = (out << 1) + mps;
flag_lps = 0;
} else { //lps
val = val - (span - (prob - 1));
span = prob - 1;
out = (out << 1) + 1 - mps;
flag_lps = 1;
}
//renormalize
unsigned shift = 0;
while(span < 0x7f) {
shift++;
span = (span << 1) + 1;
val = (val << 1) + (in >> 7);
in <<= 1;
if(--in_count == 0) {
in = dataread();
in_count = 8;
}
}
//update processing info
lps = (lps << 1) + flag_lps;
inverts = (inverts << 1) + context[con].invert;
//update context state
if(flag_lps & toggle_invert(con)) context[con].invert ^= 1;
if(flag_lps) context[con].index = next_lps(con);
else if(shift) context[con].index = next_mps(con);
}
//save byte
write(out);
}
}
void SPC7110Decomp::mode1(bool init) {
static int pixelorder[4], realorder[4];
static uint8 in, val, span;
static int out, inverts, lps, in_count;
if(init == true) {
for(unsigned i = 0; i < 4; i++) pixelorder[i] = i;
out = inverts = lps = 0;
span = 0xff;
val = dataread();
in = dataread();
in_count = 8;
return;
}
while(decomp_buffer_length < (decomp_buffer_size >> 1)) {
for(unsigned pixel = 0; pixel < 8; pixel++) {
//get first symbol context
unsigned a = ((out >> (1 * 2)) & 3);
unsigned b = ((out >> (7 * 2)) & 3);
unsigned c = ((out >> (8 * 2)) & 3);
unsigned con = (a == b) ? (b != c) : (b == c) ? 2 : 4 - (a == c);
//update pixel order
unsigned m, n;
for(m = 0; m < 4; m++) if(pixelorder[m] == a) break;
for(n = m; n > 0; n--) pixelorder[n] = pixelorder[n - 1];
pixelorder[0] = a;
//calculate the real pixel order
for(m = 0; m < 4; m++) realorder[m] = pixelorder[m];
//rotate reference pixel c value to top
for(m = 0; m < 4; m++) if(realorder[m] == c) break;
for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
realorder[0] = c;
//rotate reference pixel b value to top
for(m = 0; m < 4; m++) if(realorder[m] == b) break;
for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
realorder[0] = b;
//rotate reference pixel a value to top
for(m = 0; m < 4; m++) if(realorder[m] == a) break;
for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
realorder[0] = a;
//get 2 symbols
for(unsigned bit = 0; bit < 2; bit++) {
//get prob
unsigned prob = probability(con);
//get symbol
unsigned flag_lps;
if(val <= span - prob) { //mps
span = span - prob;
flag_lps = 0;
} else { //lps
val = val - (span - (prob - 1));
span = prob - 1;
flag_lps = 1;
}
//renormalize
unsigned shift = 0;
while(span < 0x7f) {
shift++;
span = (span << 1) + 1;
val = (val << 1) + (in >> 7);
in <<= 1;
if(--in_count == 0) {
in = dataread();
in_count = 8;
}
}
//update processing info
lps = (lps << 1) + flag_lps;
inverts = (inverts << 1) + context[con].invert;
//update context state
if(flag_lps & toggle_invert(con)) context[con].invert ^= 1;
if(flag_lps) context[con].index = next_lps(con);
else if(shift) context[con].index = next_mps(con);
//get next context
con = 5 + (con << 1) + ((lps ^ inverts) & 1);
}
//get pixel
b = realorder[(lps ^ inverts) & 3];
out = (out << 2) + b;
}
//turn pixel data into bitplanes
unsigned data = morton_2x8(out);
write(data >> 8);
write(data >> 0);
}
}
void SPC7110Decomp::mode2(bool init) {
static int pixelorder[16], realorder[16];
static uint8 bitplanebuffer[16], buffer_index;
static uint8 in, val, span;
static int out0, out1, inverts, lps, in_count;
if(init == true) {
for(unsigned i = 0; i < 16; i++) pixelorder[i] = i;
buffer_index = 0;
out0 = out1 = inverts = lps = 0;
span = 0xff;
val = dataread();
in = dataread();
in_count = 8;
return;
}
while(decomp_buffer_length < (decomp_buffer_size >> 1)) {
for(unsigned pixel = 0; pixel < 8; pixel++) {
//get first symbol context
unsigned a = ((out0 >> (0 * 4)) & 15);
unsigned b = ((out0 >> (7 * 4)) & 15);
unsigned c = ((out1 >> (0 * 4)) & 15);
unsigned con = 0;
unsigned refcon = (a == b) ? (b != c) : (b == c) ? 2 : 4 - (a == c);
//update pixel order
unsigned m, n;
for(m = 0; m < 16; m++) if(pixelorder[m] == a) break;
for(n = m; n > 0; n--) pixelorder[n] = pixelorder[n - 1];
pixelorder[0] = a;
//calculate the real pixel order
for(m = 0; m < 16; m++) realorder[m] = pixelorder[m];
//rotate reference pixel c value to top
for(m = 0; m < 16; m++) if(realorder[m] == c) break;
for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
realorder[0] = c;
//rotate reference pixel b value to top
for(m = 0; m < 16; m++) if(realorder[m] == b) break;
for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
realorder[0] = b;
//rotate reference pixel a value to top
for(m = 0; m < 16; m++) if(realorder[m] == a) break;
for(n = m; n > 0; n--) realorder[n] = realorder[n - 1];
realorder[0] = a;
//get 4 symbols
for(unsigned bit = 0; bit < 4; bit++) {
//get prob
unsigned prob = probability(con);
//get symbol
unsigned flag_lps;
if(val <= span - prob) { //mps
span = span - prob;
flag_lps = 0;
} else { //lps
val = val - (span - (prob - 1));
span = prob - 1;
flag_lps = 1;
}
//renormalize
unsigned shift = 0;
while(span < 0x7f) {
shift++;
span = (span << 1) + 1;
val = (val << 1) + (in >> 7);
in <<= 1;
if(--in_count == 0) {
in = dataread();
in_count = 8;
}
}
//update processing info
lps = (lps << 1) + flag_lps;
unsigned invertbit = context[con].invert;
inverts = (inverts << 1) + invertbit;
//update context state
if(flag_lps & toggle_invert(con)) context[con].invert ^= 1;
if(flag_lps) context[con].index = next_lps(con);
else if(shift) context[con].index = next_mps(con);
//get next context
con = mode2_context_table[con][flag_lps ^ invertbit] + (con == 1 ? refcon : 0);
}
//get pixel
b = realorder[(lps ^ inverts) & 0x0f];
out1 = (out1 << 4) + ((out0 >> 28) & 0x0f);
out0 = (out0 << 4) + b;
}
//convert pixel data into bitplanes
unsigned data = morton_4x8(out0);
write(data >> 24);
write(data >> 16);
bitplanebuffer[buffer_index++] = data >> 8;
bitplanebuffer[buffer_index++] = data >> 0;
if(buffer_index == 16) {
for(unsigned i = 0; i < 16; i++) write(bitplanebuffer[i]);
buffer_index = 0;
}
}
}
//
const uint8 SPC7110Decomp::evolution_table[53][4] = {
//{ prob, nextlps, nextmps, toggle invert },
{ 0x5a, 1, 1, 1 },
{ 0x25, 6, 2, 0 },
{ 0x11, 8, 3, 0 },
{ 0x08, 10, 4, 0 },
{ 0x03, 12, 5, 0 },
{ 0x01, 15, 5, 0 },
{ 0x5a, 7, 7, 1 },
{ 0x3f, 19, 8, 0 },
{ 0x2c, 21, 9, 0 },
{ 0x20, 22, 10, 0 },
{ 0x17, 23, 11, 0 },
{ 0x11, 25, 12, 0 },
{ 0x0c, 26, 13, 0 },
{ 0x09, 28, 14, 0 },
{ 0x07, 29, 15, 0 },
{ 0x05, 31, 16, 0 },
{ 0x04, 32, 17, 0 },
{ 0x03, 34, 18, 0 },
{ 0x02, 35, 5, 0 },
{ 0x5a, 20, 20, 1 },
{ 0x48, 39, 21, 0 },
{ 0x3a, 40, 22, 0 },
{ 0x2e, 42, 23, 0 },
{ 0x26, 44, 24, 0 },
{ 0x1f, 45, 25, 0 },
{ 0x19, 46, 26, 0 },
{ 0x15, 25, 27, 0 },
{ 0x11, 26, 28, 0 },
{ 0x0e, 26, 29, 0 },
{ 0x0b, 27, 30, 0 },
{ 0x09, 28, 31, 0 },
{ 0x08, 29, 32, 0 },
{ 0x07, 30, 33, 0 },
{ 0x05, 31, 34, 0 },
{ 0x04, 33, 35, 0 },
{ 0x04, 33, 36, 0 },
{ 0x03, 34, 37, 0 },
{ 0x02, 35, 38, 0 },
{ 0x02, 36, 5, 0 },
{ 0x58, 39, 40, 1 },
{ 0x4d, 47, 41, 0 },
{ 0x43, 48, 42, 0 },
{ 0x3b, 49, 43, 0 },
{ 0x34, 50, 44, 0 },
{ 0x2e, 51, 45, 0 },
{ 0x29, 44, 46, 0 },
{ 0x25, 45, 24, 0 },
{ 0x56, 47, 48, 1 },
{ 0x4f, 47, 49, 0 },
{ 0x47, 48, 50, 0 },
{ 0x41, 49, 51, 0 },
{ 0x3c, 50, 52, 0 },
{ 0x37, 51, 43, 0 },
};
const uint8 SPC7110Decomp::mode2_context_table[32][2] = {
//{ next 0, next 1 },
{ 1, 2 },
{ 3, 8 },
{ 13, 14 },
{ 15, 16 },
{ 17, 18 },
{ 19, 20 },
{ 21, 22 },
{ 23, 24 },
{ 25, 26 },
{ 25, 26 },
{ 25, 26 },
{ 25, 26 },
{ 25, 26 },
{ 27, 28 },
{ 29, 30 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
{ 31, 31 },
};
uint8 SPC7110Decomp::probability (unsigned n) { return evolution_table[context[n].index][0]; }
uint8 SPC7110Decomp::next_lps (unsigned n) { return evolution_table[context[n].index][1]; }
uint8 SPC7110Decomp::next_mps (unsigned n) { return evolution_table[context[n].index][2]; }
bool SPC7110Decomp::toggle_invert(unsigned n) { return evolution_table[context[n].index][3]; }
unsigned SPC7110Decomp::morton_2x8(unsigned data) {
//reverse morton lookup: de-interleave two 8-bit values
//15, 13, 11, 9, 7, 5, 3, 1 -> 15- 8
//14, 12, 10, 8, 6, 4, 2, 0 -> 7- 0
return morton16[0][(data >> 0) & 255] + morton16[1][(data >> 8) & 255];
}
unsigned SPC7110Decomp::morton_4x8(unsigned data) {
//reverse morton lookup: de-interleave four 8-bit values
//31, 27, 23, 19, 15, 11, 7, 3 -> 31-24
//30, 26, 22, 18, 14, 10, 6, 2 -> 23-16
//29, 25, 21, 17, 13, 9, 5, 1 -> 15- 8
//28, 24, 20, 16, 12, 8, 4, 0 -> 7- 0
return morton32[0][(data >> 0) & 255] + morton32[1][(data >> 8) & 255]
+ morton32[2][(data >> 16) & 255] + morton32[3][(data >> 24) & 255];
}
//
void SPC7110Decomp::reset() {
//mode 3 is invalid; this is treated as a special case to always return 0x00
//set to mode 3 so that reading decomp port before starting first decomp will return 0x00
decomp_mode = 3;
decomp_buffer_rdoffset = 0;
decomp_buffer_wroffset = 0;
decomp_buffer_length = 0;
}
SPC7110Decomp::SPC7110Decomp() {
decomp_buffer = new uint8_t[decomp_buffer_size];
reset();
//initialize reverse morton lookup tables
for(unsigned i = 0; i < 256; i++) {
#define map(x, y) (((i >> x) & 1) << y)
//2x8-bit
morton16[1][i] = map(7, 15) + map(6, 7) + map(5, 14) + map(4, 6)
+ map(3, 13) + map(2, 5) + map(1, 12) + map(0, 4);
morton16[0][i] = map(7, 11) + map(6, 3) + map(5, 10) + map(4, 2)
+ map(3, 9) + map(2, 1) + map(1, 8) + map(0, 0);
//4x8-bit
morton32[3][i] = map(7, 31) + map(6, 23) + map(5, 15) + map(4, 7)
+ map(3, 30) + map(2, 22) + map(1, 14) + map(0, 6);
morton32[2][i] = map(7, 29) + map(6, 21) + map(5, 13) + map(4, 5)
+ map(3, 28) + map(2, 20) + map(1, 12) + map(0, 4);
morton32[1][i] = map(7, 27) + map(6, 19) + map(5, 11) + map(4, 3)
+ map(3, 26) + map(2, 18) + map(1, 10) + map(0, 2);
morton32[0][i] = map(7, 25) + map(6, 17) + map(5, 9) + map(4, 1)
+ map(3, 24) + map(2, 16) + map(1, 8) + map(0, 0);
#undef map
}
}
SPC7110Decomp::~SPC7110Decomp() {
delete[] decomp_buffer;
}
#endif

45
src/chip/spc7110/decomp.h Normal file
View File

@@ -0,0 +1,45 @@
class SPC7110Decomp {
public:
uint8 read();
void init(unsigned mode, unsigned offset, unsigned index);
void reset();
SPC7110Decomp();
~SPC7110Decomp();
private:
unsigned decomp_mode;
unsigned decomp_offset;
//read() will spool chunks half the size of decomp_buffer_size
enum { decomp_buffer_size = 64 }; //must be >= 64, and must be a power of two
uint8 *decomp_buffer;
unsigned decomp_buffer_rdoffset;
unsigned decomp_buffer_wroffset;
unsigned decomp_buffer_length;
void write(uint8 data);
uint8 dataread();
void mode0(bool init);
void mode1(bool init);
void mode2(bool init);
static const uint8 evolution_table[53][4];
static const uint8 mode2_context_table[32][2];
struct ContextState {
uint8 index;
uint8 invert;
} context[32];
uint8 probability(unsigned n);
uint8 next_lps(unsigned n);
uint8 next_mps(unsigned n);
bool toggle_invert(unsigned n);
unsigned morton16[2][256];
unsigned morton32[4][256];
unsigned morton_2x8(unsigned data);
unsigned morton_4x8(unsigned data);
};

View File

@@ -0,0 +1,658 @@
#include "../../base.h"
#define SPC7110_CPP
#include "decomp.cpp"
const unsigned SPC7110::months[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
void SPC7110::init() {}
void SPC7110::enable() {
uint16_t limit = (cartridge.info.spc7110rtc ? 0x4842 : 0x483f);
for(uint16_t i = 0x4800; i <= limit; i++) memory::mmio.map(i, *this);
}
void SPC7110::power() {
reset();
}
void SPC7110::reset() {
r4801 = 0x00;
r4802 = 0x00;
r4803 = 0x00;
r4804 = 0x00;
r4805 = 0x00;
r4806 = 0x00;
r4807 = 0x00;
r4808 = 0x00;
r4809 = 0x00;
r480a = 0x00;
r480b = 0x00;
r480c = 0x00;
decomp.reset();
r4811 = 0x00;
r4812 = 0x00;
r4813 = 0x00;
r4814 = 0x00;
r4815 = 0x00;
r4816 = 0x00;
r4817 = 0x00;
r4818 = 0x00;
r481x = 0x00;
r4814_latch = false;
r4815_latch = false;
r4820 = 0x00;
r4821 = 0x00;
r4822 = 0x00;
r4823 = 0x00;
r4824 = 0x00;
r4825 = 0x00;
r4826 = 0x00;
r4827 = 0x00;
r4828 = 0x00;
r4829 = 0x00;
r482a = 0x00;
r482b = 0x00;
r482c = 0x00;
r482d = 0x00;
r482e = 0x00;
r482f = 0x00;
r4830 = 0x00;
mmio_write(0x4831, 0);
mmio_write(0x4832, 1);
mmio_write(0x4833, 2);
r4834 = 0x00;
r4840 = 0x00;
r4841 = 0x00;
r4842 = 0x00;
if(cartridge.info.spc7110rtc) {
rtc_state = RTCS_Inactive;
rtc_mode = RTCM_Linear;
rtc_index = 0;
}
}
unsigned SPC7110::datarom_addr(unsigned addr) {
unsigned size = memory::cartrom.size() - 0x100000;
while(addr >= size) addr -= size;
return addr + 0x100000;
}
unsigned SPC7110::data_pointer() { return r4811 + (r4812 << 8) + (r4813 << 16); }
unsigned SPC7110::data_adjust() { return r4814 + (r4815 << 8); }
unsigned SPC7110::data_increment() { return r4816 + (r4817 << 8); }
void SPC7110::set_data_pointer(unsigned addr) { r4811 = addr; r4812 = addr >> 8; r4813 = addr >> 16; }
void SPC7110::set_data_adjust(unsigned addr) { r4814 = addr; r4815 = addr >> 8; }
void SPC7110::update_time(int offset) {
time_t rtc_time;
rtc_time = memory::cartrtc.read(16);
rtc_time |= memory::cartrtc.read(17) << 8;
rtc_time |= memory::cartrtc.read(18) << 16;
rtc_time |= memory::cartrtc.read(19) << 24;
bool update = true;
if(memory::cartrtc.read(13) & 1) update = false; //do not update if CR0 timer disable flag is set
if(memory::cartrtc.read(15) & 3) update = false; //do not update if CR2 timer disable flags are set
time_t current_time = time(0) - offset;
if(update && current_time > rtc_time) {
unsigned second = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
unsigned minute = memory::cartrtc.read( 2) + memory::cartrtc.read( 3) * 10;
unsigned hour = memory::cartrtc.read( 4) + memory::cartrtc.read( 5) * 10;
unsigned day = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
unsigned month = memory::cartrtc.read( 8) + memory::cartrtc.read( 9) * 10;
unsigned year = memory::cartrtc.read(10) + memory::cartrtc.read(11) * 10;
unsigned weekday = memory::cartrtc.read(12);
day--;
month--;
year += (year >= 90) ? 1900 : 2000; //range = 1990-2089
second += (unsigned)(current_time - rtc_time);
while(second >= 60) {
second -= 60;
minute++;
if(minute < 60) continue;
minute = 0;
hour++;
if(hour < 24) continue;
hour = 0;
day++;
weekday = (weekday + 1) % 7;
unsigned days = months[month % 12];
if(days == 28) {
bool leapyear = false;
if((year % 4) == 0) {
leapyear = true;
if((year % 100) == 0 && (year % 400) != 0) leapyear = false;
}
if(leapyear) days++;
}
if(day < days) continue;
day = 0;
month++;
if(month < 12) continue;
month = 0;
year++;
}
day++;
month++;
year %= 100;
memory::cartrtc.write( 0, second % 10);
memory::cartrtc.write( 1, second / 10);
memory::cartrtc.write( 2, minute % 10);
memory::cartrtc.write( 3, minute / 10);
memory::cartrtc.write( 4, hour % 10);
memory::cartrtc.write( 5, hour / 10);
memory::cartrtc.write( 6, day % 10);
memory::cartrtc.write( 7, day / 10);
memory::cartrtc.write( 8, month % 10);
memory::cartrtc.write( 9, month / 10);
memory::cartrtc.write(10, year % 10);
memory::cartrtc.write(11, (year / 10) % 10);
memory::cartrtc.write(12, weekday % 7);
}
memory::cartrtc.write(16, current_time);
memory::cartrtc.write(17, current_time >> 8);
memory::cartrtc.write(18, current_time >> 16);
memory::cartrtc.write(19, current_time >> 24);
}
uint8 SPC7110::mmio_read(uint addr) {
addr &= 0xffff;
switch(addr) {
//==================
//decompression unit
//==================
case 0x4800: {
uint16 counter = (r4809 + (r480a << 8));
counter--;
r4809 = counter;
r480a = counter >> 8;
return decomp.read();
}
case 0x4801: return r4801;
case 0x4802: return r4802;
case 0x4803: return r4803;
case 0x4804: return r4804;
case 0x4805: return r4805;
case 0x4806: return r4806;
case 0x4807: return r4807;
case 0x4808: return r4808;
case 0x4809: return r4809;
case 0x480a: return r480a;
case 0x480b: return r480b;
case 0x480c: {
uint8 status = r480c;
r480c &= 0x7f;
return status;
}
//==============
//data port unit
//==============
case 0x4810: {
if(r481x != 0x07) return 0x00;
unsigned addr = data_pointer();
unsigned adjust = data_adjust();
if(r4818 & 8) adjust = (int16)adjust; //16-bit sign extend
unsigned adjustaddr = addr;
if(r4818 & 2) {
adjustaddr += adjust;
set_data_adjust(adjust + 1);
}
uint8 data = memory::cartrom.read(datarom_addr(adjustaddr));
if(!(r4818 & 2)) {
unsigned increment = (r4818 & 1) ? data_increment() : 1;
if(r4818 & 4) increment = (int16)increment; //16-bit sign extend
if((r4818 & 16) == 0) {
set_data_pointer(addr + increment);
} else {
set_data_adjust(adjust + increment);
}
}
return data;
}
case 0x4811: return r4811;
case 0x4812: return r4812;
case 0x4813: return r4813;
case 0x4814: return r4814;
case 0x4815: return r4815;
case 0x4816: return r4816;
case 0x4817: return r4817;
case 0x4818: return r4818;
case 0x481a: {
if(r481x != 0x07) return 0x00;
unsigned addr = data_pointer();
unsigned adjust = data_adjust();
if(r4818 & 8) adjust = (int16)adjust; //16-bit sign extend
uint8 data = memory::cartrom.read(datarom_addr(addr + adjust));
if((r4818 & 0x60) == 0x60) {
if((r4818 & 16) == 0) {
set_data_pointer(addr + adjust);
} else {
set_data_adjust(adjust + adjust);
}
}
return data;
}
//=========
//math unit
//=========
case 0x4820: return r4820;
case 0x4821: return r4821;
case 0x4822: return r4822;
case 0x4823: return r4823;
case 0x4824: return r4824;
case 0x4825: return r4825;
case 0x4826: return r4826;
case 0x4827: return r4827;
case 0x4828: return r4828;
case 0x4829: return r4829;
case 0x482a: return r482a;
case 0x482b: return r482b;
case 0x482c: return r482c;
case 0x482d: return r482d;
case 0x482e: return r482e;
case 0x482f: {
uint8 status = r482f;
r482f &= 0x7f;
return status;
}
//===================
//memory mapping unit
//===================
case 0x4830: return r4830;
case 0x4831: return r4831;
case 0x4832: return r4832;
case 0x4833: return r4833;
case 0x4834: return r4834;
//====================
//real-time clock unit
//====================
case 0x4840: return r4840;
case 0x4841: {
if(rtc_state == RTCS_Inactive || rtc_state == RTCS_ModeSelect) return 0x00;
r4842 = 0x80;
uint8 data = memory::cartrtc.read(rtc_index);
rtc_index = (rtc_index + 1) & 15;
return data;
}
case 0x4842: {
uint8 status = r4842;
r4842 &= 0x7f;
return status;
}
}
return cpu.regs.mdr;
}
void SPC7110::mmio_write(uint addr, uint8 data) {
addr &= 0xffff;
switch(addr) {
//==================
//decompression unit
//==================
case 0x4801: r4801 = data; break;
case 0x4802: r4802 = data; break;
case 0x4803: r4803 = data; break;
case 0x4804: r4804 = data; break;
case 0x4805: r4805 = data; break;
case 0x4806: {
r4806 = data;
unsigned table = (r4801 + (r4802 << 8) + (r4803 << 16));
unsigned index = (r4804 << 2);
unsigned length = (r4809 + (r480a << 8));
unsigned addr = datarom_addr(table + index);
unsigned mode = (memory::cartrom.read(addr + 0));
unsigned offset = (memory::cartrom.read(addr + 1) << 16)
+ (memory::cartrom.read(addr + 2) << 8)
+ (memory::cartrom.read(addr + 3) << 0);
decomp.init(mode, offset, (r4805 + (r4806 << 8)) << mode);
r480c = 0x80;
} break;
case 0x4807: r4807 = data; break;
case 0x4808: r4808 = data; break;
case 0x4809: r4809 = data; break;
case 0x480a: r480a = data; break;
case 0x480b: r480b = data; break;
//==============
//data port unit
//==============
case 0x4811: r4811 = data; r481x |= 0x01; break;
case 0x4812: r4812 = data; r481x |= 0x02; break;
case 0x4813: r4813 = data; r481x |= 0x04; break;
case 0x4814: {
r4814 = data;
r4814_latch = true;
if(!r4815_latch) break;
if(!(r4818 & 2)) break;
if(r4818 & 0x10) break;
if((r4818 & 0x60) == 0x20) {
unsigned increment = data_adjust() & 0xff;
if(r4818 & 8) increment = (int8)increment; //8-bit sign extend
set_data_pointer(data_pointer() + increment);
} else if((r4818 & 0x60) == 0x40) {
unsigned increment = data_adjust();
if(r4818 & 8) increment = (int16)increment; //16-bit sign extend
set_data_pointer(data_pointer() + increment);
}
} break;
case 0x4815: {
r4815 = data;
r4815_latch = true;
if(!r4814_latch) break;
if(!(r4818 & 2)) break;
if(r4818 & 0x10) break;
if((r4818 & 0x60) == 0x20) {
unsigned increment = data_adjust() & 0xff;
if(r4818 & 8) increment = (int8)increment; //8-bit sign extend
set_data_pointer(data_pointer() + increment);
} else if((r4818 & 0x60) == 0x40) {
unsigned increment = data_adjust();
if(r4818 & 8) increment = (int16)increment; //16-bit sign extend
set_data_pointer(data_pointer() + increment);
}
} break;
case 0x4816: r4816 = data; break;
case 0x4817: r4817 = data; break;
case 0x4818: {
if(r481x != 0x07) break;
r4818 = data;
r4814_latch = r4815_latch = false;
} break;
//=========
//math unit
//=========
case 0x4820: r4820 = data; break;
case 0x4821: r4821 = data; break;
case 0x4822: r4822 = data; break;
case 0x4823: r4823 = data; break;
case 0x4824: r4824 = data; break;
case 0x4825: {
r4825 = data;
if(r482e & 1) {
//signed 16-bit x 16-bit multiplication
int16 r0 = (int16)(r4824 + (r4825 << 8));
int16 r1 = (int16)(r4820 + (r4821 << 8));
signed result = r0 * r1;
r4828 = result;
r4829 = result >> 8;
r482a = result >> 16;
r482b = result >> 24;
} else {
//unsigned 16-bit x 16-bit multiplication
uint16 r0 = (uint16)(r4824 + (r4825 << 8));
uint16 r1 = (uint16)(r4820 + (r4821 << 8));
unsigned result = r0 * r1;
r4828 = result;
r4829 = result >> 8;
r482a = result >> 16;
r482b = result >> 24;
}
r482f = 0x80;
} break;
case 0x4826: r4826 = data; break;
case 0x4827: {
r4827 = data;
if(r482e & 1) {
//signed 32-bit x 16-bit division
int32 dividend = (int32)(r4820 + (r4821 << 8) + (r4822 << 16) + (r4823 << 24));
int16 divisor = (int16)(r4826 + (r4827 << 8));
int32 quotient;
int16 remainder;
if(divisor) {
quotient = (int32)(dividend / divisor);
remainder = (int32)(dividend % divisor);
} else {
//illegal division by zero
quotient = 0;
remainder = dividend & 0xffff;
}
r4828 = quotient;
r4829 = quotient >> 8;
r482a = quotient >> 16;
r482b = quotient >> 24;
r482c = remainder;
r482d = remainder >> 8;
} else {
//unsigned 32-bit x 16-bit division
uint32 dividend = (uint32)(r4820 + (r4821 << 8) + (r4822 << 16) + (r4823 << 24));
uint16 divisor = (uint16)(r4826 + (r4827 << 8));
uint32 quotient;
uint16 remainder;
if(divisor) {
quotient = (uint32)(dividend / divisor);
remainder = (uint16)(dividend % divisor);
} else {
//illegal division by zero
quotient = 0;
remainder = dividend & 0xffff;
}
r4828 = quotient;
r4829 = quotient >> 8;
r482a = quotient >> 16;
r482b = quotient >> 24;
r482c = remainder;
r482d = remainder >> 8;
}
r482f = 0x80;
} break;
case 0x482e: {
//reset math unit
r4820 = r4821 = r4822 = r4823 = 0;
r4824 = r4825 = r4826 = r4827 = 0;
r4828 = r4829 = r482a = r482b = 0;
r482c = r482d = 0;
r482e = data;
} break;
//===================
//memory mapping unit
//===================
case 0x4830: r4830 = data; break;
case 0x4831: {
r4831 = data;
dx_offset = datarom_addr((data & 7) * 0x100000);
} break;
case 0x4832: {
r4832 = data;
ex_offset = datarom_addr((data & 7) * 0x100000);
} break;
case 0x4833: {
r4833 = data;
fx_offset = datarom_addr((data & 7) * 0x100000);
} break;
case 0x4834: r4834 = data; break;
//====================
//real-time clock unit
//====================
case 0x4840: {
r4840 = data;
if(!(r4840 & 1)) {
//disable RTC
rtc_state = RTCS_Inactive;
update_time();
} else {
//enable RTC
r4842 = 0x80;
rtc_state = RTCS_ModeSelect;
}
} break;
case 0x4841: {
r4841 = data;
switch(rtc_state) {
case RTCS_ModeSelect: {
if(data == RTCM_Linear || data == RTCM_Indexed) {
r4842 = 0x80;
rtc_state = RTCS_IndexSelect;
rtc_mode = (RTC_Mode)data;
rtc_index = 0;
}
} break;
case RTCS_IndexSelect: {
r4842 = 0x80;
rtc_index = data & 15;
if(rtc_mode == RTCM_Linear) rtc_state = RTCS_Write;
} break;
case RTCS_Write: {
r4842 = 0x80;
//control register 0
if(rtc_index == 13) {
//increment second counter
if(data & 2) update_time(+1);
//round minute counter
if(data & 8) {
update_time();
unsigned second = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
//clear seconds
memory::cartrtc.write(0, 0);
memory::cartrtc.write(1, 0);
if(second >= 30) update_time(+60);
}
}
//control register 2
if(rtc_index == 15) {
//disable timer and clear second counter
if((data & 1) && !(memory::cartrtc.read(15) & 1)) {
update_time();
//clear seconds
memory::cartrtc.write(0, 0);
memory::cartrtc.write(1, 0);
}
//disable timer
if((data & 2) && !(memory::cartrtc.read(15) & 2)) {
update_time();
}
}
memory::cartrtc.write(rtc_index, data & 15);
rtc_index = (rtc_index + 1) & 15;
} break;
} //switch(rtc_state)
} break;
}
}
uint8 SPC7110::read(uint addr) {
//$[00-0f|80-8f]:[8000-ffff], $[c0-cf]:[0000-ffff] mapped directly to memory::cartrom
if((addr & 0xffe000) == 0x006000 || (addr & 0xffe000) == 0x306000) {
//$[00|30]:[6000-7fff]
return memory::cartram.read(addr & 0x1fff);
}
if((addr & 0xff0000) == 0x500000) {
//$[50]:[0000-ffff]
return mmio_read(0x4800);
}
if((addr & 0xf00000) == 0xd00000) {
//$[d0-df]:[0000-ffff]
return memory::cartrom.read(dx_offset + (addr & 0x0fffff));
}
if((addr & 0xf00000) == 0xe00000) {
//$[e0-ef]:[0000-ffff]
return memory::cartrom.read(ex_offset + (addr & 0x0fffff));
}
if((addr & 0xf00000) == 0xf00000) {
//$[f0-ff]:[0000-ffff]
return memory::cartrom.read(fx_offset + (addr & 0x0fffff));
}
return cpu.regs.mdr;
}
void SPC7110::write(uint addr, uint8 data) {
if((addr & 0xffe000) == 0x006000 || (addr & 0xffe000) == 0x306000) {
//$[00|30]:[6000-7fff]
if(r4830 & 0x80) memory::cartram.write(addr & 0x1fff, data);
return;
}
}
SPC7110::SPC7110() {
}

133
src/chip/spc7110/spc7110.h Normal file
View File

@@ -0,0 +1,133 @@
/*****
* SPC7110 emulator - version 0.03 (2008-08-10)
* Copyright (c) 2008, byuu and neviksti
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* The software is provided "as is" and the author disclaims all warranties
* with regard to this software including all implied warranties of
* merchantibility and fitness, in no event shall the author be liable for
* any special, direct, indirect, or consequential damages or any damages
* whatsoever resulting from loss of use, data or profits, whether in an
* action of contract, negligence or other tortious action, arising out of
* or in connection with the use or performance of this software.
*****/
#include "decomp.h"
class SPC7110 : public MMIO, public Memory {
public:
void init();
void enable();
void power();
void reset();
unsigned datarom_addr(unsigned addr);
unsigned data_pointer();
unsigned data_adjust();
unsigned data_increment();
void set_data_pointer(unsigned addr);
void set_data_adjust(unsigned addr);
void update_time(int offset = 0);
time_t create_time();
uint8 mmio_read (uint addr);
void mmio_write(uint addr, uint8 data);
uint8 read (uint addr);
void write(uint addr, uint8 data);
//spc7110decomp
void decomp_init();
uint8 decomp_read();
SPC7110();
private:
//==================
//decompression unit
//==================
uint8 r4801; //compression table low
uint8 r4802; //compression table high
uint8 r4803; //compression table bank
uint8 r4804; //compression table index
uint8 r4805; //decompression buffer index low
uint8 r4806; //decompression buffer index high
uint8 r4807; //???
uint8 r4808; //???
uint8 r4809; //compression length low
uint8 r480a; //compression length high
uint8 r480b; //decompression control register
uint8 r480c; //decompression status
SPC7110Decomp decomp;
//==============
//data port unit
//==============
uint8 r4811; //data pointer low
uint8 r4812; //data pointer high
uint8 r4813; //data pointer bank
uint8 r4814; //data adjust low
uint8 r4815; //data adjust high
uint8 r4816; //data increment low
uint8 r4817; //data increment high
uint8 r4818; //data port control register
uint8 r481x;
bool r4814_latch;
bool r4815_latch;
//=========
//math unit
//=========
uint8 r4820; //16-bit multiplicand B0, 32-bit dividend B0
uint8 r4821; //16-bit multiplicand B1, 32-bit dividend B1
uint8 r4822; //32-bit dividend B2
uint8 r4823; //32-bit dividend B3
uint8 r4824; //16-bit multiplier B0
uint8 r4825; //16-bit multiplier B1
uint8 r4826; //16-bit divisor B0
uint8 r4827; //16-bit divisor B1
uint8 r4828; //32-bit product B0, 32-bit quotient B0
uint8 r4829; //32-bit product B1, 32-bit quotient B1
uint8 r482a; //32-bit product B2, 32-bit quotient B2
uint8 r482b; //32-bit product B3, 32-bit quotient B3
uint8 r482c; //16-bit remainder B0
uint8 r482d; //16-bit remainder B1
uint8 r482e; //math control register
uint8 r482f; //math status
//===================
//memory mapping unit
//===================
uint8 r4830; //SRAM write enable
uint8 r4831; //$[d0-df]:[0000-ffff] mapping
uint8 r4832; //$[e0-ef]:[0000-ffff] mapping
uint8 r4833; //$[f0-ff]:[0000-ffff] mapping
uint8 r4834; //???
unsigned dx_offset;
unsigned ex_offset;
unsigned fx_offset;
//====================
//real-time clock unit
//====================
uint8 r4840; //RTC latch
uint8 r4841; //RTC index/data port
uint8 r4842; //RTC status
enum RTC_State { RTCS_Inactive, RTCS_ModeSelect, RTCS_IndexSelect, RTCS_Write } rtc_state;
enum RTC_Mode { RTCM_Linear = 0x03, RTCM_Indexed = 0x0c } rtc_mode;
unsigned rtc_index;
static const unsigned months[12];
};
extern SPC7110 spc7110;

View File

@@ -1,189 +1,213 @@
/*
S-RTC chip emulation
Used by Hudson Soft in Dai Kaijuu Monogatari II and Far East of Eden Zero.
Currently, only the former is supported by bsnes.
Original S-RTC emulation code via John Weidman/SNES9x
Rewritten for compatibility with bsnes via byuu
The S-RTC is a real-time clock chip that was added to the above two carts
to allow the games to maintain the current time, even when the game was not
powered on. Thus allowing special events at certain times, and on certain
dates. Hudson Soft called this the PLG (Player's Life Gameplay System).
This chip is a special case to the term 'emulation' itself.
There are a few different ways to go about emulating this chip, and each
result in a different style of emulation.
The first is to simply return the current PC system time when the S-RTC is
read from. This emulates the original S-RTC in the sense that it always
returns the true current time, ignoring the speed that the SNES itself is
running at. The downside to this method is that you lose the ability to set
the time to whatever you choose inside the game itself. It will always return
the true time, regardless. This can be overcome by changing the PC system time,
which actually adds a greater degree of control over event timing, very useful
for emulation. It also has a timeshifting flaw discussed below.
The second is to run the S-RTC relative to the SNES speed. This means that
if the emulator is sped up (via fast forward key, frameskipping, etc), or
slowed down (via slowdown key, system bottlenecking, etc); the time increments
slower, thus ~60 frames on the SNES equal one second. Without this, timeshifting
will occur between the S-RTC and the real SNES.
The third and final method is to save a copy of the local system time when the
S-RTC is initially set, and compare the current system time against this value
when setting the S-RTC time. This overcomes the first methods' shortcoming of
not allowing the player to set the time in-game, however a new problem arises.
You now have to save the time when the RTC was initially set to both savestates
and to save-game data. This would require an extra file, or the breaking of
perhaps the only standard format (.srm savegame backups) in the entire SNES
emulation scene. You also give up the control of being able to override the
RTC clock at will via the PC system time outside of emulation.
The first method has another advantage over the third: Dai Kaijuu Monogatari II
only allows dates in the range of the years 1996-2199. The first method gets
around this limitation. But who knows, maybe it will break something in the
game if the date exceeds 2199... I guess we'll worry about that in two hundred
years from now.
For my implementation, I chose to go with the first method. Both for simplicity
and because I did not wish to create a new method for saving the system time
whenever the RTC is set.
*/
#include "../../base.h"
void SRTC::set_time() {
time_t rawtime;
tm *t;
::time(&rawtime);
t = localtime(&rawtime);
//see srtc.h for format of srtc.data[]
srtc.data[0] = t->tm_sec % 10;
srtc.data[1] = t->tm_sec / 10;
srtc.data[2] = t->tm_min % 10;
srtc.data[3] = t->tm_min / 10;
srtc.data[4] = t->tm_hour % 10;
srtc.data[5] = t->tm_hour / 10;
srtc.data[6] = t->tm_mday % 10;
srtc.data[7] = t->tm_mday / 10;
srtc.data[8] = t->tm_mon + 1;
srtc.data[9] = t->tm_year % 10;
srtc.data[10] = (t->tm_year / 10) % 10;
srtc.data[11] = 9 + (t->tm_year / 100);
srtc.data[12] = t->tm_wday;
}
void SRTC::init() {}
void SRTC::enable() {
memory::mmio.map(0x2800, *this);
memory::mmio.map(0x2801, *this);
}
void SRTC::power() {
memset(&srtc, 0, sizeof(srtc));
reset();
}
void SRTC::reset() {
srtc.index = -1;
srtc.mode = SRTC_READ;
}
uint8 SRTC::mmio_read(uint addr) {
switch(addr & 0xffff) {
case 0x2800: {
if(srtc.mode == SRTC_READ) {
if(srtc.index < 0) {
set_time();
srtc.index++;
return 0x0f; //send start message
} else if(srtc.index > MAX_SRTC_INDEX) {
srtc.index = -1;
return 0x0f; //send finished message
} else {
return srtc.data[srtc.index++];
}
} else {
return 0x00;
}
} break;
case 0x2801: {
} break;
}
return cpu.regs.mdr;
}
//Please see notes above about the implementation of the S-RTC
//Writes are stored the srtc.data[] array, but they are ignored
//as reads will refresh the data array with the current system
//time. The write method is only here for the sake of faux
//emulation of the real hardware.
void SRTC::mmio_write(uint addr, uint8 data) {
switch(addr & 0xffff) {
case 0x2800: {
} break;
case 0x2801: {
data &= 0x0f; //only the low four bits are used
if(data >= 0x0d) {
switch(data) {
case 0x0d:
srtc.mode = SRTC_READ;
srtc.index = -1;
break;
case 0x0e:
srtc.mode = SRTC_COMMAND;
break;
case 0x0f:
//unknown behaviour
break;
}
return;
}
if(srtc.mode == SRTC_WRITE) {
if(srtc.index >= 0 && srtc.index < MAX_SRTC_INDEX) {
srtc.data[srtc.index++] = data;
if(srtc.index == MAX_SRTC_INDEX) {
//all S-RTC data has been loaded by program
srtc.data[srtc.index++] = 0x00; //day_of_week
}
}
} else if(srtc.mode == SRTC_COMMAND) {
switch(data) {
case SRTC_COMMAND_CLEAR:
memset(srtc.data, 0, MAX_SRTC_INDEX + 1);
srtc.index = -1;
srtc.mode = SRTC_READY;
break;
case SRTC_COMMAND_WRITE:
srtc.index = 0;
srtc.mode = SRTC_WRITE;
break;
default:
//unknown behaviour
srtc.mode = SRTC_READY;
break;
}
} else {
if(srtc.mode == SRTC_READ) {
//ignore writes while in read mode
} else if(srtc.mode == SRTC_READY) {
//unknown behaviour
}
}
} break;
}
}
SRTC::SRTC() {}
#include "../../base.h"
const unsigned SRTC::months[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
void SRTC::init() {
}
void SRTC::enable() {
memory::mmio.map(0x2800, *this);
memory::mmio.map(0x2801, *this);
}
void SRTC::power() {
reset();
}
void SRTC::reset() {
rtc_mode = RTCM_Read;
rtc_index = -1;
update_time();
}
void SRTC::update_time() {
time_t rtc_time;
rtc_time = memory::cartrtc.read(16);
rtc_time |= memory::cartrtc.read(17) << 8;
rtc_time |= memory::cartrtc.read(18) << 16;
rtc_time |= memory::cartrtc.read(19) << 24;
time_t current_time = time(0);
if(current_time > rtc_time) {
unsigned second = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
unsigned minute = memory::cartrtc.read( 2) + memory::cartrtc.read( 3) * 10;
unsigned hour = memory::cartrtc.read( 4) + memory::cartrtc.read( 5) * 10;
unsigned day = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
unsigned month = memory::cartrtc.read( 8);
unsigned year = memory::cartrtc.read( 9) + memory::cartrtc.read(10) * 10 + memory::cartrtc.read(11) * 100;
unsigned weekday = memory::cartrtc.read(12);
day--;
month--;
year += 1000;
second += (unsigned)(current_time - rtc_time);
while(second >= 60) {
second -= 60;
minute++;
if(minute < 60) continue;
minute = 0;
hour++;
if(hour < 24) continue;
hour = 0;
day++;
weekday = (weekday + 1) % 7;
unsigned days = months[month % 12];
if(days == 28) {
bool leapyear = false;
if((year % 4) == 0) {
leapyear = true;
if((year % 100) == 0 && (year % 400) != 0) leapyear = false;
}
if(leapyear) days++;
}
if(day < days) continue;
day = 0;
month++;
if(month < 12) continue;
month = 0;
year++;
}
day++;
month++;
year -= 1000;
memory::cartrtc.write( 0, second % 10);
memory::cartrtc.write( 1, second / 10);
memory::cartrtc.write( 2, minute % 10);
memory::cartrtc.write( 3, minute / 10);
memory::cartrtc.write( 4, hour % 10);
memory::cartrtc.write( 5, hour / 10);
memory::cartrtc.write( 6, day % 10);
memory::cartrtc.write( 7, day / 10);
memory::cartrtc.write( 8, month);
memory::cartrtc.write( 9, year % 10);
memory::cartrtc.write(10, (year / 10) % 10);
memory::cartrtc.write(11, year / 100);
memory::cartrtc.write(12, weekday % 7);
}
memory::cartrtc.write(16, current_time);
memory::cartrtc.write(17, current_time >> 8);
memory::cartrtc.write(18, current_time >> 16);
memory::cartrtc.write(19, current_time >> 24);
}
//returns day of week for specified date
//eg 0 = Sunday, 1 = Monday, ... 6 = Saturday
//usage: weekday(2008, 1, 1) returns weekday of January 1st, 2008
unsigned SRTC::weekday(unsigned year, unsigned month, unsigned day) {
unsigned y = 1900, m = 1; //epoch is 1900-01-01
unsigned sum = 0; //number of days passed since epoch
year = max(1900, year);
month = max(1, min(12, month));
day = max(1, min(31, day));
while(y < year) {
bool leapyear = false;
if((y % 4) == 0) {
leapyear = true;
if((y % 100) == 0 && (y % 400) != 0) leapyear = false;
}
sum += leapyear ? 366 : 365;
y++;
}
while(m < month) {
unsigned days = months[m - 1];
if(days == 28) {
bool leapyear = false;
if((y % 4) == 0) {
leapyear = true;
if((y % 100) == 0 && (y % 400) != 0) leapyear = false;
}
if(leapyear) days++;
}
sum += days;
m++;
}
sum += day - 1;
return (sum + 1) % 7; //1900-01-01 was a Monday
}
uint8 SRTC::mmio_read(uint addr) {
addr &= 0xffff;
if(addr == 0x2800) {
if(rtc_mode != RTCM_Read) return 0x00;
if(rtc_index < 0) {
update_time();
rtc_index++;
return 0x0f;
} else if(rtc_index > 12) {
rtc_index = -1;
return 0x0f;
} else {
return memory::cartrtc.read(rtc_index++);
}
}
return cpu.regs.mdr;
}
void SRTC::mmio_write(uint addr, uint8 data) {
addr &= 0xffff;
if(addr == 0x2801) {
data &= 0x0f; //only the low four bits are used
if(data == 0x0d) {
rtc_mode = RTCM_Read;
rtc_index = -1;
return;
}
if(data == 0x0e) {
rtc_mode = RTCM_Command;
return;
}
if(data == 0x0f) return; //unknown behavior
if(rtc_mode == RTCM_Write) {
if(rtc_index >= 0 && rtc_index < 12) {
memory::cartrtc.write(rtc_index++, data);
if(rtc_index == 12) {
//day of week is automatically calculated and written
unsigned day = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
unsigned month = memory::cartrtc.read( 8);
unsigned year = memory::cartrtc.read( 9) + memory::cartrtc.read(10) * 10 + memory::cartrtc.read(11) * 100;
year += 1000;
memory::cartrtc.write(rtc_index++, weekday(year, month, day));
}
}
} else if(rtc_mode == RTCM_Command) {
if(data == 0) {
rtc_mode = RTCM_Write;
rtc_index = 0;
} else if(data == 4) {
rtc_mode = RTCM_Ready;
rtc_index = -1;
for(unsigned i = 0; i < 13; i++) memory::cartrtc.write(i, 0);
} else {
//unknown behavior
rtc_mode = RTCM_Ready;
}
}
}
}
SRTC::SRTC() {
}

View File

@@ -1,52 +1,22 @@
class SRTC : public MMIO {
public:
enum { MAX_SRTC_INDEX = 0x0c };
enum {
SRTC_READ = 0,
SRTC_WRITE,
SRTC_COMMAND,
SRTC_READY
};
enum {
SRTC_COMMAND_WRITE = 0,
SRTC_COMMAND_CLEAR = 4
};
/******************************
[srtc.data structure]
Index Description Range
----- ----------- -----
0 Seconds low 0-9
1 Seconds high 0-5
2 Minutes low 0-9
3 Minutes high 0-5
4 Hour low 0-9
5 Hour high 0-2
6 Day low 0-9
7 Day high 0-3
8 Month 1-12
9 Year ones 0-9
10 Year tens 0-9
11 Year hundreds 9-11 (9=19xx, 10=20xx, 11=21xx)
12 Day of week 0-6 (0=Sunday, ...)
******************************/
struct {
int8 index;
uint8 mode;
uint8 data[MAX_SRTC_INDEX + 1];
} srtc;
void set_time();
void init();
void enable();
void power();
void reset();
uint8 mmio_read (uint addr);
void mmio_write(uint addr, uint8 data);
SRTC();
};
extern SRTC srtc;
class SRTC : public MMIO {
public:
void update_time();
unsigned weekday(unsigned year, unsigned month, unsigned day);
void init();
void enable();
void power();
void reset();
uint8 mmio_read (uint addr);
void mmio_write(uint addr, uint8 data);
SRTC();
private:
static const unsigned months[12];
enum RTC_Mode { RTCM_Ready, RTCM_Command, RTCM_Read, RTCM_Write } rtc_mode;
signed rtc_index;
};
extern SRTC srtc;

View File

@@ -11,6 +11,14 @@ integral_setting File::autodetect_type(config(), "file.autodetect_type",
"identified as a .zip file. However, there is an infinitesimal (1:~500,000,000)\n"
"chance of a false detection when loading an uncompressed image file, if this\n"
"option is enabled.",
integral_setting::boolean, false);
integral_setting File::bypass_patch_crc32(config(), "file.bypass_patch_crc32",
"UPS patches contain CRC32s to validate that a patch was applied successfully.\n"
"By default, if this validation fails, said patch will not be applied.\n"
"Setting this option to true will bypass the validation,\n"
"which may or may not result in a working image.\n"
"Enabling this option is strongly discouraged.",
integral_setting::boolean, false);
string file_updatepath(const char *req_file, const char *req_path) {
@@ -36,10 +44,13 @@ string file_updatepath(const char *req_file, const char *req_path) {
return path;
}
string_setting Path::base("path.base",
"Path that bsnes resides in", "");
string_setting Path::base("path.base", "Path that bsnes resides in", "");
string_setting Path::user("path.user", "Path to user folder", "");
string_setting Path::rom(config(), "path.rom",
"Default path to look for ROM files in (\"\" = use default directory)", "");
"Default path to look for ROM files in (\"\" = use default directory)", "");
string_setting Path::patch(config(), "path.patch",
"Default path for all UPS patch files (\"\" = use current directory)", "");
string_setting Path::save(config(), "path.save",
"Default path for all save RAM files (\"\" = use current directory)", "");
string_setting Path::cheat(config(), "path.cheat",
@@ -47,15 +58,15 @@ string_setting Path::cheat(config(), "path.cheat",
string_setting Path::bsx(config(), "path.bsx", "", "");
string_setting Path::st(config(), "path.st", "", "");
integral_setting SNES::controller_port0(config(), "snes.controller_port_1",
"Controller attached to SNES port 1", integral_setting::decimal, ::SNES::Input::DeviceIDJoypad1);
integral_setting SNES::controller_port1(config(), "snes.controller_port_2",
"Controller attached to SNES port 2", integral_setting::decimal, ::SNES::Input::DeviceIDJoypad2);
integral_setting SNES::controller_port1(config(), "snes.controller_port1",
"Controller attached to SNES port 1", integral_setting::decimal, ::SNES::Input::DeviceJoypad);
integral_setting SNES::controller_port2(config(), "snes.controller_port2",
"Controller attached to SNES port 2", integral_setting::decimal, ::SNES::Input::DeviceJoypad);
integral_setting CPU::ntsc_clock_rate(config(), "cpu.ntsc_clock_rate",
"NTSC S-CPU clock rate (in hz)", integral_setting::decimal, 21477272);
integral_setting CPU::pal_clock_rate(config(), "cpu.pal_clock_rate",
"PAL S-CPU clock rate (in hz)", integral_setting::decimal, 21281370);
"PAL S-CPU clock rate (in hz)", integral_setting::decimal, 21281370);
integral_setting CPU::wram_init_value(config(), "cpu.wram_init_value",
"Value to initialize 128k WRAM to upon power cycle.\n"
"Note that on real hardware, this value is undefined; meaning it can vary\n"
@@ -70,13 +81,10 @@ integral_setting CPU::wram_init_value(config(), "cpu.wram_init_value",
"which do not properly initialize WRAM upon power cycle.\n",
integral_setting::hex, 0x55);
integral_setting CPU::hdma_enable("cpu.hdma_enable",
"Enable HDMA effects", integral_setting::boolean, true);
integral_setting SMP::ntsc_clock_rate(config(), "smp.ntsc_clock_rate",
"NTSC S-SMP clock rate (in hz)", integral_setting::decimal, 24606720);
"NTSC S-SMP clock rate (in hz)", integral_setting::decimal, 32040 * 768);
integral_setting SMP::pal_clock_rate(config(), "smp.pal_clock_rate",
"PAL S-SMP clock rate (in hz)", integral_setting::decimal, 24606720);
"PAL S-SMP clock rate (in hz)", integral_setting::decimal, 32040 * 768);
integral_setting PPU::Hack::render_scanline_position(config(), "ppu.hack.render_scanline_position",
"Approximate HCLOCK position to render at for scanline-based renderers",

View File

@@ -6,22 +6,22 @@ string file_updatepath(const char*, const char*);
extern struct File {
static integral_setting autodetect_type;
static integral_setting bypass_patch_crc32;
} file;
extern struct Path {
static string_setting base, rom, save, cheat;
static string_setting base, user, rom, patch, save, cheat;
static string_setting bsx, st;
} path;
extern struct SNES {
static integral_setting controller_port0;
static integral_setting controller_port1;
static integral_setting controller_port2;
} snes;
extern struct CPU {
static integral_setting ntsc_clock_rate, pal_clock_rate;
static integral_setting wram_init_value;
static integral_setting hdma_enable;
} cpu;
extern struct SMP {

View File

@@ -4,7 +4,7 @@
#include "dcpu.cpp"
CPU::CPU() {
cpu_version = 1;
cpu_version = 2;
}
CPU::~CPU() {

View File

@@ -15,7 +15,8 @@ public:
virtual uint16 hcounter() = 0;
virtual uint16 hdot() = 0;
virtual uint8 pio_status() = 0;
virtual uint8 pio() = 0;
virtual bool joylatch() = 0;
virtual uint8 port_read(uint8 port) = 0;
virtual void port_write(uint8 port, uint8 value) = 0;

View File

@@ -1,19 +1,32 @@
template<int mask>
struct CPUFlag {
uint8 &data;
inline operator bool() const { return data & mask; }
inline CPUFlag& operator=(bool i) { data = (data & ~mask) | (-i & mask); return *this; }
CPUFlag(uint8 &data_) : data(data_) {}
};
class CPURegFlags {
public:
union {
uint8 data;
struct {
bool order_msb8(n:1, v:1, m:1, x:1, d:1, i:1, z:1, c:1);
};
};
public:
uint8 data;
CPUFlag<0x80> n;
CPUFlag<0x40> v;
CPUFlag<0x20> m;
CPUFlag<0x10> x;
CPUFlag<0x08> d;
CPUFlag<0x04> i;
CPUFlag<0x02> z;
CPUFlag<0x01> c;
inline operator unsigned() const { return data; }
template<typename T> inline unsigned operator = (const T i) { data = i; return data; }
template<typename T> inline unsigned operator |= (const T i) { data |= i; return data; }
template<typename T> inline unsigned operator ^= (const T i) { data ^= i; return data; }
template<typename T> inline unsigned operator &= (const T i) { data &= i; return data; }
inline unsigned operator = (unsigned i) { data = i; return data; }
inline unsigned operator |= (unsigned i) { data |= i; return data; }
inline unsigned operator ^= (unsigned i) { data ^= i; return data; }
inline unsigned operator &= (unsigned i) { data &= i; return data; }
CPURegFlags() : data(0) {}
CPURegFlags() : data(0), n(data), v(data), m(data), x(data), d(data), i(data), z(data), c(data) {}
};
class CPUReg16 {
@@ -24,17 +37,17 @@ public:
};
inline operator unsigned() const { return w; }
template<typename T> inline unsigned operator = (const T i) { w = i; return w; }
template<typename T> inline unsigned operator |= (const T i) { w |= i; return w; }
template<typename T> inline unsigned operator ^= (const T i) { w ^= i; return w; }
template<typename T> inline unsigned operator &= (const T i) { w &= i; return w; }
template<typename T> inline unsigned operator <<= (const T i) { w <<= i; return w; }
template<typename T> inline unsigned operator >>= (const T i) { w >>= i; return w; }
template<typename T> inline unsigned operator += (const T i) { w += i; return w; }
template<typename T> inline unsigned operator -= (const T i) { w -= i; return w; }
template<typename T> inline unsigned operator *= (const T i) { w *= i; return w; }
template<typename T> inline unsigned operator /= (const T i) { w /= i; return w; }
template<typename T> inline unsigned operator %= (const T i) { w %= i; return w; }
inline unsigned operator = (unsigned i) { w = i; return w; }
inline unsigned operator |= (unsigned i) { w |= i; return w; }
inline unsigned operator ^= (unsigned i) { w ^= i; return w; }
inline unsigned operator &= (unsigned i) { w &= i; return w; }
inline unsigned operator <<= (unsigned i) { w <<= i; return w; }
inline unsigned operator >>= (unsigned i) { w >>= i; return w; }
inline unsigned operator += (unsigned i) { w += i; return w; }
inline unsigned operator -= (unsigned i) { w -= i; return w; }
inline unsigned operator *= (unsigned i) { w *= i; return w; }
inline unsigned operator /= (unsigned i) { w /= i; return w; }
inline unsigned operator %= (unsigned i) { w %= i; return w; }
CPUReg16() : w(0) {}
};
@@ -48,17 +61,17 @@ public:
};
inline operator unsigned() const { return d; }
template<typename T> inline unsigned operator = (const T i) { d = uclip<24>(i); return d; }
template<typename T> inline unsigned operator |= (const T i) { d = uclip<24>(d | i); return d; }
template<typename T> inline unsigned operator ^= (const T i) { d = uclip<24>(d ^ i); return d; }
template<typename T> inline unsigned operator &= (const T i) { d = uclip<24>(d & i); return d; }
template<typename T> inline unsigned operator <<= (const T i) { d = uclip<24>(d << i); return d; }
template<typename T> inline unsigned operator >>= (const T i) { d = uclip<24>(d >> i); return d; }
template<typename T> inline unsigned operator += (const T i) { d = uclip<24>(d + i); return d; }
template<typename T> inline unsigned operator -= (const T i) { d = uclip<24>(d - i); return d; }
template<typename T> inline unsigned operator *= (const T i) { d = uclip<24>(d * i); return d; }
template<typename T> inline unsigned operator /= (const T i) { d = uclip<24>(d / i); return d; }
template<typename T> inline unsigned operator %= (const T i) { d = uclip<24>(d % i); return d; }
inline unsigned operator = (unsigned i) { d = uclip<24>(i); return d; }
inline unsigned operator |= (unsigned i) { d = uclip<24>(d | i); return d; }
inline unsigned operator ^= (unsigned i) { d = uclip<24>(d ^ i); return d; }
inline unsigned operator &= (unsigned i) { d = uclip<24>(d & i); return d; }
inline unsigned operator <<= (unsigned i) { d = uclip<24>(d << i); return d; }
inline unsigned operator >>= (unsigned i) { d = uclip<24>(d >> i); return d; }
inline unsigned operator += (unsigned i) { d = uclip<24>(d + i); return d; }
inline unsigned operator -= (unsigned i) { d = uclip<24>(d - i); return d; }
inline unsigned operator *= (unsigned i) { d = uclip<24>(d * i); return d; }
inline unsigned operator /= (unsigned i) { d = uclip<24>(d / i); return d; }
inline unsigned operator %= (unsigned i) { d = uclip<24>(d % i); return d; }
CPUReg24() : d(0) {}
};
@@ -70,6 +83,6 @@ public:
CPURegFlags p;
uint8 db;
uint8 mdr;
bool e;
CPURegs() : db(0), mdr(0x00), e(false) {}
bool e;
CPURegs() : db(0), mdr(0), e(false) {}
};

View File

@@ -1,3 +0,0 @@
cl /nologo /O2 scpugen.cpp
@pause
@del *.obj

4
src/cpu/scpu/core/cc.sh Normal file
View File

@@ -0,0 +1,4 @@
g++ -c scpugen.cpp -I../../../lib
g++ -c ../../../lib/nall/string.cpp -I../../../lib
g++ -o scpugen scpugen.o string.o
rm *.o

View File

@@ -1 +0,0 @@
@del *.exe

View File

@@ -0,0 +1 @@
rm scpugen

View File

@@ -2,12 +2,6 @@
#include "opfn.cpp"
#include "op_read.cpp"
#include "op_write.cpp"
#include "op_rmw.cpp"
#include "op_pc.cpp"
#include "op_misc.cpp"
void sCPU::enter() { loop:
if(event.irq) {
event.irq = false;
@@ -24,7 +18,13 @@ void sCPU::enter() { loop:
tracer.trace_cpuop(); //traces CPU opcode (only if tracer is enabled)
status.in_opcode = true;
(this->*optbl[op_readpc()])();
switch(op_readpc()) {
#include "op_read.cpp"
#include "op_write.cpp"
#include "op_rmw.cpp"
#include "op_pc.cpp"
#include "op_misc.cpp"
}
status.in_opcode = false;
goto loop;
@@ -43,6 +43,23 @@ void sCPU::op_irq() {
regs.p.d = 0;
rd.h = op_read(event.irq_vector + 1);
regs.pc.w = rd.w;
}
//immediate, 2-cycle opcodes with I/O cycle will become bus read
//when an IRQ is to be triggered immediately after opcode completion
//this affects the following opcodes:
// clc, cld, cli, clv, sec, sed, sei,
// tax, tay, txa, txy, tya, tyx,
// tcd, tcs, tdc, tsc, tsx, tcs,
// inc, inx, iny, dec, dex, dey,
// asl, lsr, rol, ror, nop, xce.
alwaysinline void sCPU::op_io_irq() {
if(event.irq) {
//IRQ pending, modify I/O cycle to bus read cycle, do not increment PC
op_read(regs.pc.d);
} else {
op_io();
}
}
alwaysinline void sCPU::op_io_cond2() {

View File

@@ -1,5 +1,3 @@
void (sCPU::*optbl[256])();
CPUReg24 aa, rd;
uint8_t dp, sp;
@@ -49,9 +47,8 @@
void op_trb_w();
void op_tsb_b();
void op_tsb_w();
void op_io_irq();
void op_io_cond2();
void op_io_cond4(uint16 x, uint16 y);
void op_io_cond6(uint16 addr);
#include "op.h"

View File

@@ -1,256 +0,0 @@
void op_adc_const();
void op_and_const();
void op_cmp_const();
void op_cpx_const();
void op_cpy_const();
void op_eor_const();
void op_lda_const();
void op_ldx_const();
void op_ldy_const();
void op_ora_const();
void op_sbc_const();
void op_adc_addr();
void op_and_addr();
void op_bit_addr();
void op_cmp_addr();
void op_cpx_addr();
void op_cpy_addr();
void op_eor_addr();
void op_lda_addr();
void op_ldx_addr();
void op_ldy_addr();
void op_ora_addr();
void op_sbc_addr();
void op_adc_addrx();
void op_and_addrx();
void op_bit_addrx();
void op_cmp_addrx();
void op_eor_addrx();
void op_lda_addrx();
void op_ldy_addrx();
void op_ora_addrx();
void op_sbc_addrx();
void op_adc_addry();
void op_and_addry();
void op_cmp_addry();
void op_eor_addry();
void op_lda_addry();
void op_ldx_addry();
void op_ora_addry();
void op_sbc_addry();
void op_adc_long();
void op_and_long();
void op_cmp_long();
void op_eor_long();
void op_lda_long();
void op_ora_long();
void op_sbc_long();
void op_adc_longx();
void op_and_longx();
void op_cmp_longx();
void op_eor_longx();
void op_lda_longx();
void op_ora_longx();
void op_sbc_longx();
void op_adc_dp();
void op_and_dp();
void op_bit_dp();
void op_cmp_dp();
void op_cpx_dp();
void op_cpy_dp();
void op_eor_dp();
void op_lda_dp();
void op_ldx_dp();
void op_ldy_dp();
void op_ora_dp();
void op_sbc_dp();
void op_adc_dpx();
void op_and_dpx();
void op_bit_dpx();
void op_cmp_dpx();
void op_eor_dpx();
void op_lda_dpx();
void op_ldy_dpx();
void op_ora_dpx();
void op_sbc_dpx();
void op_ldx_dpy();
void op_adc_idp();
void op_and_idp();
void op_cmp_idp();
void op_eor_idp();
void op_lda_idp();
void op_ora_idp();
void op_sbc_idp();
void op_adc_idpx();
void op_and_idpx();
void op_cmp_idpx();
void op_eor_idpx();
void op_lda_idpx();
void op_ora_idpx();
void op_sbc_idpx();
void op_adc_idpy();
void op_and_idpy();
void op_cmp_idpy();
void op_eor_idpy();
void op_lda_idpy();
void op_ora_idpy();
void op_sbc_idpy();
void op_adc_ildp();
void op_and_ildp();
void op_cmp_ildp();
void op_eor_ildp();
void op_lda_ildp();
void op_ora_ildp();
void op_sbc_ildp();
void op_adc_ildpy();
void op_and_ildpy();
void op_cmp_ildpy();
void op_eor_ildpy();
void op_lda_ildpy();
void op_ora_ildpy();
void op_sbc_ildpy();
void op_adc_sr();
void op_and_sr();
void op_cmp_sr();
void op_eor_sr();
void op_lda_sr();
void op_ora_sr();
void op_sbc_sr();
void op_adc_isry();
void op_and_isry();
void op_cmp_isry();
void op_eor_isry();
void op_lda_isry();
void op_ora_isry();
void op_sbc_isry();
void op_bit_const();
void op_sta_addr();
void op_stx_addr();
void op_sty_addr();
void op_stz_addr();
void op_sta_addrx();
void op_stz_addrx();
void op_sta_addry();
void op_sta_long();
void op_sta_longx();
void op_sta_dp();
void op_stx_dp();
void op_sty_dp();
void op_stz_dp();
void op_sta_dpx();
void op_sty_dpx();
void op_stz_dpx();
void op_stx_dpy();
void op_sta_idp();
void op_sta_ildp();
void op_sta_idpx();
void op_sta_idpy();
void op_sta_ildpy();
void op_sta_sr();
void op_sta_isry();
void op_inc();
void op_inx();
void op_iny();
void op_dec();
void op_dex();
void op_dey();
void op_asl();
void op_lsr();
void op_rol();
void op_ror();
void op_inc_addr();
void op_dec_addr();
void op_asl_addr();
void op_lsr_addr();
void op_rol_addr();
void op_ror_addr();
void op_trb_addr();
void op_tsb_addr();
void op_inc_addrx();
void op_dec_addrx();
void op_asl_addrx();
void op_lsr_addrx();
void op_rol_addrx();
void op_ror_addrx();
void op_inc_dp();
void op_dec_dp();
void op_asl_dp();
void op_lsr_dp();
void op_rol_dp();
void op_ror_dp();
void op_trb_dp();
void op_tsb_dp();
void op_inc_dpx();
void op_dec_dpx();
void op_asl_dpx();
void op_lsr_dpx();
void op_rol_dpx();
void op_ror_dpx();
void op_bcc();
void op_bcs();
void op_bne();
void op_beq();
void op_bpl();
void op_bmi();
void op_bvc();
void op_bvs();
void op_bra();
void op_brl();
void op_jmp_addr();
void op_jmp_long();
void op_jmp_iaddr();
void op_jmp_iaddrx();
void op_jmp_iladdr();
void op_jsr_addr();
void op_jsr_long();
void op_jsr_iaddrx();
void op_rti();
void op_rts();
void op_rtl();
void op_nop();
void op_wdm();
void op_xba();
void op_mvn();
void op_mvp();
void op_brk();
void op_cop();
void op_stp();
void op_wai();
void op_xce();
void op_clc();
void op_cld();
void op_cli();
void op_clv();
void op_sec();
void op_sed();
void op_sei();
void op_rep();
void op_sep();
void op_tax();
void op_tay();
void op_txa();
void op_txy();
void op_tya();
void op_tyx();
void op_tcd();
void op_tcs();
void op_tdc();
void op_tsc();
void op_tsx();
void op_txs();
void op_pha();
void op_phx();
void op_phy();
void op_phd();
void op_phb();
void op_phk();
void op_php();
void op_pla();
void op_plx();
void op_ply();
void op_pld();
void op_plb();
void op_plp();
void op_pea();
void op_pei();
void op_per();

View File

@@ -1,6 +1,6 @@
nop(0xea) {
1:last_cycle();
op_io();
1:last_cycle();
op_io_irq();
}
wdm(0x42) {
@@ -36,34 +36,33 @@ mvp(0x44, --) {
}
6:last_cycle();
op_io();
if(regs.a.w--)regs.pc.w -= 3;
if(regs.a.w--) regs.pc.w -= 3;
}
brk(0x00, 0xfffe, 0xffff, 0xffe6, 0xffe7),
cop(0x02, 0xfff4, 0xfff5, 0xffe4, 0xffe5) {
1:op_readpc();
2:if(!regs.e)op_writestack(regs.pc.b);
2:if(!regs.e) op_writestack(regs.pc.b);
3:op_writestack(regs.pc.h);
4:op_writestack(regs.pc.l);
5:op_writestack(regs.p);
6:rd.l = op_readlong((regs.e) ? $1 : $3);
6:rd.l = op_readlong(regs.e ? $1 : $3);
regs.pc.b = 0x00;
regs.p.i = 1;
regs.p.d = 0;
7:last_cycle();
rd.h = op_readlong((regs.e) ? $2 : $4);
rd.h = op_readlong(regs.e ? $2 : $4);
regs.pc.w = rd.w;
}
stp(0xdb) {
1:op_io();
2:last_cycle();
while(1) { op_io(); }
while(true) op_io();
}
wai(0xcb) {
//last_cycle() will set event.wai to false
//once an NMI / IRQ edge is reached
//last_cycle() will clear event.wai once an NMI / IRQ edge is reached
1:event.wai = true;
while(event.wai) {
last_cycle();
@@ -73,9 +72,9 @@ wai(0xcb) {
}
xce(0xfb) {
1:last_cycle();
op_io();
bool carry = regs.p.c;
1:last_cycle();
op_io_irq();
bool carry = regs.p.c;
regs.p.c = regs.e;
regs.e = carry;
if(regs.e) {
@@ -96,7 +95,7 @@ sec(0x38, regs.p.c = 1),
sed(0xf8, regs.p.d = 1),
sei(0x78, regs.p.i = 1) {
1:last_cycle();
op_io();
op_io_irq();
$1;
}
@@ -106,7 +105,7 @@ sep(0xe2, |=) {
2:last_cycle();
op_io();
regs.p $1 rd.l;
if(regs.e)regs.p |= 0x30;
if(regs.e) regs.p |= 0x30;
if(regs.p.x) {
regs.x.h = 0x00;
regs.y.h = 0x00;
@@ -120,7 +119,7 @@ txy(0x9b, regs.p.x, y, x),
tya(0x98, regs.p.m, a, y),
tyx(0xbb, regs.p.x, x, y) {
1:last_cycle();
op_io();
op_io_irq();
if($1) {
regs.$2.l = regs.$3.l;
regs.p.n = !!(regs.$2.l & 0x80);
@@ -134,7 +133,7 @@ tyx(0xbb, regs.p.x, x, y) {
tcd(0x5b) {
1:last_cycle();
op_io();
op_io_irq();
regs.d.w = regs.a.w;
regs.p.n = !!(regs.d.w & 0x8000);
regs.p.z = (regs.d.w == 0);
@@ -142,14 +141,14 @@ tcd(0x5b) {
tcs(0x1b) {
1:last_cycle();
op_io();
op_io_irq();
regs.s.w = regs.a.w;
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}
tdc(0x7b) {
1:last_cycle();
op_io();
op_io_irq();
regs.a.w = regs.d.w;
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
@@ -157,7 +156,7 @@ tdc(0x7b) {
tsc(0x3b) {
1:last_cycle();
op_io();
op_io_irq();
regs.a.w = regs.s.w;
if(regs.e) {
regs.p.n = !!(regs.a.l & 0x80);
@@ -170,7 +169,7 @@ tsc(0x3b) {
tsx(0xba) {
1:last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.x.l = regs.s.l;
regs.p.n = !!(regs.x.l & 0x80);
@@ -184,7 +183,7 @@ tsx(0xba) {
txs(0x9a) {
1:last_cycle();
op_io();
op_io_irq();
if(regs.e) {
regs.s.l = regs.x.l;
} else {
@@ -206,7 +205,7 @@ phd(0x0b) {
2:op_writestackn(regs.d.h);
3:last_cycle();
op_writestackn(regs.d.l);
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}
phb(0x8b, regs.db),
@@ -243,7 +242,7 @@ pld(0x2b) {
regs.d.h = op_readstackn();
regs.p.n = !!(regs.d.w & 0x8000);
regs.p.z = (regs.d.w == 0);
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}
plb(0xab) {
@@ -260,7 +259,7 @@ plp(0x28) {
2:op_io();
3:last_cycle();
regs.p = op_readstack();
if(regs.e)regs.p |= 0x30;
if(regs.e) regs.p |= 0x30;
if(regs.p.x) {
regs.x.h = 0x00;
regs.y.h = 0x00;
@@ -273,7 +272,7 @@ pea(0xf4) {
3:op_writestackn(aa.h);
4:last_cycle();
op_writestackn(aa.l);
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}
pei(0xd4) {
@@ -284,7 +283,7 @@ pei(0xd4) {
5:op_writestackn(aa.h);
6:last_cycle();
op_writestackn(aa.l);
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}
per(0x62) {
@@ -295,5 +294,5 @@ per(0x62) {
4:op_writestackn(rd.h);
5:last_cycle();
op_writestackn(rd.l);
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}

View File

@@ -1,14 +1,17 @@
void sCPU::op_nop() {
//nop
case 0xea: {
last_cycle();
op_io();
}
op_io_irq();
} break;
void sCPU::op_wdm() {
//wdm
case 0x42: {
last_cycle();
op_readpc();
}
} break;
void sCPU::op_xba() {
//xba
case 0xeb: {
op_io();
last_cycle();
op_io();
@@ -17,9 +20,10 @@ void sCPU::op_xba() {
regs.a.l ^= regs.a.h;
regs.p.n = !!(regs.a.l & 0x80);
regs.p.z = (regs.a.l == 0);
}
} break;
void sCPU::op_mvn() {
//mvn
case 0x54: {
dp = op_readpc();
sp = op_readpc();
regs.db = dp;
@@ -35,10 +39,11 @@ void sCPU::op_mvn() {
}
last_cycle();
op_io();
if(regs.a.w--)regs.pc.w -= 3;
}
if(regs.a.w--) regs.pc.w -= 3;
} break;
void sCPU::op_mvp() {
//mvp
case 0x44: {
dp = op_readpc();
sp = op_readpc();
regs.db = dp;
@@ -54,60 +59,64 @@ void sCPU::op_mvp() {
}
last_cycle();
op_io();
if(regs.a.w--)regs.pc.w -= 3;
}
if(regs.a.w--) regs.pc.w -= 3;
} break;
void sCPU::op_brk() {
//brk
case 0x00: {
op_readpc();
if(!regs.e)op_writestack(regs.pc.b);
if(!regs.e) op_writestack(regs.pc.b);
op_writestack(regs.pc.h);
op_writestack(regs.pc.l);
op_writestack(regs.p);
rd.l = op_readlong((regs.e) ? 0xfffe : 0xffe6);
rd.l = op_readlong(regs.e ? 0xfffe : 0xffe6);
regs.pc.b = 0x00;
regs.p.i = 1;
regs.p.d = 0;
last_cycle();
rd.h = op_readlong((regs.e) ? 0xffff : 0xffe7);
rd.h = op_readlong(regs.e ? 0xffff : 0xffe7);
regs.pc.w = rd.w;
}
} break;
void sCPU::op_cop() {
//cop
case 0x02: {
op_readpc();
if(!regs.e)op_writestack(regs.pc.b);
if(!regs.e) op_writestack(regs.pc.b);
op_writestack(regs.pc.h);
op_writestack(regs.pc.l);
op_writestack(regs.p);
rd.l = op_readlong((regs.e) ? 0xfff4 : 0xffe4);
rd.l = op_readlong(regs.e ? 0xfff4 : 0xffe4);
regs.pc.b = 0x00;
regs.p.i = 1;
regs.p.d = 0;
last_cycle();
rd.h = op_readlong((regs.e) ? 0xfff5 : 0xffe5);
rd.h = op_readlong(regs.e ? 0xfff5 : 0xffe5);
regs.pc.w = rd.w;
}
} break;
void sCPU::op_stp() {
//stp
case 0xdb: {
op_io();
last_cycle();
while(1) { op_io(); }
}
while(true) op_io();
} break;
void sCPU::op_wai() {
//last_cycle() will set event.wai to false
//once an NMI / IRQ edge is reached
//wai
case 0xcb: {
//last_cycle() will clear event.wai once an NMI / IRQ edge is reached
event.wai = true;
while(event.wai) {
last_cycle();
op_io();
}
op_io();
}
} break;
void sCPU::op_xce() {
//xce
case 0xfb: {
last_cycle();
op_io();
bool carry = regs.p.c;
op_io_irq();
bool carry = regs.p.c;
regs.p.c = regs.e;
regs.e = carry;
if(regs.e) {
@@ -118,77 +127,87 @@ bool carry = regs.p.c;
regs.x.h = 0x00;
regs.y.h = 0x00;
}
}
} break;
void sCPU::op_clc() {
//clc
case 0x18: {
last_cycle();
op_io();
op_io_irq();
regs.p.c = 0;
}
} break;
void sCPU::op_cld() {
//cld
case 0xd8: {
last_cycle();
op_io();
op_io_irq();
regs.p.d = 0;
}
} break;
void sCPU::op_cli() {
//cli
case 0x58: {
last_cycle();
op_io();
op_io_irq();
regs.p.i = 0;
}
} break;
void sCPU::op_clv() {
//clv
case 0xb8: {
last_cycle();
op_io();
op_io_irq();
regs.p.v = 0;
}
} break;
void sCPU::op_sec() {
//sec
case 0x38: {
last_cycle();
op_io();
op_io_irq();
regs.p.c = 1;
}
} break;
void sCPU::op_sed() {
//sed
case 0xf8: {
last_cycle();
op_io();
op_io_irq();
regs.p.d = 1;
}
} break;
void sCPU::op_sei() {
//sei
case 0x78: {
last_cycle();
op_io();
op_io_irq();
regs.p.i = 1;
}
} break;
void sCPU::op_rep() {
//rep
case 0xc2: {
rd.l = op_readpc();
last_cycle();
op_io();
regs.p &=~ rd.l;
if(regs.e)regs.p |= 0x30;
if(regs.e) regs.p |= 0x30;
if(regs.p.x) {
regs.x.h = 0x00;
regs.y.h = 0x00;
}
}
} break;
void sCPU::op_sep() {
//sep
case 0xe2: {
rd.l = op_readpc();
last_cycle();
op_io();
regs.p |= rd.l;
if(regs.e)regs.p |= 0x30;
if(regs.e) regs.p |= 0x30;
if(regs.p.x) {
regs.x.h = 0x00;
regs.y.h = 0x00;
}
}
} break;
void sCPU::op_tax() {
//tax
case 0xaa: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.x.l = regs.a.l;
regs.p.n = !!(regs.x.l & 0x80);
@@ -198,11 +217,12 @@ void sCPU::op_tax() {
regs.p.n = !!(regs.x.w & 0x8000);
regs.p.z = (regs.x.w == 0);
}
}
} break;
void sCPU::op_tay() {
//tay
case 0xa8: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.y.l = regs.a.l;
regs.p.n = !!(regs.y.l & 0x80);
@@ -212,11 +232,12 @@ void sCPU::op_tay() {
regs.p.n = !!(regs.y.w & 0x8000);
regs.p.z = (regs.y.w == 0);
}
}
} break;
void sCPU::op_txa() {
//txa
case 0x8a: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.m) {
regs.a.l = regs.x.l;
regs.p.n = !!(regs.a.l & 0x80);
@@ -226,11 +247,12 @@ void sCPU::op_txa() {
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_txy() {
//txy
case 0x9b: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.y.l = regs.x.l;
regs.p.n = !!(regs.y.l & 0x80);
@@ -240,11 +262,12 @@ void sCPU::op_txy() {
regs.p.n = !!(regs.y.w & 0x8000);
regs.p.z = (regs.y.w == 0);
}
}
} break;
void sCPU::op_tya() {
//tya
case 0x98: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.m) {
regs.a.l = regs.y.l;
regs.p.n = !!(regs.a.l & 0x80);
@@ -254,11 +277,12 @@ void sCPU::op_tya() {
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_tyx() {
//tyx
case 0xbb: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.x.l = regs.y.l;
regs.p.n = !!(regs.x.l & 0x80);
@@ -268,34 +292,38 @@ void sCPU::op_tyx() {
regs.p.n = !!(regs.x.w & 0x8000);
regs.p.z = (regs.x.w == 0);
}
}
} break;
void sCPU::op_tcd() {
//tcd
case 0x5b: {
last_cycle();
op_io();
op_io_irq();
regs.d.w = regs.a.w;
regs.p.n = !!(regs.d.w & 0x8000);
regs.p.z = (regs.d.w == 0);
}
} break;
void sCPU::op_tcs() {
//tcs
case 0x1b: {
last_cycle();
op_io();
op_io_irq();
regs.s.w = regs.a.w;
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;
void sCPU::op_tdc() {
//tdc
case 0x7b: {
last_cycle();
op_io();
op_io_irq();
regs.a.w = regs.d.w;
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
} break;
void sCPU::op_tsc() {
//tsc
case 0x3b: {
last_cycle();
op_io();
op_io_irq();
regs.a.w = regs.s.w;
if(regs.e) {
regs.p.n = !!(regs.a.l & 0x80);
@@ -304,11 +332,12 @@ void sCPU::op_tsc() {
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_tsx() {
//tsx
case 0xba: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.x.l = regs.s.l;
regs.p.n = !!(regs.x.l & 0x80);
@@ -318,66 +347,75 @@ void sCPU::op_tsx() {
regs.p.n = !!(regs.x.w & 0x8000);
regs.p.z = (regs.x.w == 0);
}
}
} break;
void sCPU::op_txs() {
//txs
case 0x9a: {
last_cycle();
op_io();
op_io_irq();
if(regs.e) {
regs.s.l = regs.x.l;
} else {
regs.s.w = regs.x.w;
}
}
} break;
void sCPU::op_pha() {
//pha
case 0x48: {
op_io();
if(!regs.p.m)op_writestack(regs.a.h);
last_cycle();
op_writestack(regs.a.l);
}
} break;
void sCPU::op_phx() {
//phx
case 0xda: {
op_io();
if(!regs.p.x)op_writestack(regs.x.h);
last_cycle();
op_writestack(regs.x.l);
}
} break;
void sCPU::op_phy() {
//phy
case 0x5a: {
op_io();
if(!regs.p.x)op_writestack(regs.y.h);
last_cycle();
op_writestack(regs.y.l);
}
} break;
void sCPU::op_phd() {
//phd
case 0x0b: {
op_io();
op_writestackn(regs.d.h);
last_cycle();
op_writestackn(regs.d.l);
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;
void sCPU::op_phb() {
//phb
case 0x8b: {
op_io();
last_cycle();
op_writestack(regs.db);
}
} break;
void sCPU::op_phk() {
//phk
case 0x4b: {
op_io();
last_cycle();
op_writestack(regs.pc.b);
}
} break;
void sCPU::op_php() {
//php
case 0x08: {
op_io();
last_cycle();
op_writestack(regs.p);
}
} break;
void sCPU::op_pla() {
//pla
case 0x68: {
op_io();
op_io();
if(regs.p.m)last_cycle();
@@ -385,15 +423,16 @@ void sCPU::op_pla() {
if(regs.p.m) {
regs.p.n = !!(regs.a.l & 0x80);
regs.p.z = (regs.a.l == 0);
return;
break;
}
last_cycle();
regs.a.h = op_readstack();
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
} break;
void sCPU::op_plx() {
//plx
case 0xfa: {
op_io();
op_io();
if(regs.p.x)last_cycle();
@@ -401,15 +440,16 @@ void sCPU::op_plx() {
if(regs.p.x) {
regs.p.n = !!(regs.x.l & 0x80);
regs.p.z = (regs.x.l == 0);
return;
break;
}
last_cycle();
regs.x.h = op_readstack();
regs.p.n = !!(regs.x.w & 0x8000);
regs.p.z = (regs.x.w == 0);
}
} break;
void sCPU::op_ply() {
//ply
case 0x7a: {
op_io();
op_io();
if(regs.p.x)last_cycle();
@@ -417,15 +457,16 @@ void sCPU::op_ply() {
if(regs.p.x) {
regs.p.n = !!(regs.y.l & 0x80);
regs.p.z = (regs.y.l == 0);
return;
break;
}
last_cycle();
regs.y.h = op_readstack();
regs.p.n = !!(regs.y.w & 0x8000);
regs.p.z = (regs.y.w == 0);
}
} break;
void sCPU::op_pld() {
//pld
case 0x2b: {
op_io();
op_io();
regs.d.l = op_readstackn();
@@ -433,40 +474,44 @@ void sCPU::op_pld() {
regs.d.h = op_readstackn();
regs.p.n = !!(regs.d.w & 0x8000);
regs.p.z = (regs.d.w == 0);
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;
void sCPU::op_plb() {
//plb
case 0xab: {
op_io();
op_io();
last_cycle();
regs.db = op_readstack();
regs.p.n = !!(regs.db & 0x80);
regs.p.z = (regs.db == 0);
}
} break;
void sCPU::op_plp() {
//plp
case 0x28: {
op_io();
op_io();
last_cycle();
regs.p = op_readstack();
if(regs.e)regs.p |= 0x30;
if(regs.e) regs.p |= 0x30;
if(regs.p.x) {
regs.x.h = 0x00;
regs.y.h = 0x00;
}
}
} break;
void sCPU::op_pea() {
//pea
case 0xf4: {
aa.l = op_readpc();
aa.h = op_readpc();
op_writestackn(aa.h);
last_cycle();
op_writestackn(aa.l);
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;
void sCPU::op_pei() {
//pei
case 0xd4: {
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp);
@@ -474,10 +519,11 @@ void sCPU::op_pei() {
op_writestackn(aa.h);
last_cycle();
op_writestackn(aa.l);
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;
void sCPU::op_per() {
//per
case 0x62: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
@@ -485,6 +531,6 @@ void sCPU::op_per() {
op_writestackn(rd.h);
last_cycle();
op_writestackn(rd.l);
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;

View File

@@ -6,7 +6,7 @@ bpl(0x10, !regs.p.n),
bmi(0x30, regs.p.n),
bvc(0x50, !regs.p.v),
bvs(0x70, regs.p.v) {
1:if(!$1)last_cycle();
1:if(!$1) last_cycle();
rd.l = op_readpc();
if($1) {
aa.w = regs.pc.d + (int8)rd.l;
@@ -102,7 +102,7 @@ jsr_long(0x22) {
7:last_cycle();
op_writestackn(regs.pc.l);
regs.pc.d = aa.d & 0xffffff;
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}
jsr_iaddrx(0xfc) {
@@ -115,20 +115,20 @@ jsr_iaddrx(0xfc) {
7:last_cycle();
rd.h = op_readpbr(aa.w + regs.x.w + 1);
regs.pc.w = rd.w;
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}
rti(0x40) {
1:op_io();
2:op_io();
3:regs.p = op_readstack();
if(regs.e)regs.p |= 0x30;
if(regs.e) regs.p |= 0x30;
if(regs.p.x) {
regs.x.h = 0x00;
regs.y.h = 0x00;
}
4:rd.l = op_readstack();
5:if(regs.e)last_cycle();
5:if(regs.e) last_cycle();
rd.h = op_readstack();
if(regs.e) {
regs.pc.w = rd.w;
@@ -159,5 +159,5 @@ rtl(0x6b) {
rd.b = op_readstackn();
regs.pc.d = rd.d & 0xffffff;
regs.pc.w++;
if(regs.e)regs.s.h = 0x01;
if(regs.e) regs.s.h = 0x01;
}

View File

@@ -1,157 +1,171 @@
void sCPU::op_bcc() {
if(!!regs.p.c)last_cycle();
//bcc
case 0x90: {
if(!!regs.p.c) last_cycle();
rd.l = op_readpc();
if(!regs.p.c) {
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
} else {
return;
break;
}
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_bcs() {
if(!regs.p.c)last_cycle();
//bcs
case 0xb0: {
if(!regs.p.c) last_cycle();
rd.l = op_readpc();
if(regs.p.c) {
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
} else {
return;
break;
}
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_bne() {
if(!!regs.p.z)last_cycle();
//bne
case 0xd0: {
if(!!regs.p.z) last_cycle();
rd.l = op_readpc();
if(!regs.p.z) {
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
} else {
return;
break;
}
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_beq() {
if(!regs.p.z)last_cycle();
//beq
case 0xf0: {
if(!regs.p.z) last_cycle();
rd.l = op_readpc();
if(regs.p.z) {
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
} else {
return;
break;
}
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_bpl() {
if(!!regs.p.n)last_cycle();
//bpl
case 0x10: {
if(!!regs.p.n) last_cycle();
rd.l = op_readpc();
if(!regs.p.n) {
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
} else {
return;
break;
}
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_bmi() {
if(!regs.p.n)last_cycle();
//bmi
case 0x30: {
if(!regs.p.n) last_cycle();
rd.l = op_readpc();
if(regs.p.n) {
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
} else {
return;
break;
}
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_bvc() {
if(!!regs.p.v)last_cycle();
//bvc
case 0x50: {
if(!!regs.p.v) last_cycle();
rd.l = op_readpc();
if(!regs.p.v) {
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
} else {
return;
break;
}
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_bvs() {
if(!regs.p.v)last_cycle();
//bvs
case 0x70: {
if(!regs.p.v) last_cycle();
rd.l = op_readpc();
if(regs.p.v) {
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
} else {
return;
break;
}
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_bra() {
//bra
case 0x80: {
rd.l = op_readpc();
aa.w = regs.pc.d + (int8)rd.l;
regs.pc.w = aa.w;
op_io_cond6(aa.w);
last_cycle();
op_io();
}
} break;
void sCPU::op_brl() {
//brl
case 0x82: {
rd.l = op_readpc();
rd.h = op_readpc();
last_cycle();
op_io();
regs.pc.w = regs.pc.d + (int16)rd.w;
}
} break;
void sCPU::op_jmp_addr() {
//jmp_addr
case 0x4c: {
rd.l = op_readpc();
last_cycle();
rd.h = op_readpc();
regs.pc.w = rd.w;
}
} break;
void sCPU::op_jmp_long() {
//jmp_long
case 0x5c: {
rd.l = op_readpc();
rd.h = op_readpc();
last_cycle();
rd.b = op_readpc();
regs.pc.d = rd.d & 0xffffff;
}
} break;
void sCPU::op_jmp_iaddr() {
//jmp_iaddr
case 0x6c: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readaddr(aa.w);
last_cycle();
rd.h = op_readaddr(aa.w + 1);
regs.pc.w = rd.w;
}
} break;
void sCPU::op_jmp_iaddrx() {
//jmp_iaddrx
case 0x7c: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
@@ -159,9 +173,10 @@ void sCPU::op_jmp_iaddrx() {
last_cycle();
rd.h = op_readpbr(aa.w + regs.x.w + 1);
regs.pc.w = rd.w;
}
} break;
void sCPU::op_jmp_iladdr() {
//jmp_iladdr
case 0xdc: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readaddr(aa.w);
@@ -169,9 +184,10 @@ void sCPU::op_jmp_iladdr() {
last_cycle();
rd.b = op_readaddr(aa.w + 2);
regs.pc.d = rd.d & 0xffffff;
}
} break;
void sCPU::op_jsr_addr() {
//jsr_addr
case 0x20: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
@@ -180,9 +196,10 @@ void sCPU::op_jsr_addr() {
last_cycle();
op_writestack(regs.pc.l);
regs.pc.w = aa.w;
}
} break;
void sCPU::op_jsr_long() {
//jsr_long
case 0x22: {
aa.l = op_readpc();
aa.h = op_readpc();
op_writestackn(regs.pc.b);
@@ -193,10 +210,11 @@ void sCPU::op_jsr_long() {
last_cycle();
op_writestackn(regs.pc.l);
regs.pc.d = aa.d & 0xffffff;
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;
void sCPU::op_jsr_iaddrx() {
//jsr_iaddrx
case 0xfc: {
aa.l = op_readpc();
op_writestackn(regs.pc.h);
op_writestackn(regs.pc.l);
@@ -206,31 +224,33 @@ void sCPU::op_jsr_iaddrx() {
last_cycle();
rd.h = op_readpbr(aa.w + regs.x.w + 1);
regs.pc.w = rd.w;
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;
void sCPU::op_rti() {
//rti
case 0x40: {
op_io();
op_io();
regs.p = op_readstack();
if(regs.e)regs.p |= 0x30;
if(regs.e) regs.p |= 0x30;
if(regs.p.x) {
regs.x.h = 0x00;
regs.y.h = 0x00;
}
rd.l = op_readstack();
if(regs.e)last_cycle();
if(regs.e) last_cycle();
rd.h = op_readstack();
if(regs.e) {
regs.pc.w = rd.w;
return;
break;
}
last_cycle();
rd.b = op_readstack();
regs.pc.d = rd.d & 0xffffff;
}
} break;
void sCPU::op_rts() {
//rts
case 0x60: {
op_io();
op_io();
rd.l = op_readstack();
@@ -239,9 +259,10 @@ void sCPU::op_rts() {
op_io();
regs.pc.w = rd.w;
regs.pc.w++;
}
} break;
void sCPU::op_rtl() {
//rtl
case 0x6b: {
op_io();
op_io();
rd.l = op_readstackn();
@@ -250,6 +271,6 @@ void sCPU::op_rtl() {
rd.b = op_readstackn();
regs.pc.d = rd.d & 0xffffff;
regs.pc.w++;
if(regs.e)regs.s.h = 0x01;
}
if(regs.e) regs.s.h = 0x01;
} break;

View File

@@ -9,7 +9,7 @@ ldx_const(0xa2, ldx, regs.p.x),
ldy_const(0xa0, ldy, regs.p.x),
ora_const(0x09, ora, regs.p.m),
sbc_const(0xe9, sbc, regs.p.m) {
1:if($2)last_cycle();
1:if($2) last_cycle();
rd.l = op_readpc();
if($2) { op_$1_b(); end; }
2:last_cycle();
@@ -31,7 +31,7 @@ ora_addr(0x0d, ora, regs.p.m),
sbc_addr(0xed, sbc, regs.p.m) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:if($2)last_cycle();
3:if($2) last_cycle();
rd.l = op_readdbr(aa.w);
if($2) { op_$1_b(); end; }
4:last_cycle();
@@ -51,7 +51,7 @@ sbc_addrx(0xfd, sbc, regs.p.m) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:op_io_cond4(aa.w, aa.w + regs.x.w);
4:if($2)last_cycle();
4:if($2) last_cycle();
rd.l = op_readdbr(aa.w + regs.x.w);
if($2) { op_$1_b(); end; }
5:last_cycle();
@@ -70,7 +70,7 @@ sbc_addry(0xf9, sbc, regs.p.m) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:op_io_cond4(aa.w, aa.w + regs.y.w);
4:if($2)last_cycle();
4:if($2) last_cycle();
rd.l = op_readdbr(aa.w + regs.y.w);
if($2) { op_$1_b(); end; }
5:last_cycle();
@@ -88,7 +88,7 @@ sbc_long(0xef, sbc, regs.p.m) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:aa.b = op_readpc();
4:if($2)last_cycle();
4:if($2) last_cycle();
rd.l = op_readlong(aa.d);
if($2) { op_$1_b(); end; }
5:last_cycle();
@@ -106,7 +106,7 @@ sbc_longx(0xff, sbc, regs.p.m) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:aa.b = op_readpc();
4:if($2)last_cycle();
4:if($2) last_cycle();
rd.l = op_readlong(aa.d + regs.x.w);
if($2) { op_$1_b(); end; }
5:last_cycle();
@@ -128,7 +128,7 @@ ora_dp(0x05, ora, regs.p.m),
sbc_dp(0xe5, sbc, regs.p.m) {
1:dp = op_readpc();
2:op_io_cond2();
3:if($2)last_cycle();
3:if($2) last_cycle();
rd.l = op_readdp(dp);
if($2) { op_$1_b(); end; }
4:last_cycle();
@@ -148,7 +148,7 @@ sbc_dpx(0xf5, sbc, regs.p.m) {
1:dp = op_readpc();
2:op_io_cond2();
3:op_io();
4:if($2)last_cycle();
4:if($2) last_cycle();
rd.l = op_readdp(dp + regs.x.w);
if($2) { op_$1_b(); end; }
5:last_cycle();
@@ -160,7 +160,7 @@ ldx_dpy(0xb6, ldx, regs.p.x) {
1:dp = op_readpc();
2:op_io_cond2();
3:op_io();
4:if($2)last_cycle();
4:if($2) last_cycle();
rd.l = op_readdp(dp + regs.y.w);
if($2) { op_$1_b(); end; }
5:last_cycle();
@@ -179,7 +179,7 @@ sbc_idp(0xf2, sbc, regs.p.m) {
2:op_io_cond2();
3:aa.l = op_readdp(dp);
4:aa.h = op_readdp(dp + 1);
5:if($2)last_cycle();
5:if($2) last_cycle();
rd.l = op_readdbr(aa.w);
if($2) { op_$1_b(); end; }
6:last_cycle();
@@ -199,7 +199,7 @@ sbc_idpx(0xe1, sbc, regs.p.m) {
3:op_io();
4:aa.l = op_readdp(dp + regs.x.w);
5:aa.h = op_readdp(dp + regs.x.w + 1);
6:if($2)last_cycle();
6:if($2) last_cycle();
rd.l = op_readdbr(aa.w);
if($2) { op_$1_b(); end; }
7:last_cycle();
@@ -219,7 +219,7 @@ sbc_idpy(0xf1, sbc, regs.p.m) {
3:aa.l = op_readdp(dp);
4:aa.h = op_readdp(dp + 1);
5:op_io_cond4(aa.w, aa.w + regs.y.w);
6:if($2)last_cycle();
6:if($2) last_cycle();
rd.l = op_readdbr(aa.w + regs.y.w);
if($2) { op_$1_b(); end; }
7:last_cycle();
@@ -239,7 +239,7 @@ sbc_ildp(0xe7, sbc, regs.p.m) {
3:aa.l = op_readdp(dp);
4:aa.h = op_readdp(dp + 1);
5:aa.b = op_readdp(dp + 2);
6:if($2)last_cycle();
6:if($2) last_cycle();
rd.l = op_readlong(aa.d);
if($2) { op_$1_b(); end; }
7:last_cycle();
@@ -259,7 +259,7 @@ sbc_ildpy(0xf7, sbc, regs.p.m) {
3:aa.l = op_readdp(dp);
4:aa.h = op_readdp(dp + 1);
5:aa.b = op_readdp(dp + 2);
6:if($2)last_cycle();
6:if($2) last_cycle();
rd.l = op_readlong(aa.d + regs.y.w);
if($2) { op_$1_b(); end; }
7:last_cycle();
@@ -276,7 +276,7 @@ ora_sr(0x03, ora, regs.p.m),
sbc_sr(0xe3, sbc, regs.p.m) {
1:sp = op_readpc();
2:op_io();
3:if($2)last_cycle();
3:if($2) last_cycle();
rd.l = op_readsp(sp);
if($2) { op_$1_b(); end; }
4:last_cycle();
@@ -296,7 +296,7 @@ sbc_isry(0xf3, sbc) {
3:aa.l = op_readsp(sp);
4:aa.h = op_readsp(sp + 1);
5:op_io();
6:if(regs.p.m)last_cycle();
6:if(regs.p.m) last_cycle();
rd.l = op_readdbr(aa.w + regs.y.w);
if(regs.p.m) { op_$1_b(); end; }
7:last_cycle();
@@ -305,7 +305,7 @@ sbc_isry(0xf3, sbc) {
}
bit_const(0x89) {
1:if(regs.p.m)last_cycle();
1:if(regs.p.m) last_cycle();
rd.l = op_readpc();
if(regs.p.m) {
regs.p.z = ((rd.l & regs.a.l) == 0);

File diff suppressed because it is too large Load Diff

View File

@@ -2,7 +2,7 @@ inc(0x1a, regs.p.m, a),
inx(0xe8, regs.p.x, x),
iny(0xc8, regs.p.x, y) {
1:last_cycle();
op_io();
op_io_irq();
if($1) {
regs.$2.l++;
regs.p.n = !!(regs.$2.l & 0x80);
@@ -18,7 +18,7 @@ dec(0x3a, regs.p.m, a),
dex(0xca, regs.p.x, x),
dey(0x88, regs.p.x, y) {
1:last_cycle();
op_io();
op_io_irq();
if($1) {
regs.$2.l--;
regs.p.n = !!(regs.$2.l & 0x80);
@@ -32,7 +32,7 @@ dey(0x88, regs.p.x, y) {
asl(0x0a) {
1:last_cycle();
op_io();
op_io_irq();
if(regs.p.m) {
regs.p.c = !!(regs.a.l & 0x80);
regs.a.l <<= 1;
@@ -48,7 +48,7 @@ asl(0x0a) {
lsr(0x4a) {
1:last_cycle();
op_io();
op_io_irq();
if(regs.p.m) {
regs.p.c = regs.a.l & 1;
regs.a.l >>= 1;
@@ -64,7 +64,7 @@ lsr(0x4a) {
rol(0x2a) {
1:last_cycle();
op_io();
op_io_irq();
uint16 c = regs.p.c;
if(regs.p.m) {
regs.p.c = !!(regs.a.l & 0x80);
@@ -83,17 +83,17 @@ rol(0x2a) {
ror(0x6a) {
1:last_cycle();
op_io();
op_io_irq();
uint16 c;
if(regs.p.m) {
c = (regs.p.c)?0x80:0;
c = regs.p.c ? 0x80 : 0;
regs.p.c = regs.a.l & 1;
regs.a.l >>= 1;
regs.a.l |= c;
regs.p.n = !!(regs.a.l & 0x80);
regs.p.z = (regs.a.l == 0);
} else {
c = (regs.p.c)?0x8000:0;
c = regs.p.c ? 0x8000 : 0;
regs.p.c = regs.a.w & 1;
regs.a.w >>= 1;
regs.a.w |= c;
@@ -113,7 +113,7 @@ tsb_addr(0x0c, tsb) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:rd.l = op_readdbr(aa.w);
4:if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
4:if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
5:op_io();
if(regs.p.m) { op_$1_b(); }
else { op_$1_w();
@@ -132,7 +132,7 @@ ror_addrx(0x7e, ror) {
2:aa.h = op_readpc();
3:op_io();
4:rd.l = op_readdbr(aa.w + regs.x.w);
5:if(!regs.p.m)rd.h = op_readdbr(aa.w + regs.x.w + 1);
5:if(!regs.p.m) rd.h = op_readdbr(aa.w + regs.x.w + 1);
6:op_io();
if(regs.p.m) { op_$1_b(); }
else { op_$1_w();
@@ -152,7 +152,7 @@ tsb_dp(0x04, tsb) {
1:dp = op_readpc();
2:op_io_cond2();
3:rd.l = op_readdp(dp);
4:if(!regs.p.m)rd.h = op_readdp(dp + 1);
4:if(!regs.p.m) rd.h = op_readdp(dp + 1);
5:op_io();
if(regs.p.m) { op_$1_b(); }
else { op_$1_w();
@@ -171,7 +171,7 @@ ror_dpx(0x76, ror) {
2:op_io_cond2();
3:op_io();
4:rd.l = op_readdp(dp + regs.x.w);
5:if(!regs.p.m)rd.h = op_readdp(dp + regs.x.w + 1);
5:if(!regs.p.m) rd.h = op_readdp(dp + regs.x.w + 1);
6:op_io();
if(regs.p.m) { op_$1_b(); }
else { op_$1_w();

View File

@@ -1,6 +1,7 @@
void sCPU::op_inc() {
//inc
case 0x1a: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.m) {
regs.a.l++;
regs.p.n = !!(regs.a.l & 0x80);
@@ -10,11 +11,12 @@ void sCPU::op_inc() {
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_inx() {
//inx
case 0xe8: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.x.l++;
regs.p.n = !!(regs.x.l & 0x80);
@@ -24,11 +26,12 @@ void sCPU::op_inx() {
regs.p.n = !!(regs.x.w & 0x8000);
regs.p.z = (regs.x.w == 0);
}
}
} break;
void sCPU::op_iny() {
//iny
case 0xc8: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.y.l++;
regs.p.n = !!(regs.y.l & 0x80);
@@ -38,11 +41,12 @@ void sCPU::op_iny() {
regs.p.n = !!(regs.y.w & 0x8000);
regs.p.z = (regs.y.w == 0);
}
}
} break;
void sCPU::op_dec() {
//dec
case 0x3a: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.m) {
regs.a.l--;
regs.p.n = !!(regs.a.l & 0x80);
@@ -52,11 +56,12 @@ void sCPU::op_dec() {
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_dex() {
//dex
case 0xca: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.x.l--;
regs.p.n = !!(regs.x.l & 0x80);
@@ -66,11 +71,12 @@ void sCPU::op_dex() {
regs.p.n = !!(regs.x.w & 0x8000);
regs.p.z = (regs.x.w == 0);
}
}
} break;
void sCPU::op_dey() {
//dey
case 0x88: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.x) {
regs.y.l--;
regs.p.n = !!(regs.y.l & 0x80);
@@ -80,11 +86,12 @@ void sCPU::op_dey() {
regs.p.n = !!(regs.y.w & 0x8000);
regs.p.z = (regs.y.w == 0);
}
}
} break;
void sCPU::op_asl() {
//asl
case 0x0a: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.m) {
regs.p.c = !!(regs.a.l & 0x80);
regs.a.l <<= 1;
@@ -96,11 +103,12 @@ void sCPU::op_asl() {
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_lsr() {
//lsr
case 0x4a: {
last_cycle();
op_io();
op_io_irq();
if(regs.p.m) {
regs.p.c = regs.a.l & 1;
regs.a.l >>= 1;
@@ -112,11 +120,12 @@ void sCPU::op_lsr() {
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_rol() {
//rol
case 0x2a: {
last_cycle();
op_io();
op_io_irq();
uint16 c = regs.p.c;
if(regs.p.m) {
regs.p.c = !!(regs.a.l & 0x80);
@@ -131,402 +140,431 @@ void sCPU::op_rol() {
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_ror() {
//ror
case 0x6a: {
last_cycle();
op_io();
op_io_irq();
uint16 c;
if(regs.p.m) {
c = (regs.p.c)?0x80:0;
c = regs.p.c ? 0x80 : 0;
regs.p.c = regs.a.l & 1;
regs.a.l >>= 1;
regs.a.l |= c;
regs.p.n = !!(regs.a.l & 0x80);
regs.p.z = (regs.a.l == 0);
} else {
c = (regs.p.c)?0x8000:0;
c = regs.p.c ? 0x8000 : 0;
regs.p.c = regs.a.w & 1;
regs.a.w >>= 1;
regs.a.w |= c;
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
}
}
} break;
void sCPU::op_inc_addr() {
//inc_addr
case 0xee: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readdbr(aa.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
op_io();
if(regs.p.m) { op_inc_b(); }
else { op_inc_w();
op_writedbr(aa.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w, rd.l);
}
} break;
void sCPU::op_dec_addr() {
//dec_addr
case 0xce: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readdbr(aa.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
op_io();
if(regs.p.m) { op_dec_b(); }
else { op_dec_w();
op_writedbr(aa.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w, rd.l);
}
} break;
void sCPU::op_asl_addr() {
//asl_addr
case 0x0e: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readdbr(aa.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
op_io();
if(regs.p.m) { op_asl_b(); }
else { op_asl_w();
op_writedbr(aa.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w, rd.l);
}
} break;
void sCPU::op_lsr_addr() {
//lsr_addr
case 0x4e: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readdbr(aa.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
op_io();
if(regs.p.m) { op_lsr_b(); }
else { op_lsr_w();
op_writedbr(aa.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w, rd.l);
}
} break;
void sCPU::op_rol_addr() {
//rol_addr
case 0x2e: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readdbr(aa.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
op_io();
if(regs.p.m) { op_rol_b(); }
else { op_rol_w();
op_writedbr(aa.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w, rd.l);
}
} break;
void sCPU::op_ror_addr() {
//ror_addr
case 0x6e: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readdbr(aa.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
op_io();
if(regs.p.m) { op_ror_b(); }
else { op_ror_w();
op_writedbr(aa.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w, rd.l);
}
} break;
void sCPU::op_trb_addr() {
//trb_addr
case 0x1c: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readdbr(aa.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
op_io();
if(regs.p.m) { op_trb_b(); }
else { op_trb_w();
op_writedbr(aa.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w, rd.l);
}
} break;
void sCPU::op_tsb_addr() {
//tsb_addr
case 0x0c: {
aa.l = op_readpc();
aa.h = op_readpc();
rd.l = op_readdbr(aa.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + 1);
op_io();
if(regs.p.m) { op_tsb_b(); }
else { op_tsb_w();
op_writedbr(aa.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w, rd.l);
}
} break;
void sCPU::op_inc_addrx() {
//inc_addrx
case 0xfe: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
rd.l = op_readdbr(aa.w + regs.x.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + regs.x.w + 1);
op_io();
if(regs.p.m) { op_inc_b(); }
else { op_inc_w();
op_writedbr(aa.w + regs.x.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w + regs.x.w, rd.l);
}
} break;
void sCPU::op_dec_addrx() {
//dec_addrx
case 0xde: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
rd.l = op_readdbr(aa.w + regs.x.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + regs.x.w + 1);
op_io();
if(regs.p.m) { op_dec_b(); }
else { op_dec_w();
op_writedbr(aa.w + regs.x.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w + regs.x.w, rd.l);
}
} break;
void sCPU::op_asl_addrx() {
//asl_addrx
case 0x1e: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
rd.l = op_readdbr(aa.w + regs.x.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + regs.x.w + 1);
op_io();
if(regs.p.m) { op_asl_b(); }
else { op_asl_w();
op_writedbr(aa.w + regs.x.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w + regs.x.w, rd.l);
}
} break;
void sCPU::op_lsr_addrx() {
//lsr_addrx
case 0x5e: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
rd.l = op_readdbr(aa.w + regs.x.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + regs.x.w + 1);
op_io();
if(regs.p.m) { op_lsr_b(); }
else { op_lsr_w();
op_writedbr(aa.w + regs.x.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w + regs.x.w, rd.l);
}
} break;
void sCPU::op_rol_addrx() {
//rol_addrx
case 0x3e: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
rd.l = op_readdbr(aa.w + regs.x.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + regs.x.w + 1);
op_io();
if(regs.p.m) { op_rol_b(); }
else { op_rol_w();
op_writedbr(aa.w + regs.x.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w + regs.x.w, rd.l);
}
} break;
void sCPU::op_ror_addrx() {
//ror_addrx
case 0x7e: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
rd.l = op_readdbr(aa.w + regs.x.w);
if(!regs.p.m)rd.h = op_readdbr(aa.w + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdbr(aa.w + regs.x.w + 1);
op_io();
if(regs.p.m) { op_ror_b(); }
else { op_ror_w();
op_writedbr(aa.w + regs.x.w + 1, rd.h); }
last_cycle();
op_writedbr(aa.w + regs.x.w, rd.l);
}
} break;
void sCPU::op_inc_dp() {
//inc_dp
case 0xe6: {
dp = op_readpc();
op_io_cond2();
rd.l = op_readdp(dp);
if(!regs.p.m)rd.h = op_readdp(dp + 1);
if(!regs.p.m) rd.h = op_readdp(dp + 1);
op_io();
if(regs.p.m) { op_inc_b(); }
else { op_inc_w();
op_writedp(dp + 1, rd.h); }
last_cycle();
op_writedp(dp, rd.l);
}
} break;
void sCPU::op_dec_dp() {
//dec_dp
case 0xc6: {
dp = op_readpc();
op_io_cond2();
rd.l = op_readdp(dp);
if(!regs.p.m)rd.h = op_readdp(dp + 1);
if(!regs.p.m) rd.h = op_readdp(dp + 1);
op_io();
if(regs.p.m) { op_dec_b(); }
else { op_dec_w();
op_writedp(dp + 1, rd.h); }
last_cycle();
op_writedp(dp, rd.l);
}
} break;
void sCPU::op_asl_dp() {
//asl_dp
case 0x06: {
dp = op_readpc();
op_io_cond2();
rd.l = op_readdp(dp);
if(!regs.p.m)rd.h = op_readdp(dp + 1);
if(!regs.p.m) rd.h = op_readdp(dp + 1);
op_io();
if(regs.p.m) { op_asl_b(); }
else { op_asl_w();
op_writedp(dp + 1, rd.h); }
last_cycle();
op_writedp(dp, rd.l);
}
} break;
void sCPU::op_lsr_dp() {
//lsr_dp
case 0x46: {
dp = op_readpc();
op_io_cond2();
rd.l = op_readdp(dp);
if(!regs.p.m)rd.h = op_readdp(dp + 1);
if(!regs.p.m) rd.h = op_readdp(dp + 1);
op_io();
if(regs.p.m) { op_lsr_b(); }
else { op_lsr_w();
op_writedp(dp + 1, rd.h); }
last_cycle();
op_writedp(dp, rd.l);
}
} break;
void sCPU::op_rol_dp() {
//rol_dp
case 0x26: {
dp = op_readpc();
op_io_cond2();
rd.l = op_readdp(dp);
if(!regs.p.m)rd.h = op_readdp(dp + 1);
if(!regs.p.m) rd.h = op_readdp(dp + 1);
op_io();
if(regs.p.m) { op_rol_b(); }
else { op_rol_w();
op_writedp(dp + 1, rd.h); }
last_cycle();
op_writedp(dp, rd.l);
}
} break;
void sCPU::op_ror_dp() {
//ror_dp
case 0x66: {
dp = op_readpc();
op_io_cond2();
rd.l = op_readdp(dp);
if(!regs.p.m)rd.h = op_readdp(dp + 1);
if(!regs.p.m) rd.h = op_readdp(dp + 1);
op_io();
if(regs.p.m) { op_ror_b(); }
else { op_ror_w();
op_writedp(dp + 1, rd.h); }
last_cycle();
op_writedp(dp, rd.l);
}
} break;
void sCPU::op_trb_dp() {
//trb_dp
case 0x14: {
dp = op_readpc();
op_io_cond2();
rd.l = op_readdp(dp);
if(!regs.p.m)rd.h = op_readdp(dp + 1);
if(!regs.p.m) rd.h = op_readdp(dp + 1);
op_io();
if(regs.p.m) { op_trb_b(); }
else { op_trb_w();
op_writedp(dp + 1, rd.h); }
last_cycle();
op_writedp(dp, rd.l);
}
} break;
void sCPU::op_tsb_dp() {
//tsb_dp
case 0x04: {
dp = op_readpc();
op_io_cond2();
rd.l = op_readdp(dp);
if(!regs.p.m)rd.h = op_readdp(dp + 1);
if(!regs.p.m) rd.h = op_readdp(dp + 1);
op_io();
if(regs.p.m) { op_tsb_b(); }
else { op_tsb_w();
op_writedp(dp + 1, rd.h); }
last_cycle();
op_writedp(dp, rd.l);
}
} break;
void sCPU::op_inc_dpx() {
//inc_dpx
case 0xf6: {
dp = op_readpc();
op_io_cond2();
op_io();
rd.l = op_readdp(dp + regs.x.w);
if(!regs.p.m)rd.h = op_readdp(dp + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdp(dp + regs.x.w + 1);
op_io();
if(regs.p.m) { op_inc_b(); }
else { op_inc_w();
op_writedp(dp + regs.x.w + 1, rd.h); }
last_cycle();
op_writedp(dp + regs.x.w, rd.l);
}
} break;
void sCPU::op_dec_dpx() {
//dec_dpx
case 0xd6: {
dp = op_readpc();
op_io_cond2();
op_io();
rd.l = op_readdp(dp + regs.x.w);
if(!regs.p.m)rd.h = op_readdp(dp + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdp(dp + regs.x.w + 1);
op_io();
if(regs.p.m) { op_dec_b(); }
else { op_dec_w();
op_writedp(dp + regs.x.w + 1, rd.h); }
last_cycle();
op_writedp(dp + regs.x.w, rd.l);
}
} break;
void sCPU::op_asl_dpx() {
//asl_dpx
case 0x16: {
dp = op_readpc();
op_io_cond2();
op_io();
rd.l = op_readdp(dp + regs.x.w);
if(!regs.p.m)rd.h = op_readdp(dp + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdp(dp + regs.x.w + 1);
op_io();
if(regs.p.m) { op_asl_b(); }
else { op_asl_w();
op_writedp(dp + regs.x.w + 1, rd.h); }
last_cycle();
op_writedp(dp + regs.x.w, rd.l);
}
} break;
void sCPU::op_lsr_dpx() {
//lsr_dpx
case 0x56: {
dp = op_readpc();
op_io_cond2();
op_io();
rd.l = op_readdp(dp + regs.x.w);
if(!regs.p.m)rd.h = op_readdp(dp + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdp(dp + regs.x.w + 1);
op_io();
if(regs.p.m) { op_lsr_b(); }
else { op_lsr_w();
op_writedp(dp + regs.x.w + 1, rd.h); }
last_cycle();
op_writedp(dp + regs.x.w, rd.l);
}
} break;
void sCPU::op_rol_dpx() {
//rol_dpx
case 0x36: {
dp = op_readpc();
op_io_cond2();
op_io();
rd.l = op_readdp(dp + regs.x.w);
if(!regs.p.m)rd.h = op_readdp(dp + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdp(dp + regs.x.w + 1);
op_io();
if(regs.p.m) { op_rol_b(); }
else { op_rol_w();
op_writedp(dp + regs.x.w + 1, rd.h); }
last_cycle();
op_writedp(dp + regs.x.w, rd.l);
}
} break;
void sCPU::op_ror_dpx() {
//ror_dpx
case 0x76: {
dp = op_readpc();
op_io_cond2();
op_io();
rd.l = op_readdp(dp + regs.x.w);
if(!regs.p.m)rd.h = op_readdp(dp + regs.x.w + 1);
if(!regs.p.m) rd.h = op_readdp(dp + regs.x.w + 1);
op_io();
if(regs.p.m) { op_ror_b(); }
else { op_ror_w();
op_writedp(dp + regs.x.w + 1, rd.h); }
last_cycle();
op_writedp(dp + regs.x.w, rd.l);
}
} break;

View File

@@ -4,9 +4,9 @@ sty_addr(0x8c, regs.p.x, regs.y.w),
stz_addr(0x9c, regs.p.m, 0x0000) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:if($1)last_cycle();
3:if($1) last_cycle();
op_writedbr(aa.w, $2);
if($1)end;
if($1) end;
4:last_cycle();
op_writedbr(aa.w + 1, $2 >> 8);
}
@@ -16,9 +16,9 @@ stz_addrx(0x9e, regs.p.m, 0x0000) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:op_io();
4:if($1)last_cycle();
4:if($1) last_cycle();
op_writedbr(aa.w + regs.x.w, $2);
if($1)end;
if($1) end;
5:last_cycle();
op_writedbr(aa.w + regs.x.w + 1, $2 >> 8);
}
@@ -27,9 +27,9 @@ sta_addry(0x99) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:op_io();
4:if(regs.p.m)last_cycle();
4:if(regs.p.m) last_cycle();
op_writedbr(aa.w + regs.y.w, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
5:last_cycle();
op_writedbr(aa.w + regs.y.w + 1, regs.a.h);
}
@@ -38,9 +38,9 @@ sta_long(0x8f) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:aa.b = op_readpc();
4:if(regs.p.m)last_cycle();
4:if(regs.p.m) last_cycle();
op_writelong(aa.d, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
5:last_cycle();
op_writelong(aa.d + 1, regs.a.h);
}
@@ -49,9 +49,9 @@ sta_longx(0x9f) {
1:aa.l = op_readpc();
2:aa.h = op_readpc();
3:aa.b = op_readpc();
4:if(regs.p.m)last_cycle();
4:if(regs.p.m) last_cycle();
op_writelong(aa.d + regs.x.w, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
5:last_cycle();
op_writelong(aa.d + regs.x.w + 1, regs.a.h);
}
@@ -62,9 +62,9 @@ sty_dp(0x84, regs.p.x, regs.y.w),
stz_dp(0x64, regs.p.m, 0x0000) {
1:dp = op_readpc();
2:op_io_cond2();
3:if($1)last_cycle();
3:if($1) last_cycle();
op_writedp(dp, $2);
if($1)end;
if($1) end;
4:last_cycle();
op_writedp(dp + 1, $2 >> 8);
}
@@ -75,9 +75,9 @@ stz_dpx(0x74, regs.p.m, 0x0000) {
1:dp = op_readpc();
2:op_io_cond2();
3:op_io();
4:if($1)last_cycle();
4:if($1) last_cycle();
op_writedp(dp + regs.x.w, $2);
if($1)end;
if($1) end;
5:last_cycle();
op_writedp(dp + regs.x.w + 1, $2 >> 8);
}
@@ -86,9 +86,9 @@ stx_dpy(0x96) {
1:dp = op_readpc();
2:op_io_cond2();
3:op_io();
4:if(regs.p.x)last_cycle();
4:if(regs.p.x) last_cycle();
op_writedp(dp + regs.y.w, regs.x.l);
if(regs.p.x)end;
if(regs.p.x) end;
5:last_cycle();
op_writedp(dp + regs.y.w + 1, regs.x.h);
}
@@ -98,9 +98,9 @@ sta_idp(0x92) {
2:op_io_cond2();
3:aa.l = op_readdp(dp);
4:aa.h = op_readdp(dp + 1);
5:if(regs.p.m)last_cycle();
5:if(regs.p.m) last_cycle();
op_writedbr(aa.w, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
6:last_cycle();
op_writedbr(aa.w + 1, regs.a.h);
}
@@ -111,9 +111,9 @@ sta_ildp(0x87) {
3:aa.l = op_readdp(dp);
4:aa.h = op_readdp(dp + 1);
5:aa.b = op_readdp(dp + 2);
6:if(regs.p.m)last_cycle();
6:if(regs.p.m) last_cycle();
op_writelong(aa.d, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
7:last_cycle();
op_writelong(aa.d + 1, regs.a.h);
}
@@ -124,9 +124,9 @@ sta_idpx(0x81) {
3:op_io();
4:aa.l = op_readdp(dp + regs.x.w);
5:aa.h = op_readdp(dp + regs.x.w + 1);
6:if(regs.p.m)last_cycle();
6:if(regs.p.m) last_cycle();
op_writedbr(aa.w, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
7:last_cycle();
op_writedbr(aa.w + 1, regs.a.h);
}
@@ -137,9 +137,9 @@ sta_idpy(0x91) {
3:aa.l = op_readdp(dp);
4:aa.h = op_readdp(dp + 1);
5:op_io();
6:if(regs.p.m)last_cycle();
6:if(regs.p.m) last_cycle();
op_writedbr(aa.w + regs.y.w, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
7:last_cycle();
op_writedbr(aa.w + regs.y.w + 1, regs.a.h);
}
@@ -150,9 +150,9 @@ sta_ildpy(0x97) {
3:aa.l = op_readdp(dp);
4:aa.h = op_readdp(dp + 1);
5:aa.b = op_readdp(dp + 2);
6:if(regs.p.m)last_cycle();
6:if(regs.p.m) last_cycle();
op_writelong(aa.d + regs.y.w, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
7:last_cycle();
op_writelong(aa.d + regs.y.w + 1, regs.a.h);
}
@@ -160,9 +160,9 @@ sta_ildpy(0x97) {
sta_sr(0x83) {
1:sp = op_readpc();
2:op_io();
3:if(regs.p.m)last_cycle();
3:if(regs.p.m) last_cycle();
op_writesp(sp, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
4:last_cycle();
op_writesp(sp + 1, regs.a.h);
}
@@ -173,9 +173,9 @@ sta_isry(0x93) {
3:aa.l = op_readsp(sp);
4:aa.h = op_readsp(sp + 1);
5:op_io();
6:if(regs.p.m)last_cycle();
6:if(regs.p.m) last_cycle();
op_writedbr(aa.w + regs.y.w, regs.a.l);
if(regs.p.m)end;
if(regs.p.m) end;
7:last_cycle();
op_writedbr(aa.w + regs.y.w + 1, regs.a.h);
}

View File

@@ -1,266 +1,290 @@
void sCPU::op_sta_addr() {
//sta_addr
case 0x8d: {
aa.l = op_readpc();
aa.h = op_readpc();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w, regs.a.w);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + 1, regs.a.w >> 8);
}
} break;
void sCPU::op_stx_addr() {
//stx_addr
case 0x8e: {
aa.l = op_readpc();
aa.h = op_readpc();
if(regs.p.x)last_cycle();
if(regs.p.x) last_cycle();
op_writedbr(aa.w, regs.x.w);
if(regs.p.x)return;
if(regs.p.x) break;
last_cycle();
op_writedbr(aa.w + 1, regs.x.w >> 8);
}
} break;
void sCPU::op_sty_addr() {
//sty_addr
case 0x8c: {
aa.l = op_readpc();
aa.h = op_readpc();
if(regs.p.x)last_cycle();
if(regs.p.x) last_cycle();
op_writedbr(aa.w, regs.y.w);
if(regs.p.x)return;
if(regs.p.x) break;
last_cycle();
op_writedbr(aa.w + 1, regs.y.w >> 8);
}
} break;
void sCPU::op_stz_addr() {
//stz_addr
case 0x9c: {
aa.l = op_readpc();
aa.h = op_readpc();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w, 0x0000);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + 1, 0x0000 >> 8);
}
} break;
void sCPU::op_sta_addrx() {
//sta_addrx
case 0x9d: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w + regs.x.w, regs.a.w);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + regs.x.w + 1, regs.a.w >> 8);
}
} break;
void sCPU::op_stz_addrx() {
//stz_addrx
case 0x9e: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w + regs.x.w, 0x0000);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + regs.x.w + 1, 0x0000 >> 8);
}
} break;
void sCPU::op_sta_addry() {
//sta_addry
case 0x99: {
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w + regs.y.w, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + regs.y.w + 1, regs.a.h);
}
} break;
void sCPU::op_sta_long() {
//sta_long
case 0x8f: {
aa.l = op_readpc();
aa.h = op_readpc();
aa.b = op_readpc();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writelong(aa.d, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writelong(aa.d + 1, regs.a.h);
}
} break;
void sCPU::op_sta_longx() {
//sta_longx
case 0x9f: {
aa.l = op_readpc();
aa.h = op_readpc();
aa.b = op_readpc();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writelong(aa.d + regs.x.w, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writelong(aa.d + regs.x.w + 1, regs.a.h);
}
} break;
void sCPU::op_sta_dp() {
//sta_dp
case 0x85: {
dp = op_readpc();
op_io_cond2();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedp(dp, regs.a.w);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedp(dp + 1, regs.a.w >> 8);
}
} break;
void sCPU::op_stx_dp() {
//stx_dp
case 0x86: {
dp = op_readpc();
op_io_cond2();
if(regs.p.x)last_cycle();
if(regs.p.x) last_cycle();
op_writedp(dp, regs.x.w);
if(regs.p.x)return;
if(regs.p.x) break;
last_cycle();
op_writedp(dp + 1, regs.x.w >> 8);
}
} break;
void sCPU::op_sty_dp() {
//sty_dp
case 0x84: {
dp = op_readpc();
op_io_cond2();
if(regs.p.x)last_cycle();
if(regs.p.x) last_cycle();
op_writedp(dp, regs.y.w);
if(regs.p.x)return;
if(regs.p.x) break;
last_cycle();
op_writedp(dp + 1, regs.y.w >> 8);
}
} break;
void sCPU::op_stz_dp() {
//stz_dp
case 0x64: {
dp = op_readpc();
op_io_cond2();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedp(dp, 0x0000);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedp(dp + 1, 0x0000 >> 8);
}
} break;
void sCPU::op_sta_dpx() {
//sta_dpx
case 0x95: {
dp = op_readpc();
op_io_cond2();
op_io();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedp(dp + regs.x.w, regs.a.w);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedp(dp + regs.x.w + 1, regs.a.w >> 8);
}
} break;
void sCPU::op_sty_dpx() {
//sty_dpx
case 0x94: {
dp = op_readpc();
op_io_cond2();
op_io();
if(regs.p.x)last_cycle();
if(regs.p.x) last_cycle();
op_writedp(dp + regs.x.w, regs.y.w);
if(regs.p.x)return;
if(regs.p.x) break;
last_cycle();
op_writedp(dp + regs.x.w + 1, regs.y.w >> 8);
}
} break;
void sCPU::op_stz_dpx() {
//stz_dpx
case 0x74: {
dp = op_readpc();
op_io_cond2();
op_io();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedp(dp + regs.x.w, 0x0000);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedp(dp + regs.x.w + 1, 0x0000 >> 8);
}
} break;
void sCPU::op_stx_dpy() {
//stx_dpy
case 0x96: {
dp = op_readpc();
op_io_cond2();
op_io();
if(regs.p.x)last_cycle();
if(regs.p.x) last_cycle();
op_writedp(dp + regs.y.w, regs.x.l);
if(regs.p.x)return;
if(regs.p.x) break;
last_cycle();
op_writedp(dp + regs.y.w + 1, regs.x.h);
}
} break;
void sCPU::op_sta_idp() {
//sta_idp
case 0x92: {
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp);
aa.h = op_readdp(dp + 1);
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + 1, regs.a.h);
}
} break;
void sCPU::op_sta_ildp() {
//sta_ildp
case 0x87: {
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp);
aa.h = op_readdp(dp + 1);
aa.b = op_readdp(dp + 2);
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writelong(aa.d, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writelong(aa.d + 1, regs.a.h);
}
} break;
void sCPU::op_sta_idpx() {
//sta_idpx
case 0x81: {
dp = op_readpc();
op_io_cond2();
op_io();
aa.l = op_readdp(dp + regs.x.w);
aa.h = op_readdp(dp + regs.x.w + 1);
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + 1, regs.a.h);
}
} break;
void sCPU::op_sta_idpy() {
//sta_idpy
case 0x91: {
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp);
aa.h = op_readdp(dp + 1);
op_io();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w + regs.y.w, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + regs.y.w + 1, regs.a.h);
}
} break;
void sCPU::op_sta_ildpy() {
//sta_ildpy
case 0x97: {
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp);
aa.h = op_readdp(dp + 1);
aa.b = op_readdp(dp + 2);
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writelong(aa.d + regs.y.w, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writelong(aa.d + regs.y.w + 1, regs.a.h);
}
} break;
void sCPU::op_sta_sr() {
//sta_sr
case 0x83: {
sp = op_readpc();
op_io();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writesp(sp, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writesp(sp + 1, regs.a.h);
}
} break;
void sCPU::op_sta_isry() {
//sta_isry
case 0x93: {
sp = op_readpc();
op_io();
aa.l = op_readsp(sp);
aa.h = op_readsp(sp + 1);
op_io();
if(regs.p.m)last_cycle();
if(regs.p.m) last_cycle();
op_writedbr(aa.w + regs.y.w, regs.a.l);
if(regs.p.m)return;
if(regs.p.m) break;
last_cycle();
op_writedbr(aa.w + regs.y.w + 1, regs.a.h);
}
} break;

View File

@@ -2,210 +2,204 @@
//op_read
inline void sCPU::op_adc_b() {
int32 r = regs.a.l + rd.l + regs.p.c;
int r;
if(regs.p.d) {
uint8 n0 = (regs.a.l ) & 15;
uint8 n1 = (regs.a.l >> 4) & 15;
n0 += ((rd.l) & 15) + regs.p.c;
uint8 n0 = (regs.a.l ) & 15;
uint8 n1 = (regs.a.l >> 4) & 15;
n0 += (rd.l & 15) + regs.p.c;
if(n0 > 9) {
n0 -= 10;
n0 &= 15;
n0 = (n0 - 10) & 15;
n1++;
}
n1 += ((rd.l >> 4) & 15);
if(n1 > 9) {
n1 -= 10;
n1 &= 15;
n1 = (n1 - 10) & 15;
regs.p.c = 1;
} else {
regs.p.c = 0;
}
r = (n1 << 4) | (n0);
r = (n1 << 4) | n0;
} else {
r = regs.a.l + rd.l + regs.p.c;
regs.p.c = (r > 0xff);
regs.p.c = r > 0xff;
}
regs.p.n = !!(r & 0x80);
regs.p.v = !!(~(regs.a.l ^ rd.l) & (regs.a.l ^ r) & 0x80);
regs.p.z = ((uint8)r == 0);
regs.p.n = r & 0x80;
regs.p.v = ~(regs.a.l ^ rd.l) & (regs.a.l ^ r) & 0x80;
regs.p.z = (uint8)r == 0;
regs.a.l = r;
}
inline void sCPU::op_adc_w() {
int32 r;
int r;
if(regs.p.d) {
uint8 n0 = (regs.a.w ) & 15;
uint8 n1 = (regs.a.w >> 4) & 15;
uint8 n2 = (regs.a.w >> 8) & 15;
uint8 n3 = (regs.a.w >> 12) & 15;
n0 += ((rd.w) & 15) + regs.p.c;
uint8 n0 = (regs.a.w ) & 15;
uint8 n1 = (regs.a.w >> 4) & 15;
uint8 n2 = (regs.a.w >> 8) & 15;
uint8 n3 = (regs.a.w >> 12) & 15;
n0 += (rd.w & 15) + regs.p.c;
if(n0 > 9) {
n0 -= 10;
n0 &= 15;
n0 = (n0 - 10) & 15;
n1++;
}
n1 += ((rd.w >> 4) & 15);
if(n1 > 9) {
n1 -= 10;
n1 &= 15;
n1 = (n1 - 10) & 15;
n2++;
}
n2 += ((rd.w >> 8) & 15);
if(n2 > 9) {
n2 -= 10;
n2 &= 15;
n2 = (n2 - 10) & 15;
n3++;
}
n3 += ((rd.w >> 12) & 15);
if(n3 > 9) {
n3 -= 10;
n3 &= 15;
n3 = (n3 - 10) & 15;
regs.p.c = 1;
} else {
regs.p.c = 0;
}
r = (n3 << 12) | (n2 << 8) | (n1 << 4) | (n0);
r = (n3 << 12) | (n2 << 8) | (n1 << 4) | n0;
} else {
r = regs.a.w + rd.w + regs.p.c;
regs.p.c = (r > 0xffff);
regs.p.c = r > 0xffff;
}
regs.p.n = !!(r & 0x8000);
regs.p.v = !!(~(regs.a.w ^ rd.w) & (regs.a.w ^ r) & 0x8000);
regs.p.z = ((uint16)r == 0);
regs.p.n = r & 0x8000;
regs.p.v = ~(regs.a.w ^ rd.w) & (regs.a.w ^ r) & 0x8000;
regs.p.z = (uint16)r == 0;
regs.a.w = r;
}
inline void sCPU::op_and_b() {
regs.a.l &= rd.l;
regs.p.n = !!(regs.a.l & 0x80);
regs.p.z = (regs.a.l == 0);
regs.p.n = regs.a.l & 0x80;
regs.p.z = regs.a.l == 0;
}
inline void sCPU::op_and_w() {
regs.a.w &= rd.w;
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
regs.p.n = regs.a.w & 0x8000;
regs.p.z = regs.a.w == 0;
}
inline void sCPU::op_bit_b() {
regs.p.n = !!(rd.l & 0x80);
regs.p.v = !!(rd.l & 0x40);
regs.p.z = ((rd.l & regs.a.l) == 0);
regs.p.n = rd.l & 0x80;
regs.p.v = rd.l & 0x40;
regs.p.z = (rd.l & regs.a.l) == 0;
}
inline void sCPU::op_bit_w() {
regs.p.n = !!(rd.w & 0x8000);
regs.p.v = !!(rd.w & 0x4000);
regs.p.z = ((rd.w & regs.a.w) == 0);
regs.p.n = rd.w & 0x8000;
regs.p.v = rd.w & 0x4000;
regs.p.z = (rd.w & regs.a.w) == 0;
}
inline void sCPU::op_cmp_b() {
int32 r = regs.a.l - rd.l;
regs.p.n = !!(r & 0x80);
regs.p.z = ((uint8)r == 0);
regs.p.c = (r >= 0);
int r = regs.a.l - rd.l;
regs.p.n = r & 0x80;
regs.p.z = (uint8)r == 0;
regs.p.c = r >= 0;
}
inline void sCPU::op_cmp_w() {
int32 r = regs.a.w - rd.w;
regs.p.n = !!(r & 0x8000);
regs.p.z = ((uint16)r == 0);
regs.p.c = (r >= 0);
int r = regs.a.w - rd.w;
regs.p.n = r & 0x8000;
regs.p.z = (uint16)r == 0;
regs.p.c = r >= 0;
}
inline void sCPU::op_cpx_b() {
int32 r = regs.x.l - rd.l;
regs.p.n = !!(r & 0x80);
regs.p.z = ((uint8)r == 0);
regs.p.c = (r >= 0);
int r = regs.x.l - rd.l;
regs.p.n = r & 0x80;
regs.p.z = (uint8)r == 0;
regs.p.c = r >= 0;
}
inline void sCPU::op_cpx_w() {
int32 r = regs.x.w - rd.w;
regs.p.n = !!(r & 0x8000);
regs.p.z = ((uint16)r == 0);
regs.p.c = (r >= 0);
int r = regs.x.w - rd.w;
regs.p.n = r & 0x8000;
regs.p.z = (uint16)r == 0;
regs.p.c = r >= 0;
}
inline void sCPU::op_cpy_b() {
int32 r = regs.y.l - rd.l;
regs.p.n = !!(r & 0x80);
regs.p.z = ((uint8)r == 0);
regs.p.c = (r >= 0);
int r = regs.y.l - rd.l;
regs.p.n = r & 0x80;
regs.p.z = (uint8)r == 0;
regs.p.c = r >= 0;
}
inline void sCPU::op_cpy_w() {
int32 r = regs.y.w - rd.w;
regs.p.n = !!(r & 0x8000);
regs.p.z = ((uint16)r == 0);
regs.p.c = (r >= 0);
int r = regs.y.w - rd.w;
regs.p.n = r & 0x8000;
regs.p.z = (uint16)r == 0;
regs.p.c = r >= 0;
}
inline void sCPU::op_eor_b() {
regs.a.l ^= rd.l;
regs.p.n = !!(regs.a.l & 0x80);
regs.p.z = (regs.a.l == 0);
regs.p.n = regs.a.l & 0x80;
regs.p.z = regs.a.l == 0;
}
inline void sCPU::op_eor_w() {
regs.a.w ^= rd.w;
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
regs.p.n = regs.a.w & 0x8000;
regs.p.z = regs.a.w == 0;
}
inline void sCPU::op_lda_b() {
regs.a.l = rd.l;
regs.p.n = !!(regs.a.l & 0x80);
regs.p.z = (regs.a.l == 0);
regs.p.n = regs.a.l & 0x80;
regs.p.z = regs.a.l == 0;
}
inline void sCPU::op_lda_w() {
regs.a.w = rd.w;
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
regs.p.n = regs.a.w & 0x8000;
regs.p.z = regs.a.w == 0;
}
inline void sCPU::op_ldx_b() {
regs.x.l = rd.l;
regs.p.n = !!(regs.x.l & 0x80);
regs.p.z = (regs.x.l == 0);
regs.p.n = regs.x.l & 0x80;
regs.p.z = regs.x.l == 0;
}
inline void sCPU::op_ldx_w() {
regs.x.w = rd.w;
regs.p.n = !!(regs.x.w & 0x8000);
regs.p.z = (regs.x.w == 0);
regs.p.n = regs.x.w & 0x8000;
regs.p.z = regs.x.w == 0;
}
inline void sCPU::op_ldy_b() {
regs.y.l = rd.l;
regs.p.n = !!(regs.y.l & 0x80);
regs.p.z = (regs.y.l == 0);
regs.p.n = regs.y.l & 0x80;
regs.p.z = regs.y.l == 0;
}
inline void sCPU::op_ldy_w() {
regs.y.w = rd.w;
regs.p.n = !!(regs.y.w & 0x8000);
regs.p.z = (regs.y.w == 0);
regs.p.n = regs.y.w & 0x8000;
regs.p.z = regs.y.w == 0;
}
inline void sCPU::op_ora_b() {
regs.a.l |= rd.l;
regs.p.n = !!(regs.a.l & 0x80);
regs.p.z = (regs.a.l == 0);
regs.p.n = regs.a.l & 0x80;
regs.p.z = regs.a.l == 0;
}
inline void sCPU::op_ora_w() {
regs.a.w |= rd.w;
regs.p.n = !!(regs.a.w & 0x8000);
regs.p.z = (regs.a.w == 0);
regs.p.n = regs.a.w & 0x8000;
regs.p.z = regs.a.w == 0;
}
inline void sCPU::op_sbc_b() {
int32 r;
int r;
if(regs.p.d) {
uint8 n0 = (regs.a.l ) & 15;
uint8 n1 = (regs.a.l >> 4) & 15;
uint8 n0 = (regs.a.l ) & 15;
uint8 n1 = (regs.a.l >> 4) & 15;
n0 -= ((rd.l ) & 15) + !regs.p.c;
n1 -= ((rd.l >> 4) & 15);
if(n0 > 9) {
@@ -221,21 +215,21 @@ int32 r;
r = (n1 << 4) | (n0);
} else {
r = regs.a.l - rd.l - !regs.p.c;
regs.p.c = (r >= 0);
regs.p.c = r >= 0;
}
regs.p.n = !!(r & 0x80);
regs.p.v = !!((regs.a.l ^ rd.l) & (regs.a.l ^ r) & 0x80);
regs.p.z = ((uint8)r == 0);
regs.p.n = r & 0x80;
regs.p.v = (regs.a.l ^ rd.l) & (regs.a.l ^ r) & 0x80;
regs.p.z = (uint8)r == 0;
regs.a.l = r;
}
inline void sCPU::op_sbc_w() {
int32 r;
int r;
if(regs.p.d) {
uint8 n0 = (regs.a.w ) & 15;
uint8 n1 = (regs.a.w >> 4) & 15;
uint8 n2 = (regs.a.w >> 8) & 15;
uint8 n3 = (regs.a.w >> 12) & 15;
uint8 n0 = (regs.a.w ) & 15;
uint8 n1 = (regs.a.w >> 4) & 15;
uint8 n2 = (regs.a.w >> 8) & 15;
uint8 n3 = (regs.a.w >> 12) & 15;
n0 -= ((rd.w ) & 15) + !regs.p.c;
n1 -= ((rd.w >> 4) & 15);
n2 -= ((rd.w >> 8) & 15);
@@ -261,116 +255,116 @@ int32 r;
r = (n3 << 12) | (n2 << 8) | (n1 << 4) | (n0);
} else {
r = regs.a.w - rd.w - !regs.p.c;
regs.p.c = (r >= 0);
regs.p.c = r >= 0;
}
regs.p.n = !!(r & 0x8000);
regs.p.v = !!((regs.a.w ^ rd.w) & (regs.a.w ^ r) & 0x8000);
regs.p.z = ((uint16)r == 0);
regs.p.n = r & 0x8000;
regs.p.v = (regs.a.w ^ rd.w) & (regs.a.w ^ r) & 0x8000;
regs.p.z = (uint16)r == 0;
regs.a.w = r;
}
//op_rmw
inline void sCPU::op_inc_b() {
rd.l++;
regs.p.n = !!(rd.l & 0x80);
regs.p.z = (rd.l == 0);
regs.p.n = rd.l & 0x80;
regs.p.z = rd.l == 0;
}
inline void sCPU::op_inc_w() {
rd.w++;
regs.p.n = !!(rd.w & 0x8000);
regs.p.z = (rd.w == 0);
regs.p.n = rd.w & 0x8000;
regs.p.z = rd.w == 0;
}
inline void sCPU::op_dec_b() {
rd.l--;
regs.p.n = !!(rd.l & 0x80);
regs.p.z = (rd.l == 0);
regs.p.n = rd.l & 0x80;
regs.p.z = rd.l == 0;
}
inline void sCPU::op_dec_w() {
rd.w--;
regs.p.n = !!(rd.w & 0x8000);
regs.p.z = (rd.w == 0);
regs.p.n = rd.w & 0x8000;
regs.p.z = rd.w == 0;
}
inline void sCPU::op_asl_b() {
regs.p.c = !!(rd.l & 0x80);
regs.p.c = rd.l & 0x80;
rd.l <<= 1;
regs.p.n = !!(rd.l & 0x80);
regs.p.z = (rd.l == 0);
regs.p.n = rd.l & 0x80;
regs.p.z = rd.l == 0;
}
inline void sCPU::op_asl_w() {
regs.p.c = !!(rd.w & 0x8000);
regs.p.c = rd.w & 0x8000;
rd.w <<= 1;
regs.p.n = !!(rd.w & 0x8000);
regs.p.z = (rd.w == 0);
regs.p.n = rd.w & 0x8000;
regs.p.z = rd.w == 0;
}
inline void sCPU::op_lsr_b() {
regs.p.c = rd.l & 1;
rd.l >>= 1;
regs.p.n = !!(rd.l & 0x80);
regs.p.z = (rd.l == 0);
regs.p.n = rd.l & 0x80;
regs.p.z = rd.l == 0;
}
inline void sCPU::op_lsr_w() {
regs.p.c = rd.w & 1;
rd.w >>= 1;
regs.p.n = !!(rd.w & 0x8000);
regs.p.z = (rd.w == 0);
regs.p.n = rd.w & 0x8000;
regs.p.z = rd.w == 0;
}
inline void sCPU::op_rol_b() {
uint16 carry = (uint16)regs.p.c;
regs.p.c = !!(rd.l & 0x80);
unsigned carry = (unsigned)regs.p.c;
regs.p.c = rd.l & 0x80;
rd.l = (rd.l << 1) | carry;
regs.p.n = !!(rd.l & 0x80);
regs.p.z = (rd.l == 0);
regs.p.n = rd.l & 0x80;
regs.p.z = rd.l == 0;
}
inline void sCPU::op_rol_w() {
uint16 carry = (uint16)regs.p.c;
regs.p.c = !!(rd.w & 0x8000);
unsigned carry = (unsigned)regs.p.c;
regs.p.c = rd.w & 0x8000;
rd.w = (rd.w << 1) | carry;
regs.p.n = !!(rd.w & 0x8000);
regs.p.z = (rd.w == 0);
regs.p.n = rd.w & 0x8000;
regs.p.z = rd.w == 0;
}
inline void sCPU::op_ror_b() {
uint16 carry = (uint16)regs.p.c << 7;
unsigned carry = (unsigned)regs.p.c << 7;
regs.p.c = rd.l & 1;
rd.l = carry | (rd.l >> 1);
regs.p.n = !!(rd.l & 0x80);
regs.p.z = (rd.l == 0);
regs.p.n = rd.l & 0x80;
regs.p.z = rd.l == 0;
}
inline void sCPU::op_ror_w() {
uint16 carry = (uint16)regs.p.c << 15;
unsigned carry = (unsigned)regs.p.c << 15;
regs.p.c = rd.w & 1;
rd.w = carry | (rd.w >> 1);
regs.p.n = !!(rd.w & 0x8000);
regs.p.z = (rd.w == 0);
regs.p.n = rd.w & 0x8000;
regs.p.z = rd.w == 0;
}
inline void sCPU::op_trb_b() {
regs.p.z = ((rd.l & regs.a.l) == 0);
regs.p.z = (rd.l & regs.a.l) == 0;
rd.l &= ~regs.a.l;
}
inline void sCPU::op_trb_w() {
regs.p.z = ((rd.w & regs.a.w) == 0);
regs.p.z = (rd.w & regs.a.w) == 0;
rd.w &= ~regs.a.w;
}
inline void sCPU::op_tsb_b() {
regs.p.z = ((rd.l & regs.a.l) == 0);
regs.p.z = (rd.l & regs.a.l) == 0;
rd.l |= regs.a.l;
}
inline void sCPU::op_tsb_w() {
regs.p.z = ((rd.w & regs.a.w) == 0);
regs.p.z = (rd.w & regs.a.w) == 0;
rd.w |= regs.a.w;
}

View File

@@ -1,256 +0,0 @@
optbl[0x69] = &sCPU::op_adc_const;
optbl[0x29] = &sCPU::op_and_const;
optbl[0xc9] = &sCPU::op_cmp_const;
optbl[0xe0] = &sCPU::op_cpx_const;
optbl[0xc0] = &sCPU::op_cpy_const;
optbl[0x49] = &sCPU::op_eor_const;
optbl[0xa9] = &sCPU::op_lda_const;
optbl[0xa2] = &sCPU::op_ldx_const;
optbl[0xa0] = &sCPU::op_ldy_const;
optbl[0x09] = &sCPU::op_ora_const;
optbl[0xe9] = &sCPU::op_sbc_const;
optbl[0x6d] = &sCPU::op_adc_addr;
optbl[0x2d] = &sCPU::op_and_addr;
optbl[0x2c] = &sCPU::op_bit_addr;
optbl[0xcd] = &sCPU::op_cmp_addr;
optbl[0xec] = &sCPU::op_cpx_addr;
optbl[0xcc] = &sCPU::op_cpy_addr;
optbl[0x4d] = &sCPU::op_eor_addr;
optbl[0xad] = &sCPU::op_lda_addr;
optbl[0xae] = &sCPU::op_ldx_addr;
optbl[0xac] = &sCPU::op_ldy_addr;
optbl[0x0d] = &sCPU::op_ora_addr;
optbl[0xed] = &sCPU::op_sbc_addr;
optbl[0x7d] = &sCPU::op_adc_addrx;
optbl[0x3d] = &sCPU::op_and_addrx;
optbl[0x3c] = &sCPU::op_bit_addrx;
optbl[0xdd] = &sCPU::op_cmp_addrx;
optbl[0x5d] = &sCPU::op_eor_addrx;
optbl[0xbd] = &sCPU::op_lda_addrx;
optbl[0xbc] = &sCPU::op_ldy_addrx;
optbl[0x1d] = &sCPU::op_ora_addrx;
optbl[0xfd] = &sCPU::op_sbc_addrx;
optbl[0x79] = &sCPU::op_adc_addry;
optbl[0x39] = &sCPU::op_and_addry;
optbl[0xd9] = &sCPU::op_cmp_addry;
optbl[0x59] = &sCPU::op_eor_addry;
optbl[0xb9] = &sCPU::op_lda_addry;
optbl[0xbe] = &sCPU::op_ldx_addry;
optbl[0x19] = &sCPU::op_ora_addry;
optbl[0xf9] = &sCPU::op_sbc_addry;
optbl[0x6f] = &sCPU::op_adc_long;
optbl[0x2f] = &sCPU::op_and_long;
optbl[0xcf] = &sCPU::op_cmp_long;
optbl[0x4f] = &sCPU::op_eor_long;
optbl[0xaf] = &sCPU::op_lda_long;
optbl[0x0f] = &sCPU::op_ora_long;
optbl[0xef] = &sCPU::op_sbc_long;
optbl[0x7f] = &sCPU::op_adc_longx;
optbl[0x3f] = &sCPU::op_and_longx;
optbl[0xdf] = &sCPU::op_cmp_longx;
optbl[0x5f] = &sCPU::op_eor_longx;
optbl[0xbf] = &sCPU::op_lda_longx;
optbl[0x1f] = &sCPU::op_ora_longx;
optbl[0xff] = &sCPU::op_sbc_longx;
optbl[0x65] = &sCPU::op_adc_dp;
optbl[0x25] = &sCPU::op_and_dp;
optbl[0x24] = &sCPU::op_bit_dp;
optbl[0xc5] = &sCPU::op_cmp_dp;
optbl[0xe4] = &sCPU::op_cpx_dp;
optbl[0xc4] = &sCPU::op_cpy_dp;
optbl[0x45] = &sCPU::op_eor_dp;
optbl[0xa5] = &sCPU::op_lda_dp;
optbl[0xa6] = &sCPU::op_ldx_dp;
optbl[0xa4] = &sCPU::op_ldy_dp;
optbl[0x05] = &sCPU::op_ora_dp;
optbl[0xe5] = &sCPU::op_sbc_dp;
optbl[0x75] = &sCPU::op_adc_dpx;
optbl[0x35] = &sCPU::op_and_dpx;
optbl[0x34] = &sCPU::op_bit_dpx;
optbl[0xd5] = &sCPU::op_cmp_dpx;
optbl[0x55] = &sCPU::op_eor_dpx;
optbl[0xb5] = &sCPU::op_lda_dpx;
optbl[0xb4] = &sCPU::op_ldy_dpx;
optbl[0x15] = &sCPU::op_ora_dpx;
optbl[0xf5] = &sCPU::op_sbc_dpx;
optbl[0xb6] = &sCPU::op_ldx_dpy;
optbl[0x72] = &sCPU::op_adc_idp;
optbl[0x32] = &sCPU::op_and_idp;
optbl[0xd2] = &sCPU::op_cmp_idp;
optbl[0x52] = &sCPU::op_eor_idp;
optbl[0xb2] = &sCPU::op_lda_idp;
optbl[0x12] = &sCPU::op_ora_idp;
optbl[0xf2] = &sCPU::op_sbc_idp;
optbl[0x61] = &sCPU::op_adc_idpx;
optbl[0x21] = &sCPU::op_and_idpx;
optbl[0xc1] = &sCPU::op_cmp_idpx;
optbl[0x41] = &sCPU::op_eor_idpx;
optbl[0xa1] = &sCPU::op_lda_idpx;
optbl[0x01] = &sCPU::op_ora_idpx;
optbl[0xe1] = &sCPU::op_sbc_idpx;
optbl[0x71] = &sCPU::op_adc_idpy;
optbl[0x31] = &sCPU::op_and_idpy;
optbl[0xd1] = &sCPU::op_cmp_idpy;
optbl[0x51] = &sCPU::op_eor_idpy;
optbl[0xb1] = &sCPU::op_lda_idpy;
optbl[0x11] = &sCPU::op_ora_idpy;
optbl[0xf1] = &sCPU::op_sbc_idpy;
optbl[0x67] = &sCPU::op_adc_ildp;
optbl[0x27] = &sCPU::op_and_ildp;
optbl[0xc7] = &sCPU::op_cmp_ildp;
optbl[0x47] = &sCPU::op_eor_ildp;
optbl[0xa7] = &sCPU::op_lda_ildp;
optbl[0x07] = &sCPU::op_ora_ildp;
optbl[0xe7] = &sCPU::op_sbc_ildp;
optbl[0x77] = &sCPU::op_adc_ildpy;
optbl[0x37] = &sCPU::op_and_ildpy;
optbl[0xd7] = &sCPU::op_cmp_ildpy;
optbl[0x57] = &sCPU::op_eor_ildpy;
optbl[0xb7] = &sCPU::op_lda_ildpy;
optbl[0x17] = &sCPU::op_ora_ildpy;
optbl[0xf7] = &sCPU::op_sbc_ildpy;
optbl[0x63] = &sCPU::op_adc_sr;
optbl[0x23] = &sCPU::op_and_sr;
optbl[0xc3] = &sCPU::op_cmp_sr;
optbl[0x43] = &sCPU::op_eor_sr;
optbl[0xa3] = &sCPU::op_lda_sr;
optbl[0x03] = &sCPU::op_ora_sr;
optbl[0xe3] = &sCPU::op_sbc_sr;
optbl[0x73] = &sCPU::op_adc_isry;
optbl[0x33] = &sCPU::op_and_isry;
optbl[0xd3] = &sCPU::op_cmp_isry;
optbl[0x53] = &sCPU::op_eor_isry;
optbl[0xb3] = &sCPU::op_lda_isry;
optbl[0x13] = &sCPU::op_ora_isry;
optbl[0xf3] = &sCPU::op_sbc_isry;
optbl[0x89] = &sCPU::op_bit_const;
optbl[0x8d] = &sCPU::op_sta_addr;
optbl[0x8e] = &sCPU::op_stx_addr;
optbl[0x8c] = &sCPU::op_sty_addr;
optbl[0x9c] = &sCPU::op_stz_addr;
optbl[0x9d] = &sCPU::op_sta_addrx;
optbl[0x9e] = &sCPU::op_stz_addrx;
optbl[0x99] = &sCPU::op_sta_addry;
optbl[0x8f] = &sCPU::op_sta_long;
optbl[0x9f] = &sCPU::op_sta_longx;
optbl[0x85] = &sCPU::op_sta_dp;
optbl[0x86] = &sCPU::op_stx_dp;
optbl[0x84] = &sCPU::op_sty_dp;
optbl[0x64] = &sCPU::op_stz_dp;
optbl[0x95] = &sCPU::op_sta_dpx;
optbl[0x94] = &sCPU::op_sty_dpx;
optbl[0x74] = &sCPU::op_stz_dpx;
optbl[0x96] = &sCPU::op_stx_dpy;
optbl[0x92] = &sCPU::op_sta_idp;
optbl[0x87] = &sCPU::op_sta_ildp;
optbl[0x81] = &sCPU::op_sta_idpx;
optbl[0x91] = &sCPU::op_sta_idpy;
optbl[0x97] = &sCPU::op_sta_ildpy;
optbl[0x83] = &sCPU::op_sta_sr;
optbl[0x93] = &sCPU::op_sta_isry;
optbl[0x1a] = &sCPU::op_inc;
optbl[0xe8] = &sCPU::op_inx;
optbl[0xc8] = &sCPU::op_iny;
optbl[0x3a] = &sCPU::op_dec;
optbl[0xca] = &sCPU::op_dex;
optbl[0x88] = &sCPU::op_dey;
optbl[0x0a] = &sCPU::op_asl;
optbl[0x4a] = &sCPU::op_lsr;
optbl[0x2a] = &sCPU::op_rol;
optbl[0x6a] = &sCPU::op_ror;
optbl[0xee] = &sCPU::op_inc_addr;
optbl[0xce] = &sCPU::op_dec_addr;
optbl[0x0e] = &sCPU::op_asl_addr;
optbl[0x4e] = &sCPU::op_lsr_addr;
optbl[0x2e] = &sCPU::op_rol_addr;
optbl[0x6e] = &sCPU::op_ror_addr;
optbl[0x1c] = &sCPU::op_trb_addr;
optbl[0x0c] = &sCPU::op_tsb_addr;
optbl[0xfe] = &sCPU::op_inc_addrx;
optbl[0xde] = &sCPU::op_dec_addrx;
optbl[0x1e] = &sCPU::op_asl_addrx;
optbl[0x5e] = &sCPU::op_lsr_addrx;
optbl[0x3e] = &sCPU::op_rol_addrx;
optbl[0x7e] = &sCPU::op_ror_addrx;
optbl[0xe6] = &sCPU::op_inc_dp;
optbl[0xc6] = &sCPU::op_dec_dp;
optbl[0x06] = &sCPU::op_asl_dp;
optbl[0x46] = &sCPU::op_lsr_dp;
optbl[0x26] = &sCPU::op_rol_dp;
optbl[0x66] = &sCPU::op_ror_dp;
optbl[0x14] = &sCPU::op_trb_dp;
optbl[0x04] = &sCPU::op_tsb_dp;
optbl[0xf6] = &sCPU::op_inc_dpx;
optbl[0xd6] = &sCPU::op_dec_dpx;
optbl[0x16] = &sCPU::op_asl_dpx;
optbl[0x56] = &sCPU::op_lsr_dpx;
optbl[0x36] = &sCPU::op_rol_dpx;
optbl[0x76] = &sCPU::op_ror_dpx;
optbl[0x90] = &sCPU::op_bcc;
optbl[0xb0] = &sCPU::op_bcs;
optbl[0xd0] = &sCPU::op_bne;
optbl[0xf0] = &sCPU::op_beq;
optbl[0x10] = &sCPU::op_bpl;
optbl[0x30] = &sCPU::op_bmi;
optbl[0x50] = &sCPU::op_bvc;
optbl[0x70] = &sCPU::op_bvs;
optbl[0x80] = &sCPU::op_bra;
optbl[0x82] = &sCPU::op_brl;
optbl[0x4c] = &sCPU::op_jmp_addr;
optbl[0x5c] = &sCPU::op_jmp_long;
optbl[0x6c] = &sCPU::op_jmp_iaddr;
optbl[0x7c] = &sCPU::op_jmp_iaddrx;
optbl[0xdc] = &sCPU::op_jmp_iladdr;
optbl[0x20] = &sCPU::op_jsr_addr;
optbl[0x22] = &sCPU::op_jsr_long;
optbl[0xfc] = &sCPU::op_jsr_iaddrx;
optbl[0x40] = &sCPU::op_rti;
optbl[0x60] = &sCPU::op_rts;
optbl[0x6b] = &sCPU::op_rtl;
optbl[0xea] = &sCPU::op_nop;
optbl[0x42] = &sCPU::op_wdm;
optbl[0xeb] = &sCPU::op_xba;
optbl[0x54] = &sCPU::op_mvn;
optbl[0x44] = &sCPU::op_mvp;
optbl[0x00] = &sCPU::op_brk;
optbl[0x02] = &sCPU::op_cop;
optbl[0xdb] = &sCPU::op_stp;
optbl[0xcb] = &sCPU::op_wai;
optbl[0xfb] = &sCPU::op_xce;
optbl[0x18] = &sCPU::op_clc;
optbl[0xd8] = &sCPU::op_cld;
optbl[0x58] = &sCPU::op_cli;
optbl[0xb8] = &sCPU::op_clv;
optbl[0x38] = &sCPU::op_sec;
optbl[0xf8] = &sCPU::op_sed;
optbl[0x78] = &sCPU::op_sei;
optbl[0xc2] = &sCPU::op_rep;
optbl[0xe2] = &sCPU::op_sep;
optbl[0xaa] = &sCPU::op_tax;
optbl[0xa8] = &sCPU::op_tay;
optbl[0x8a] = &sCPU::op_txa;
optbl[0x9b] = &sCPU::op_txy;
optbl[0x98] = &sCPU::op_tya;
optbl[0xbb] = &sCPU::op_tyx;
optbl[0x5b] = &sCPU::op_tcd;
optbl[0x1b] = &sCPU::op_tcs;
optbl[0x7b] = &sCPU::op_tdc;
optbl[0x3b] = &sCPU::op_tsc;
optbl[0xba] = &sCPU::op_tsx;
optbl[0x9a] = &sCPU::op_txs;
optbl[0x48] = &sCPU::op_pha;
optbl[0xda] = &sCPU::op_phx;
optbl[0x5a] = &sCPU::op_phy;
optbl[0x0b] = &sCPU::op_phd;
optbl[0x8b] = &sCPU::op_phb;
optbl[0x4b] = &sCPU::op_phk;
optbl[0x08] = &sCPU::op_php;
optbl[0x68] = &sCPU::op_pla;
optbl[0xfa] = &sCPU::op_plx;
optbl[0x7a] = &sCPU::op_ply;
optbl[0x2b] = &sCPU::op_pld;
optbl[0xab] = &sCPU::op_plb;
optbl[0x28] = &sCPU::op_plp;
optbl[0xf4] = &sCPU::op_pea;
optbl[0xd4] = &sCPU::op_pei;
optbl[0x62] = &sCPU::op_per;

View File

@@ -1,18 +1,12 @@
#define CLASS_NAME "sCPU"
#include "../../../lib/opgen_so.cpp"
#include <tool/opgen_switch.cpp>
int main() {
fph = fopen("op.h", "wb");
fpt = fopen("optable.cpp", "wb");
generate("op_read.cpp", "op_read.b");
generate("op_write.cpp", "op_write.b");
generate("op_rmw.cpp", "op_rmw.b");
generate("op_pc.cpp", "op_pc.b");
generate("op_misc.cpp", "op_misc.b");
fclose(fph);
fclose(fpt);
return 0;
}

View File

@@ -5,52 +5,51 @@ void sCPU::dma_add_clocks(uint clocks) {
add_clocks(clocks);
}
/*****
* used by both DMA and HDMA
*
* DMA address bus A cannot read from or write to the following addresses :
* $[00-3f|80-bf]:43[00-7f] <DMA control registers>
* $[00-3f|80-bf]:420b <DMA enable register>
* $[00-3f|80-bf]:420c <HDMA enable register>
*
* WRAM<>WRAM transfers via $2180 are also illegal
*****/
bool sCPU::dma_addr_valid(uint32 abus) {
//reads from B-bus or S-CPU registers are invalid
if((abus & 0x40ff00) == 0x2100) return false; //$[00-3f|80-bf]:[2100-21ff]
if((abus & 0x40fe00) == 0x4000) return false; //$[00-3f|80-bf]:[4000-41ff]
if((abus & 0x40ffe0) == 0x4200) return false; //$[00-3f|80-bf]:[4200-421f]
if((abus & 0x40ff80) == 0x4300) return false; //$[00-3f|80-bf]:[4300-437f]
return true;
}
uint8 sCPU::dma_read(uint32 abus) {
if(dma_addr_valid(abus) == false) return 0x00; //does not return S-CPU MDR
return bus.read(abus);
}
void sCPU::dma_transfer(bool direction, uint8 bbus, uint32 abus) {
if(direction == 0) {
//a->b transfer (to $21xx)
if(bbus == 0x80 && ((abus & 0xfe0000) == 0x7e0000 || (abus & 0x40e000) == 0x0000)) {
//illegal WRAM->WRAM transfer
//illegal WRAM->WRAM transfer (bus conflict)
//read most likely occurs; no write occurs
//read is irrelevant, as it has no observable effect on emulation
} else if((abus & 0x40ff00) == 0x2100 || (abus & 0x40ff80) == 0x4300
|| (abus & 0x40ffff) == 0x420b || (abus & 0x40ffff) == 0x420c) {
//illegal register access
bus.write(0x2100 | bbus, regs.mdr); //TODO: verify if MDR is written here
//read is irrelevent, as it cannot be observed by software
dma_add_clocks(8);
} else {
//valid transfer
bus.write(0x2100 | bbus, bus.read(abus));
dma_add_clocks(4);
uint8 data = dma_read(abus);
dma_add_clocks(4);
bus.write(0x2100 | bbus, data);
}
} else {
//b->a transfer (from $21xx)
if(bbus == 0x80 && ((abus & 0xfe0000) == 0x7e0000 || (abus & 0x40e000) == 0x0000)) {
//illegal WRAM->WRAM transfer
//illegal WRAM->WRAM transfer (bus conflict)
//no read occurs; write does occur
//does not write MDR as expected
//TODO: 0x00 was observed on hardware; verify if other values are possible
bus.write(abus, 0x00);
} else if((abus & 0x40ff00) == 0x2100 || (abus & 0x40ff80) == 0x4300
|| (abus & 0x40ffff) == 0x420b || (abus & 0x40ffff) == 0x420c) {
//illegal register access
bus.write(abus, regs.mdr); //TODO: verify if MDR is written here
dma_add_clocks(8);
bus.write(abus, 0x00); //does not write S-CPU MDR
} else {
//valid transfer
bus.write(abus, bus.read(0x2100 | bbus));
dma_add_clocks(4);
uint8 data = bus.read(0x2100 | bbus);
dma_add_clocks(4);
if(dma_addr_valid(abus) == true) {
bus.write(abus, data);
}
}
}
//each byte *always* consumes 8 clocks, even if transfer is invalid and no read and/or write occurs
dma_add_clocks(8);
cycle_edge();
}
@@ -120,10 +119,22 @@ inline void sCPU::dma_write(uint8 i, uint8 index) {
}
}
uint8 sCPU::dma_enabled_channels() {
uint8 r = 0;
for(unsigned i = 0; i < 8; i++) {
if(channel[i].dma_enabled) r++;
}
return r;
}
void sCPU::dma_run() {
for(int i = 0; i < 8; i++) {
dma_add_clocks(8);
cycle_edge();
for(unsigned i = 0; i < 8; i++) {
if(channel[i].dma_enabled == false) continue;
dma_add_clocks(8);
cycle_edge();
if(cartridge.info.sdd1 == true) {
sdd1.dma_begin(i, (channel[i].srcbank << 16) | (channel[i].srcaddr), channel[i].xfersize);
@@ -138,7 +149,7 @@ void sCPU::dma_run() {
channel[i].xfersize, channel[i].xfersize ? channel[i].xfersize : 65536);
}
uint index = 0;
unsigned index = 0;
do {
dma_write(i, dma_bbus(i, index++));
} while(channel[i].dma_enabled && channel[i].xfersize);
@@ -158,7 +169,7 @@ inline bool sCPU::hdma_active(uint8 i) {
}
inline bool sCPU::hdma_active_after(uint8 i) {
for(int n = i + 1; n < 8; n++) {
for(unsigned n = i + 1; n < 8; n++) {
if(hdma_active(n) == true) return true;
}
return false;
@@ -166,7 +177,7 @@ inline bool sCPU::hdma_active_after(uint8 i) {
inline uint8 sCPU::hdma_enabled_channels() {
uint8 r = 0;
for(int i = 0; i < 8; i++) {
for(unsigned i = 0; i < 8; i++) {
if(channel[i].hdma_enabled) r++;
}
return r;
@@ -174,55 +185,57 @@ inline uint8 sCPU::hdma_enabled_channels() {
inline uint8 sCPU::hdma_active_channels() {
uint8 r = 0;
for(int i = 0; i < 8; i++) {
for(unsigned i = 0; i < 8; i++) {
if(hdma_active(i) == true) r++;
}
return r;
}
void sCPU::hdma_update(uint8 i) {
channel[i].hdma_line_counter = bus.read(hdma_addr(i));
channel[i].hdma_line_counter = dma_read(hdma_addr(i));
dma_add_clocks(8);
channel[i].hdma_completed = (channel[i].hdma_line_counter == 0);
channel[i].hdma_do_transfer = !channel[i].hdma_completed;
if(channel[i].hdma_indirect) {
channel[i].hdma_iaddr = bus.read(hdma_addr(i)) << 8;
channel[i].hdma_iaddr = dma_read(hdma_addr(i)) << 8;
dma_add_clocks(8);
if(!channel[i].hdma_completed || hdma_active_after(i)) {
channel[i].hdma_iaddr >>= 8;
channel[i].hdma_iaddr |= bus.read(hdma_addr(i)) << 8;
channel[i].hdma_iaddr |= dma_read(hdma_addr(i)) << 8;
dma_add_clocks(8);
}
}
}
void sCPU::hdma_run() {
static uint8 hdma_xferlen[8] = { 1, 2, 2, 4, 4, 4, 2, 4 };
for(int i = 0; i < 8; i++) {
dma_add_clocks(8);
for(unsigned i = 0; i < 8; i++) {
if(hdma_active(i) == false) continue;
channel[i].dma_enabled = false; //HDMA run during DMA will stop DMA mid-transfer
dma_add_clocks(8);
if(channel[i].hdma_do_transfer) {
int xferlen = hdma_xferlen[channel[i].xfermode];
for(int index = 0; index < xferlen; index++) {
if(bool(config::cpu.hdma_enable) == true) {
dma_transfer(channel[i].direction, dma_bbus(i, index),
!channel[i].hdma_indirect ? hdma_addr(i) : hdma_iaddr(i));
} else {
dma_add_clocks(8);
cycle_edge();
}
static const unsigned transfer_length[8] = { 1, 2, 2, 4, 4, 4, 2, 4 };
unsigned length = transfer_length[channel[i].xfermode];
for(unsigned index = 0; index < length; index++) {
unsigned addr = !channel[i].hdma_indirect ? hdma_addr(i) : hdma_iaddr(i);
dma_transfer(channel[i].direction, dma_bbus(i, index), addr);
}
}
}
for(unsigned i = 0; i < 8; i++) {
if(hdma_active(i) == false) continue;
channel[i].hdma_line_counter--;
channel[i].hdma_do_transfer = bool(channel[i].hdma_line_counter & 0x80);
if((channel[i].hdma_line_counter & 0x7f) == 0) {
hdma_update(i);
} else {
dma_add_clocks(8);
}
}
@@ -230,15 +243,17 @@ void sCPU::hdma_run() {
}
void sCPU::hdma_init_reset() {
for(int i = 0; i < 8; i++) {
for(unsigned i = 0; i < 8; i++) {
channel[i].hdma_completed = false;
channel[i].hdma_do_transfer = false;
}
}
void sCPU::hdma_init() {
for(int i = 0; i < 8; i++) {
if(!channel[i].hdma_enabled)continue;
dma_add_clocks(8);
for(unsigned i = 0; i < 8; i++) {
if(!channel[i].hdma_enabled) continue;
channel[i].dma_enabled = false; //HDMA init during DMA will stop DMA mid-transfer
channel[i].hdma_addr = channel[i].srcaddr;
@@ -253,7 +268,7 @@ void sCPU::hdma_init() {
*****/
void sCPU::dma_power() {
for(int i = 0; i < 8; i++) {
for(unsigned i = 0; i < 8; i++) {
channel[i].dmap = 0xff;
channel[i].direction = 1;
channel[i].hdma_indirect = true;
@@ -277,7 +292,7 @@ void sCPU::dma_power() {
}
void sCPU::dma_reset() {
for(int i = 0; i < 8; i++) {
for(unsigned i = 0; i < 8; i++) {
channel[i].dma_enabled = false;
channel[i].hdma_enabled = false;

View File

@@ -46,6 +46,8 @@
} channel[8];
void dma_add_clocks(uint clocks);
bool dma_addr_valid(uint32 abus);
uint8 dma_read(uint32 abus);
void dma_transfer(bool direction, uint8 bbus, uint32 abus);
uint8 dma_bbus(uint8 i, uint8 index);
@@ -56,6 +58,7 @@
void dma_transfertobusb(uint8 i, uint8 bbus);
void dma_transfertobusa(uint8 i, uint8 bbus);
void dma_write(uint8 i, uint8 index);
uint8 dma_enabled_channels();
void dma_run();
bool hdma_active(uint8 i);

View File

@@ -1,8 +1,7 @@
#ifdef SCPU_CPP
uint8 sCPU::pio_status() {
return status.pio;
}
uint8 sCPU::pio() { return status.pio; }
bool sCPU::joylatch() { return status.joypad_strobe_latch; }
//WMDATA
uint8 sCPU::mmio_r2180() {
@@ -55,7 +54,7 @@ void sCPU::mmio_w4016(uint8 data) {
//realtime or buffered status of joypadN.b
uint8 sCPU::mmio_r4016() {
uint8 r = regs.mdr & 0xfc;
r |= (uint8)snes.input.port_read(0);
r |= snes.input.port_read(0) & 3;
return r;
}
@@ -65,7 +64,7 @@ uint8 sCPU::mmio_r4016() {
//1-0 = Joypad serial data
uint8 sCPU::mmio_r4017() {
uint8 r = (regs.mdr & 0xe0) | 0x1c;
r |= (uint8)snes.input.port_read(1);
r |= snes.input.port_read(1) & 3;
return r;
}
@@ -143,19 +142,16 @@ void sCPU::mmio_w420a(uint8 data) {
//DMAEN
void sCPU::mmio_w420b(uint8 data) {
for(int i = 0; i < 8; i++) {
channel[i].dma_enabled = !!(data & (1 << i));
}
if(data) {
status.dma_state = DMASTATE_DMASYNC;
status.dma_pending = true;
for(unsigned i = 0; i < 8; i++) {
channel[i].dma_enabled = data & (1 << i);
}
if(data) status.dma_pending = true;
}
//HDMAEN
void sCPU::mmio_w420c(uint8 data) {
for(int i = 0; i < 8; i++) {
channel[i].hdma_enabled = !!(data & (1 << i));
for(unsigned i = 0; i < 8; i++) {
channel[i].hdma_enabled = data & (1 << i);
}
}

View File

@@ -3,7 +3,8 @@
uint8 mmio_read(uint addr);
void mmio_write(uint addr, uint8 data);
uint8 pio_status();
uint8 pio();
bool joylatch();
uint8 mmio_r2180();
uint8 mmio_r4016();

View File

@@ -48,7 +48,6 @@ void sCPU::reset() {
}
sCPU::sCPU() {
#include "core/optable.cpp"
}
sCPU::~sCPU() {

View File

@@ -15,13 +15,13 @@ public:
} event;
struct {
uint nmi_hold;
uint irq_hold;
unsigned nmi_hold;
unsigned irq_hold;
uint nmi_fire;
uint irq_fire;
uint irq_delay;
uint hw_math;
unsigned nmi_fire;
unsigned irq_fire;
unsigned irq_delay;
unsigned hw_math;
alwaysinline void set(uint &ctr, uint clocks) {
if(clocks >= ctr) { ctr = clocks; }
@@ -36,55 +36,50 @@ public:
}
} counter;
enum {
DMASTATE_INACTIVE,
DMASTATE_DMASYNC,
DMASTATE_RUN,
DMASTATE_CPUSYNC,
};
enum DMA_State { DMA_Inactive, DMA_Run, DMA_CPUsync };
struct {
//core
uint8 opcode;
bool in_opcode;
uint8 opcode;
bool in_opcode;
uint clock_count;
unsigned clock_count;
//timing
uint16 vcounter, hcounter;
uint16 field_lines, line_clocks;
bool line_rendered;
bool line_rendered;
uint16 line_render_position;
bool dram_refreshed;
bool dram_refreshed;
uint16 dram_refresh_position;
bool hdmainit_triggered;
bool hdmainit_triggered;
uint16 hdmainit_trigger_position;
bool hdma_triggered;
bool hdma_triggered;
uint16 irq_delay;
bool nmi_valid;
bool nmi_line;
bool nmi_transition;
bool nmi_pending;
bool nmi_valid;
bool nmi_line;
bool nmi_transition;
bool nmi_pending;
uint16 virq_trigger_pos, hirq_trigger_pos;
bool irq_valid;
bool irq_line;
bool irq_transition;
bool irq_pending;
bool irq_valid;
bool irq_line;
bool irq_transition;
bool irq_pending;
//dma
uint dma_counter;
uint dma_clocks;
uint dma_state;
bool dma_pending;
bool hdma_pending;
bool hdmainit_pending;
unsigned dma_counter;
unsigned dma_clocks;
bool dma_pending;
bool hdma_pending;
bool hdma_mode; //0 = init, 1 = run
DMA_State dma_state;
//mmio
@@ -92,20 +87,20 @@ public:
uint32 wram_addr;
//$4016-$4017
bool joypad_strobe_latch;
bool joypad_strobe_latch;
uint32 joypad1_bits;
uint32 joypad2_bits;
//$4200
bool nmi_enabled;
bool hirq_enabled, virq_enabled;
bool auto_joypad_poll;
bool nmi_enabled;
bool hirq_enabled, virq_enabled;
bool auto_joypad_poll;
//$4201
uint8 pio;
uint8 pio;
//$4202-$4203
uint8 mul_a, mul_b;
uint8 mul_a, mul_b;
//$4204-$4206
uint16 div_a;
@@ -119,10 +114,10 @@ public:
uint16 r4216;
//$4218-$421f
uint8 joy1l, joy1h;
uint8 joy2l, joy2h;
uint8 joy3l, joy3h;
uint8 joy4l, joy4h;
uint8 joy1l, joy1h;
uint8 joy2l, joy2h;
uint8 joy3l, joy3h;
uint8 joy4l, joy4h;
} status;
void power();

View File

@@ -1,10 +1,15 @@
#ifdef SCPU_CPP
void sCPU::run_auto_joypad_poll() {
uint16_t joy1 = 0, joy2 = 0;
uint16 joy1 = 0, joy2 = 0, joy3 = 0, joy4 = 0;
for(unsigned i = 0; i < 16; i++) {
joy1 |= (uint16_t)snes.input.port_read(0) ? (0x8000 >> i) : 0;
joy2 |= (uint16_t)snes.input.port_read(1) ? (0x8000 >> i) : 0;
uint8 port0 = snes.input.port_read(0);
uint8 port1 = snes.input.port_read(1);
joy1 |= (port0 & 1) ? (0x8000 >> i) : 0;
joy2 |= (port1 & 1) ? (0x8000 >> i) : 0;
joy3 |= (port0 & 2) ? (0x8000 >> i) : 0;
joy4 |= (port1 & 2) ? (0x8000 >> i) : 0;
}
status.joy1l = joy1;
@@ -13,11 +18,11 @@ void sCPU::run_auto_joypad_poll() {
status.joy2l = joy2;
status.joy2h = joy2 >> 8;
status.joy3l = 0x00;
status.joy3h = 0x00;
status.joy3l = joy3;
status.joy3h = joy3 >> 8;
status.joy4l = 0x00;
status.joy4h = 0x00;
status.joy4l = joy4;
status.joy4h = joy4 >> 8;
}
#endif //ifdef SCPU_CPP

View File

@@ -1,9 +1,4 @@
#ifdef SCPU_CPP
#define ntsc_color_burst_phase_shift_scanline() ( \
snes.region() == SNES::NTSC && status.vcounter == 240 && \
ppu.interlace() == false && ppu.field() == 1 \
)
#include "irq.cpp"
#include "joypad.cpp"
@@ -22,6 +17,12 @@ uint sCPU::dma_counter() { return (status.dma_counter + status.hcounter) & 7; }
* Dot 323 range = { 1292, 1294, 1296 }
* Dot 327 range = { 1310, 1312, 1314 }
*****/
#define ntsc_color_burst_phase_shift_scanline() ( \
snes.region() == SNES::NTSC && status.vcounter == 240 && \
ppu.interlace() == false && ppu.field() == 1 \
)
uint16 sCPU::hdot() {
if(ntsc_color_burst_phase_shift_scanline() == true) return (status.hcounter >> 2);
return (status.hcounter - ((status.hcounter > 1292) << 1) - ((status.hcounter > 1310) << 1)) >> 2;
@@ -55,15 +56,7 @@ void sCPU::scanline() {
//dram refresh occurs once every scanline
status.dram_refreshed = false;
if(cpu_version == 2) {
if(ntsc_color_burst_phase_shift_scanline() == false) {
if(status.dram_refresh_position == 534) {
status.dram_refresh_position = 538;
} else {
status.dram_refresh_position = 534;
}
}
}
if(cpu_version == 2) status.dram_refresh_position = 530 + 8 - dma_counter();
//hdma triggers once every visible scanline
status.line_rendered = false;
@@ -86,8 +79,7 @@ void sCPU::frame() {
status.vcounter = 0;
status.field_lines = (snes.region() == SNES::NTSC ? 525 : 625) >> 1;
//interlaced even fields have one extra scanline
//(263+262=525 NTSC, 313+312=625 PAL)
//interlaced even fields have one extra scanline (263+262=525 NTSC, 313+312=625 PAL)
if(ppu.interlace() == true && ppu.field() == 0) status.field_lines++;
status.hdmainit_triggered = false;
@@ -101,20 +93,19 @@ void sCPU::frame() {
/*****
* precycle_edge()
*
* Used for DMA/HDMA bus synchronization
* Used for H/DMA bus synchronization
*****/
alwaysinline void sCPU::precycle_edge() {
if(status.dma_state == DMASTATE_CPUSYNC) {
status.dma_state = DMASTATE_INACTIVE;
uint n = status.clock_count - (status.dma_clocks % status.clock_count);
add_clocks(n ? n : status.clock_count);
void sCPU::precycle_edge() {
if(status.dma_state == DMA_CPUsync) {
add_clocks(status.clock_count - (status.dma_clocks % status.clock_count));
status.dma_state = DMA_Inactive;
}
}
/*****
* cycle_edge()
*
* Used to test for HDMA, which can trigger on the edge of every opcode cycle.
* Used to test for H/DMA, which can trigger on the edge of every opcode cycle.
*****/
void sCPU::cycle_edge() {
if(status.line_rendered == false) {
@@ -124,57 +115,61 @@ void sCPU::cycle_edge() {
}
}
switch(status.dma_state) {
case DMASTATE_INACTIVE: break;
case DMASTATE_DMASYNC: {
status.dma_state = DMASTATE_RUN;
} break;
case DMASTATE_RUN: {
status.dma_state = DMASTATE_CPUSYNC;
status.dma_clocks = 8 - dma_counter() + 8;
add_clocks(status.dma_clocks);
if(status.hdmainit_pending) { hdma_init(); status.hdmainit_pending = false; }
if(status.hdma_pending) { hdma_run(); status.hdma_pending = false; }
if(status.dma_pending) { dma_run(); status.dma_pending = false; }
} break;
}
if(status.hdmainit_triggered == false) {
if(status.hcounter >= status.hdmainit_trigger_position || status.vcounter) {
status.hdmainit_triggered = true;
hdma_init_reset();
if(hdma_enabled_channels()) {
add_clocks(18);
hdma_init();
//if(status.dma_state == DMASTATE_INACTIVE) {
// status.dma_state = DMASTATE_DMASYNC;
// status.hdmainit_pending = true;
//} else {
// hdma_init();
//}
status.hdma_pending = true;
status.hdma_mode = 0;
}
}
}
if(status.hdma_triggered == false) {
if(status.hcounter >= 1106) {
if(status.hcounter >= 1104) {
status.hdma_triggered = true;
if(hdma_active_channels()) {
add_clocks(18);
hdma_run();
//if(status.dma_state == DMASTATE_INACTIVE) {
// status.dma_state = DMASTATE_DMASYNC;
// status.hdma_pending = true;
//} else {
// hdma_run();
//}
status.hdma_pending = true;
status.hdma_mode = 1;
}
}
}
//H/DMA pending && DMA inactive?
//.. Run one full CPU cycle
//.. HDMA pending && HDMA enabled ? DMA sync + HDMA run
//.. DMA pending && DMA enabled ? DMA sync + DMA run
//.... HDMA during DMA && HDMA enabled ? DMA sync + HDMA run
//.. Run one bus CPU cycle
//.. CPU sync
if(status.dma_state == DMA_Run) {
if(status.hdma_pending) {
status.hdma_pending = false;
if(hdma_enabled_channels()) {
dma_add_clocks(8 - dma_counter()); //DMA sync
status.hdma_mode == 0 ? hdma_init() : hdma_run();
status.dma_state = DMA_CPUsync;
}
}
if(status.dma_pending) {
status.dma_pending = false;
if(dma_enabled_channels()) {
dma_add_clocks(8 - dma_counter()); //DMA sync
dma_run();
status.dma_state = DMA_CPUsync;
}
}
}
if(status.dma_state == DMA_Inactive) {
if(status.dma_pending || status.hdma_pending) {
status.dma_clocks = 0;
status.dma_state = DMA_Run;
}
}
}
/*****
@@ -216,7 +211,7 @@ void sCPU::timing_reset() {
status.line_clocks = 1364;
status.line_rendered = false;
status.line_render_position = min(1112U, (uint)config::ppu.hack.render_scanline_position);
status.line_render_position = min(1112U, (unsigned)config::ppu.hack.render_scanline_position);
status.dram_refreshed = false;
status.dram_refresh_position = (cpu_version == 1) ? 530 : 538;
@@ -240,11 +235,12 @@ void sCPU::timing_reset() {
update_interrupts();
status.dma_counter = 0;
status.dma_state = DMASTATE_INACTIVE;
status.dma_pending = false;
status.hdma_pending = false;
status.hdmainit_pending = false;
status.dma_counter = 0;
status.dma_clocks = 0;
status.dma_pending = false;
status.hdma_pending = false;
status.hdma_mode = 0;
status.dma_state = DMA_Inactive;
history.reset();

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View File

@@ -2,39 +2,40 @@ static char enc_icon48[] = {
"_gAB8AHwAfAB8AHwAfAB8P8B8AHwAfAB8AHwAfAB8AHw_wHwAfAB8AHwAfAB8AHw"
"AfD_AfAB8AHwAfAB8AHwAfAB8P8B8AHwAfAB8AHwAfAB8AHw_wHwAfAB8AHwAfAB"
"8AHwAfD_AfAB8AHwAfAB8AHwAfAB8P8B8AHwAfAB8AHwAfAB8AHw_wHwAfAB8AHw"
"AfAB8AHwAfD_AfAB8AHwAfAB8AHwAfABgFD_oRYPBAA1BABWVQQAWwQAQQQAGgQA"
"Av8u8AHwAfAB8AHwAfAB8AHwVbSAAQQALQQAsAQA9FUEAP8EwPsEAM4EAFP9BAAE"
"QvAB8AHwAfAB8AHwqwHwvOAEBACFBAD5uPDVBOD-BAC9BAAUSvAB8L8B8AHwAfAB"
"8AHwvGADBACuoqjwBPAEwNsEABZS8H8B8AHwAfAB8AHwAfDAIHuvnPAE8ATwBCDH"
"BAAFVvC_AfAB8AHwAfAB8LzAIAQA3vaY8ATwBPAEYGZa8AHw3wHwAfAB8AHwwMCX"
"kPAE8OsE8ASg3wQABl7wAfAB8K8B8AHwAfC8QAYEAOeQ8PcE8ATw0OMvYvAB8AHw"
"AfDXAfAB8MBAHAQA_JDwBPALBPAE4GRi8AAAPz9U_wEEAA0EAB0EAB59BAAPBABE"
"9gHwAfDA8BVVBABxBAB3BAChUET9p5zwBPAE8BaGuMALBACqbAQAzgQA9AQA-wQA"
"qvwEAPYEANYEAHoEAL4SlvAB8AHwAfAEhjIEAF68FEKo8ATwBFCBcIFHtQQA5AQA"
"_wTwBKDuBAB-XDQQjvAB8AHwAfAQhmhHzPYE8ARgpQ5YwEBor2xBsPAE8AQQ_QQA"
"hFTyfwHwAfAB8MjA-Bgg8wTQowAQ-_-rACMuNrz_SrzwBPAE8MQgZ4LwbwHwAfAB"
"8BDJkbTwBMCnAAfLfV-0ETU6fP_mnPAE8ATwBCAkExxfhvAB8AHwAfDEgBEEAO0D"
"uPAEQKQO_f-tAIBCLDX_cTw-mPA3BPAE8ASAlYLwAUDNAKoBBAAFBAAUBAAiBAB-"
"JQhAEBAYEETz5PYE8KgABZxKRfIENju8_9eQ8ATwBPAEoOq0wKoDBAAsBACGBADM"
"BADq7AQA_AQA_gSAEBAYEOrKBACDBAAqBABMo6gAFkC88AQgrvgCBy83wP8VPj7_"
"-JDwBPCvBPAIs7yAuBDEoED_BPBXBPAEQDAQwAQAKcCAHRf8S7hQMBl_uFk4O_--"
"KYzwBPAE8ATwvEBhBABe95zwBPAE8ARg9gQAW1HAIJ8XFKwA8uhIkFUEAB-sxhkE"
"AH0EAJL1BADDBADznPAE8ATwwADozQBIBAD5kPAE8ATwAQTg-ADQACn_nrwYAshD"
"pPUB8NAQEQQA3nGgRqjwBPDAkOKI8ATw9wTwBPAEIM8UAwHwAfAB8HvIEPQYzKjw"
"BPAEQDQS0t-I8ATwBPAE8ARAeprwAfB3AfDEYLAZyqzwBPAEAMX1cAAvBADxiPAE"
"8ATwBOB68AQAGZbwAfAB8MSgHK0EAPGw8ASg_gQAScBDvj4URZTwBPAE8AQw6gQA"
"RjwN9mwJ__8IBAAT_QQAGgRADBAUEET2xHDgE6u48ARwuwQAA0CFGQQAup0EAPOc"
"8ATwBIDyBACgmADLABe0gAkEAKpFBACaBADSBADsBABa-QQA-wRADBDtBADTVQQA"
"nQQASAQACsDAGK0EAPW48AQg3QQAFfbwVcggEQQAUwQAoRxD6b0EAPRcJNwwEBAY"
"EJ8EAKpRBAAQuIAGBABuBAC66AQA_wTwBPAEgOoEAEpzBAAHSxBBOFgryF-88BQg"
"LHEB8NDQBgQAC10EAA0IQLj-vDAQBADFr5jwBPAE8ASgywQAFMRA6pm4gOcEAHAE"
"AOAgAfCvAfAB8AHwvEACBAC1jPAvBPAE8ATwBAC_VBBDMtT_TrAAeQQAPAQAYKLf"
"AfAB8AHwAfDAQBnYQozw1wTwBPAE8P0EAB1p8AHwrwHwAfAB8MDgGAQA-ojw7wTw"
"BPAE8AQA_AQA3PsB8N8B8AHwAfDA8CQVsYjwBPD3BPAE8AQAulz1AfAB8AHw1wHw"
"AfDEQA0EAL2M8ATw9wTwBKAEFBFh8AHwAfAB8FcB8AHwxIAFBABoBADjXQQA_pzw"
"BPAEgOUEAG3_hCUB8AHwAfAB8AHwAfAB8KvIEFwXPQQAkgQAz8BGXveYQwQQDBAU"
"ENAEAJT9BABB9CYB8AHwAfAB8AHwrwHwAfAB8NBwBAQADtgl_QQwDxRA5PIB8AHw"
"AfAB8P8B8AHwAfAB8AHwAfAB8AHw_wHwAfAB8AHwAfAB8AHwAfD_AfAB8AHwAfAB"
"8AHwAfAB8P8B8AHwAfAB8AHwAfAB8AHw_wHwAfAB8AHwAfAB8AHwAfD_AfAB8AHw"
"AfAB8AHwAfAB8P8B8AHwAfAB8AHwAfAB8AHwfwHwAfAB8AHwAfAB8AGA"
"AfAB8AHwAfD_AfAB8AHwAfAB8AHwAfABAAD_qgAD_p8VOwD_oRaI_qEWthD-oBbL"
"CADE_qEAFaP_oBZm_p38GBU28AHwAfAB8AHwAfBfAfAB8AFQuBCoAMe0AP4twAD_"
"BPAEIPAkAIX_-JkZCkLwAfAB8AHwAfBHAfAB8HSB_wABtABvPQQA-7DwBPAEECwA"
"0P74oBIbTvAB8AHwAfAB8EcB8AHweEGgFWwkAv0HqPAE8MSwFdX-oRr-E1LwAfAB"
"8AHwAfAB8Lzg6KEUMRAC96DwBPAE8P3EIKXAEVrwAfAB8AHwAfDzAfDAsBa3mPAE"
"8ATwwED_uAE4E1rwAfAB8AHwAfAB8PG8YKIVJDjyBPAE8ATA-KAWoF7wAfAB8AHw"
"AfB7AfD4gmmQ8ATwBPDM4-Z_XvAB8AHwAfAB8AHwwICPH_wSePQE8ATwBMClDxEB"
"YNBERP8PPz_-oEw-Pv56CACMCACCgggAXT8__yD2BA808wHwAfDAkKMSDv6AmxwS"
"_qQYH8QC6kjIAJTUAOug8ATwhOFDRABYUDw8_hWsAI9QPj7_8KwA_wTw_oL6BAC1"
"PT3-MpbwjwHwAfAB8AxmpRkUFAOOkxjzBPAEoJ8PEEAQdZQAOrwA47TwBPAoAPh9"
"yAB0hvAB8AHwAfBcsha6XFwC-KzwBPDsAOQ0EHWQAD0EAPSs8ATwBMCAn4LwAfAB"
"8AHwXLUVakz4gwTwKACbQkL-F0wBTuac8ATwiPH-_AQATh-C8AHwAfAB8ExifwAC"
"DcAAtbTwfKT8_qETejSAAJOc8ATwBPAUY9p9CAAIhvAB8AHwAfCEYZ4MGDWE8YCn"
"nEs8_3oRgAD1lPAE8ATwBKBVh4LwAQAUCwDNACQEAKBNAMwAaggAewgAoH8AywBz"
"CABbCABgNwDIAA458Nxp2IO88Hwhzf-ZEQ-0A15XjPAE8ATwhOGlfaDOVAA1oACY"
"sADhCAD9jQgA_wTwBEDMAPQEAHq7NABjCAAcq2QRvPAW9sUMXHwAiIzwBPAE8MDg"
"otZxIMsAGYQArQQATv6s8ATwzPAA4wQAUVcKAGQmYAR9MILpBAB3sP-qKgbgUPwC"
"mwQAevuAAP6U8ATwBPDAYO3QANEAHIQA3JjwBPCrBPAEoPwEAGyAQVRwAeCV_qIX"
"WPQWZNJ8AKoQgAQbSAI2hABtzAC6xAgA_aDwBPCIxOc4Ab6mjPAE8ATwBPAEAPYE"
"AK9YZwHwAfA2QwLAAEgEAK7dqPAE8MCAx8AA5Ijw_wTwBPAE8ExCFPQB8AHwAQDQ"
"Q0P-E5QAw6zwBPD1wECLcAC2iPAE8ATwBPD1BAD70AMqmvAB8AHwATDQODj-EpgA"
"1LDwxPbFBAAxcCDNAOyM8ATwewTwBOCGkvAB8AHwIOM8t-AzuPC8g66UasQwyJDw"
"VwTwBPAEIPHEBG4KAAJBDcYKAP7-LAQAT1UEAGUEAHAEAGoEAFd1BAA5BAASJAAY"
"-8Qg_gaytPB8Yeg7O_8eUTGgvwAEyABUUAK3XZAA9aTw6OJsFdgIAIOQAM8AG_11"
"_guUAKpgCAC1BADvDAD_BPAxBED-_vgIAEoA_nzDBAD4o0BA_lO88Lwgjuy4FPLw"
"AYDPABCYAKpCoABtBACKBACbEACKngQAk4wnzQBXoCd3qBe5plgh4azwBPDM8P76"
"9QQAiwwA1CjgGeQSvMD6yAQAKbHwAfAB8AHwvMC9RBH-nPAE8ATwBKDAxCFVVDXu"
"sADzCAC9dEgEX3nwAfAB8AHwvMAxBAD8X4zwBPAE8ATwTAB-3Ewh_bQADHHwAfAB"
"8AHwAfDAYL50iPAE8ATwBPDAQMRl8L8B8AHwAfAB8AHwcABMiPDvBPAE8ATwwECc"
"ZfAB8AHwrwHwAfAB8HQAAnQAsIzw9wTwBPC84OQIABy1AfAB8O8B8AHwAfDs1ZUI"
"8wTwBPD1vGDHBAAkXfAB8AHwAfCnAfAB8Mjw_zCEAJ8EAK7rpPAE8CgA9wQAvAQA"
"_lQQAJC1AfAB8AHwAfAB8FcB8MjwkBE6BABsBACPVQQApAQArwQAqQQAl_UgAHgI"
"AEsEANQsAfAB8P8B8AHwAfAB8AHwAfAB8AHw_wHwAfAB8AHwAfAB8AHwAfD_AfAB"
"8AHwAfAB8AHwAfAB8P8B8AHwAfAB8AHwAfAB8AHw_wHwAfAB8AHwAfAB8AHwAfD_"
"AfAB8AHwAfAB8AHwAfAB8P8B8AHwAfAB8AHwAfAB8AHw_wHwAfAB8AHwAfAB8AHw"
"AfD_AfAB8AHwAfAB8AHwAfAB8A8B8AHwAfABsA"
};

View File

@@ -2,20 +2,18 @@
void sDSP::brr_decode(voice_t &v) {
//state.t_brr_byte = ram[v.brr_addr + v.brr_offset] cached from previous clock cycle
int nybbles = (state.t_brr_byte << 8) + ram[(uint16)(v.brr_addr + v.brr_offset + 1)];
int nybbles = (state.t_brr_byte << 8) + memory::apuram[(uint16)(v.brr_addr + v.brr_offset + 1)];
const int filter = (state.t_brr_header >> 2) & 3;
const int scale = (state.t_brr_header >> 4);
//write to next four samples in circular buffer
int *pos = &v.buf[v.buf_pos];
v.buf_pos += 4;
if(v.buf_pos >= brr_buf_size) v.buf_pos = 0;
//decode four samples
for(int *end = pos + 4; pos < end; pos++) {
int s = sclip<4>(nybbles >> 12); //extract upper nybble and sign extend
nybbles <<= 4; //advance nybble position
for(unsigned i = 0; i < 4; i++) {
//bits 12-15 = current nybble; sign extend, then shift right to 4-bit precision
//result: s = 4-bit sign-extended sample value
int s = (int16)nybbles >> 12;
nybbles <<= 4; //slide nybble so that on next loop iteration, bits 12-15 = current nybble
if(scale <= 12) {
s <<= scale;
s >>= 1;
@@ -24,8 +22,8 @@ void sDSP::brr_decode(voice_t &v) {
}
//apply IIR filter (2 is the most commonly used)
const int p1 = pos[brr_buf_size - 1];
const int p2 = pos[brr_buf_size - 2] >> 1;
const int p1 = v.buffer[v.buf_pos - 1];
const int p2 = v.buffer[v.buf_pos - 2] >> 1;
switch(filter) {
case 0: break; //no filter
@@ -55,8 +53,9 @@ void sDSP::brr_decode(voice_t &v) {
//adjust and write sample
s = sclamp<16>(s);
s = sclip<16>(s << 1);
pos[brr_buf_size] = pos[0] = s; //second copy simplifies wrap-around
s = (int16)(s << 1);
v.buffer.write(v.buf_pos++, s);
if(v.buf_pos >= brr_buf_size) v.buf_pos = 0;
}
}

View File

@@ -1,33 +1,30 @@
#ifdef SDSP_CPP
//current echo buffer pointer for left/right channel
#define ECHO_PTR(ch) (&ram[state.t_echo_ptr + ch * 2])
//sample in echo history buffer, where 0 is the oldest
#define ECHO_FIR(i) state.echo_hist_pos[i]
//calculate FIR point for left/right channel
#define CALC_FIR(i, ch) ((ECHO_FIR(i + 1)[ch] * (int8)REG(fir + i * 0x10)) >> 6)
void sDSP::echo_read(bool channel) {
uint8 *in = ECHO_PTR(channel);
int s = (int8)in[1] * 0x100 + in[0];
//second copy simplifies wrap-around handling
ECHO_FIR(0)[channel] = ECHO_FIR(8)[channel] = s >> 1;
int sDSP::calc_fir(int i, bool channel) {
int s = state.echo_hist[channel][state.echo_hist_pos + i + 1];
return (s * (int8)REG(fir + i * 0x10)) >> 6;
}
int sDSP::echo_output(bool channel) {
int output = sclip<16>((state.t_main_out[channel] * (int8)REG(mvoll + channel * 0x10)) >> 7)
+ sclip<16>((state.t_echo_in [channel] * (int8)REG(evoll + channel * 0x10)) >> 7);
int output = (int16)((state.t_main_out[channel] * (int8)REG(mvoll + channel * 0x10)) >> 7)
+ (int16)((state.t_echo_in [channel] * (int8)REG(evoll + channel * 0x10)) >> 7);
return sclamp<16>(output);
}
void sDSP::echo_read(bool channel) {
unsigned addr = state.t_echo_ptr + channel * 2;
uint8 lo = memory::apuram[(uint16)(addr + 0)];
uint8 hi = memory::apuram[(uint16)(addr + 1)];
int s = (int16)((hi << 8) + lo);
state.echo_hist[channel].write(state.echo_hist_pos, s >> 1);
}
void sDSP::echo_write(bool channel) {
if(!(state.t_echo_enabled & 0x20)) {
uint8 *out = ECHO_PTR(channel);
if(!(state.t_echo_disabled & 0x20)) {
unsigned addr = state.t_echo_ptr + channel * 2;
int s = state.t_echo_out[channel];
out[0] = (uint8)s;
out[1] = (uint8)(s >> 8);
memory::apuram[(uint16)(addr + 0)] = s;
memory::apuram[(uint16)(addr + 1)] = s >> 8;
}
state.t_echo_out[channel] = 0;
@@ -36,22 +33,22 @@ void sDSP::echo_write(bool channel) {
void sDSP::echo_22() {
//history
state.echo_hist_pos++;
if(state.echo_hist_pos >= &state.echo_hist[8]) state.echo_hist_pos = state.echo_hist;
if(state.echo_hist_pos >= echo_hist_size) state.echo_hist_pos = 0;
state.t_echo_ptr = (uint16)((state.t_esa << 8) + state.echo_offset);
echo_read(0);
//FIR
int l = CALC_FIR(0, 0);
int r = CALC_FIR(0, 1);
int l = calc_fir(0, 0);
int r = calc_fir(0, 1);
state.t_echo_in[0] = l;
state.t_echo_in[1] = r;
}
void sDSP::echo_23() {
int l = CALC_FIR(1, 0) + CALC_FIR(2, 0);
int r = CALC_FIR(1, 1) + CALC_FIR(2, 1);
int l = calc_fir(1, 0) + calc_fir(2, 0);
int r = calc_fir(1, 1) + calc_fir(2, 1);
state.t_echo_in[0] += l;
state.t_echo_in[1] += r;
@@ -60,22 +57,22 @@ void sDSP::echo_23() {
}
void sDSP::echo_24() {
int l = CALC_FIR(3, 0) + CALC_FIR(4, 0) + CALC_FIR(5, 0);
int r = CALC_FIR(3, 1) + CALC_FIR(4, 1) + CALC_FIR(5, 1);
int l = calc_fir(3, 0) + calc_fir(4, 0) + calc_fir(5, 0);
int r = calc_fir(3, 1) + calc_fir(4, 1) + calc_fir(5, 1);
state.t_echo_in[0] += l;
state.t_echo_in[1] += r;
}
void sDSP::echo_25() {
int l = state.t_echo_in[0] + CALC_FIR(6, 0);
int r = state.t_echo_in[1] + CALC_FIR(6, 1);
int l = state.t_echo_in[0] + calc_fir(6, 0);
int r = state.t_echo_in[1] + calc_fir(6, 1);
l = sclip<16>(l);
r = sclip<16>(r);
l = (int16)l;
r = (int16)r;
l += (int16)CALC_FIR(7, 0);
r += (int16)CALC_FIR(7, 1);
l += (int16)calc_fir(7, 0);
r += (int16)calc_fir(7, 1);
state.t_echo_in[0] = sclamp<16>(l) & ~1;
state.t_echo_in[1] = sclamp<16>(r) & ~1;
@@ -87,8 +84,8 @@ void sDSP::echo_26() {
state.t_main_out[0] = echo_output(0);
//echo feedback
int l = state.t_echo_out[0] + sclip<16>((state.t_echo_in[0] * (int8)REG(efb)) >> 7);
int r = state.t_echo_out[1] + sclip<16>((state.t_echo_in[1] * (int8)REG(efb)) >> 7);
int l = state.t_echo_out[0] + (int16)((state.t_echo_in[0] * (int8)REG(efb)) >> 7);
int r = state.t_echo_out[1] + (int16)((state.t_echo_in[1] * (int8)REG(efb)) >> 7);
state.t_echo_out[0] = sclamp<16>(l) & ~1;
state.t_echo_out[1] = sclamp<16>(r) & ~1;
@@ -113,7 +110,7 @@ void sDSP::echo_27() {
}
void sDSP::echo_28() {
state.t_echo_enabled = REG(flg);
state.t_echo_disabled = REG(flg);
}
void sDSP::echo_29() {
@@ -127,7 +124,7 @@ void sDSP::echo_29() {
//write left echo
echo_write(0);
state.t_echo_enabled = REG(flg);
state.t_echo_disabled = REG(flg);
}
void sDSP::echo_30() {

View File

@@ -41,13 +41,13 @@ int sDSP::gaussian_interpolate(const voice_t &v) {
const int16 *fwd = gaussian_table + 255 - offset;
const int16 *rev = gaussian_table + offset; //mirror left half of gaussian table
const int* in = &v.buf[(v.interp_pos >> 12) + v.buf_pos];
offset = v.buf_pos + (v.interp_pos >> 12);
int output;
output = (fwd[ 0] * in[0]) >> 11;
output += (fwd[256] * in[1]) >> 11;
output += (rev[256] * in[2]) >> 11;
output = sclip<16>(output);
output += (rev[ 0] * in[3]) >> 11;
output = (fwd[ 0] * v.buffer[offset + 0]) >> 11;
output += (fwd[256] * v.buffer[offset + 1]) >> 11;
output += (rev[256] * v.buffer[offset + 2]) >> 11;
output = (int16)output;
output += (rev[ 0] * v.buffer[offset + 3]) >> 11;
return sclamp<16>(output) & ~1;
}

View File

@@ -1,3 +1,4 @@
/*
S-DSP emulator
license: LGPLv2
@@ -12,6 +13,18 @@
#define REG(n) state.regs[r_##n]
#define VREG(n) state.regs[v.vidx + v_##n]
#if !defined(USE_STATE_MACHINE)
#define phase_start() while(true) {
#define phase(n)
#define tick() scheduler.addclocks_dsp(3 * 8)
#define phase_end() }
#else
#define phase_start() switch(phase_index) {
#define phase(n) case n:
#define tick() scheduler.addclocks_dsp(3 * 8); break
#define phase_end() } phase_index = (phase_index + 1) & 31;
#endif
#include "gaussian.cpp"
#include "counter.cpp"
#include "envelope.cpp"
@@ -23,198 +36,192 @@
/* timing */
void sDSP::enter() {
#define tick() scheduler.addclocks_dsp(3 * 8)
phase_start()
tick(); //temporary to sync with bDSP timing
phase(0)
voice_5(voice[0]);
voice_2(voice[1]);
tick();
loop:
phase(1)
voice_6(voice[0]);
voice_3(voice[1]);
tick();
// 0
voice_5(voice[0]);
voice_2(voice[1]);
tick();
phase(2)
voice_7(voice[0]);
voice_4(voice[1]);
voice_1(voice[3]);
tick();
// 1
voice_6(voice[0]);
voice_3(voice[1]);
tick();
phase(3)
voice_8(voice[0]);
voice_5(voice[1]);
voice_2(voice[2]);
tick();
// 2
voice_7(voice[0]);
voice_4(voice[1]);
voice_1(voice[3]);
tick();
phase(4)
voice_9(voice[0]);
voice_6(voice[1]);
voice_3(voice[2]);
tick();
// 3
voice_8(voice[0]);
voice_5(voice[1]);
voice_2(voice[2]);
tick();
phase(5)
voice_7(voice[1]);
voice_4(voice[2]);
voice_1(voice[4]);
tick();
// 4
voice_9(voice[0]);
voice_6(voice[1]);
voice_3(voice[2]);
tick();
phase(6)
voice_8(voice[1]);
voice_5(voice[2]);
voice_2(voice[3]);
tick();
// 5
voice_7(voice[1]);
voice_4(voice[2]);
voice_1(voice[4]);
tick();
phase(7)
voice_9(voice[1]);
voice_6(voice[2]);
voice_3(voice[3]);
tick();
// 6
voice_8(voice[1]);
voice_5(voice[2]);
voice_2(voice[3]);
tick();
phase(8)
voice_7(voice[2]);
voice_4(voice[3]);
voice_1(voice[5]);
tick();
// 7
voice_9(voice[1]);
voice_6(voice[2]);
voice_3(voice[3]);
tick();
phase(9)
voice_8(voice[2]);
voice_5(voice[3]);
voice_2(voice[4]);
tick();
// 8
voice_7(voice[2]);
voice_4(voice[3]);
voice_1(voice[5]);
tick();
phase(10)
voice_9(voice[2]);
voice_6(voice[3]);
voice_3(voice[4]);
tick();
// 9
voice_8(voice[2]);
voice_5(voice[3]);
voice_2(voice[4]);
tick();
phase(11)
voice_7(voice[3]);
voice_4(voice[4]);
voice_1(voice[6]);
tick();
//10
voice_9(voice[2]);
voice_6(voice[3]);
voice_3(voice[4]);
tick();
phase(12)
voice_8(voice[3]);
voice_5(voice[4]);
voice_2(voice[5]);
tick();
//11
voice_7(voice[3]);
voice_4(voice[4]);
voice_1(voice[6]);
tick();
phase(13)
voice_9(voice[3]);
voice_6(voice[4]);
voice_3(voice[5]);
tick();
//12
voice_8(voice[3]);
voice_5(voice[4]);
voice_2(voice[5]);
tick();
phase(14)
voice_7(voice[4]);
voice_4(voice[5]);
voice_1(voice[7]);
tick();
//13
voice_9(voice[3]);
voice_6(voice[4]);
voice_3(voice[5]);
tick();
phase(15)
voice_8(voice[4]);
voice_5(voice[5]);
voice_2(voice[6]);
tick();
//14
voice_7(voice[4]);
voice_4(voice[5]);
voice_1(voice[7]);
tick();
phase(16)
voice_9(voice[4]);
voice_6(voice[5]);
voice_3(voice[6]);
tick();
//15
voice_8(voice[4]);
voice_5(voice[5]);
voice_2(voice[6]);
tick();
phase(17)
voice_1(voice[0]);
voice_7(voice[5]);
voice_4(voice[6]);
tick();
//16
voice_9(voice[4]);
voice_6(voice[5]);
voice_3(voice[6]);
tick();
phase(18)
voice_8(voice[5]);
voice_5(voice[6]);
voice_2(voice[7]);
tick();
//17
voice_1(voice[0]);
voice_7(voice[5]);
voice_4(voice[6]);
tick();
phase(19)
voice_9(voice[5]);
voice_6(voice[6]);
voice_3(voice[7]);
tick();
//18
voice_8(voice[5]);
voice_5(voice[6]);
voice_2(voice[7]);
tick();
phase(20)
voice_1(voice[1]);
voice_7(voice[6]);
voice_4(voice[7]);
tick();
//19
voice_9(voice[5]);
voice_6(voice[6]);
voice_3(voice[7]);
tick();
phase(21)
voice_8(voice[6]);
voice_5(voice[7]);
voice_2(voice[0]);
tick();
//20
voice_1(voice[1]);
voice_7(voice[6]);
voice_4(voice[7]);
tick();
phase(22)
voice_3a(voice[0]);
voice_9(voice[6]);
voice_6(voice[7]);
echo_22();
tick();
//21
voice_8(voice[6]);
voice_5(voice[7]);
voice_2(voice[0]);
tick();
phase(23)
voice_7(voice[7]);
echo_23();
tick();
//22
voice_3a(voice[0]);
voice_9(voice[6]);
voice_6(voice[7]);
echo_22();
tick();
phase(24)
voice_8(voice[7]);
echo_24();
tick();
//23
voice_7(voice[7]);
echo_23();
tick();
phase(25)
voice_3b(voice[0]);
voice_9(voice[7]);
echo_25();
tick();
//24
voice_8(voice[7]);
echo_24();
tick();
phase(26)
echo_26();
tick();
//25
voice_3b(voice[0]);
voice_9(voice[7]);
echo_25();
tick();
phase(27)
misc_27();
echo_27();
tick();
//26
echo_26();
tick();
phase(28)
misc_28();
echo_28();
tick();
//27
misc_27();
echo_27();
tick();
phase(29)
misc_29();
echo_29();
tick();
//28
misc_28();
echo_28();
tick();
phase(30)
misc_30();
voice_3c(voice[0]);
echo_30();
tick();
//29
misc_29();
echo_29();
tick();
phase(31)
voice_4(voice[0]);
voice_1(voice[2]);
tick();
//30
misc_30();
voice_3c(voice[0]);
echo_30();
tick();
//31
voice_4(voice[0]);
voice_1(voice[2]);
tick();
goto loop;
#undef tick
phase_end()
}
/* register interface for S-SMP $00f2,$00f3 */
@@ -242,14 +249,51 @@ void sDSP::write(uint8 addr, uint8 data) {
/* initialization */
void sDSP::power() {
ram = (uint8*)smp.get_spcram_handle(); //TODO: move to sMemory
memset(&state, 0, sizeof(state_t));
memset(&state.regs, 0, sizeof state.regs);
state.echo_hist_pos = 0;
state.every_other_sample = false;
state.kon = 0;
state.noise = 0;
state.counter = 0;
state.echo_offset = 0;
state.echo_length = 0;
state.new_kon = 0;
state.endx_buf = 0;
state.envx_buf = 0;
state.outx_buf = 0;
state.t_pmon = 0;
state.t_non = 0;
state.t_eon = 0;
state.t_dir = 0;
state.t_koff = 0;
state.t_brr_next_addr = 0;
state.t_adsr0 = 0;
state.t_brr_header = 0;
state.t_brr_byte = 0;
state.t_srcn = 0;
state.t_esa = 0;
state.t_echo_disabled = 0;
state.t_dir_addr = 0;
state.t_pitch = 0;
state.t_output = 0;
state.t_looped = 0;
state.t_echo_ptr = 0;
state.t_main_out[0] = state.t_main_out[1] = 0;
state.t_echo_out[0] = state.t_echo_out[1] = 0;
state.t_echo_in[0] = state.t_echo_in[1] = 0;
for(unsigned i = 0; i < 8; i++) {
memset(&voice[i], 0, sizeof(voice_t));
voice[i].buf_pos = 0;
voice[i].interp_pos = 0;
voice[i].brr_addr = 0;
voice[i].brr_offset = 1;
voice[i].vbit = 1 << i;
voice[i].vidx = i * 0x10;
voice[i].brr_offset = 1;
voice[i].kon_delay = 0;
voice[i].env_mode = env_release;
voice[i].env = 0;
voice[i].t_envx_out = 0;
voice[i].hidden_env = 0;
}
reset();
@@ -259,13 +303,24 @@ void sDSP::reset() {
REG(flg) = 0xe0;
state.noise = 0x4000;
state.echo_hist_pos = state.echo_hist;
state.echo_hist_pos = 0;
state.every_other_sample = 1;
state.echo_offset = 0;
state.counter = 0;
phase_index = 0;
}
sDSP::sDSP() {
static_assert<sizeof(int) >= 32 / 8>(); //int >= 32-bits
static_assert<(int8_t)0x80 == -0x80>(); //8-bit sign extension
static_assert<(int16_t)0x8000 == -0x8000>(); //16-bit sign extension
static_assert<(uint16_t)0xffff0000 == 0>(); //16-bit unsigned clip
static_assert<(-1 >> 1) == -1>(); //arithmetic shift right
//-0x8000 <= n <= +0x7fff
assert(sclamp<16>(+0x8000) == +0x7fff);
assert(sclamp<16>(-0x8001) == -0x8000);
}
sDSP::~sDSP() {

View File

@@ -12,8 +12,8 @@ public:
~sDSP();
private:
//external
uint8 *ram;
//USE_STATE_MACHINE variable
unsigned phase_index;
//global registers
enum global_reg_t {
@@ -39,7 +39,8 @@ private:
//internal envelope modes
enum env_mode_t { env_release, env_attack, env_decay, env_sustain };
//internal voice state
//internal constants
enum { echo_hist_size = 8 };
enum { brr_buf_size = 12 };
enum { brr_block_size = 9 };
@@ -47,9 +48,8 @@ private:
struct state_t {
uint8 regs[128];
//echo history keeps most recent 8 samples (twice the size to simplify wrap handling)
int echo_hist[8 * 2][2];
int (*echo_hist_pos)[2]; //&echo_hist[0 to 7]
modulo_array<int, echo_hist_size> echo_hist[2]; //echo history keeps most recent 8 samples
int echo_hist_pos;
bool every_other_sample; //toggles every sample
int kon; //KON value when last checked
@@ -80,7 +80,7 @@ private:
int t_brr_byte;
int t_srcn;
int t_esa;
int t_echo_enabled;
int t_echo_disabled;
//internal state that is recalculated every sample
int t_dir_addr;
@@ -97,18 +97,18 @@ private:
//voice state
struct voice_t {
int buf[brr_buf_size * 2]; //decoded samples (twice the size to simplify wrap handling)
int buf_pos; //place in buffer where next samples will be decoded
int interp_pos; //relative fractional position in sample (0x1000 = 1.0)
int brr_addr; //address of current BRR block
int brr_offset; //current decoding offset in BRR block
int vbit; //bitmask for voice: 0x01 for voice 0, 0x02 for voice 1, etc
int vidx; //voice channel register index: 0x00 for voice 0, 0x10 for voice 1, etc
int kon_delay; //KON delay/current setup phase
modulo_array<int, brr_buf_size> buffer; //decoded samples
int buf_pos; //place in buffer where next samples will be decoded
int interp_pos; //relative fractional position in sample (0x1000 = 1.0)
int brr_addr; //address of current BRR block
int brr_offset; //current decoding offset in BRR block
int vbit; //bitmask for voice: 0x01 for voice 0, 0x02 for voice 1, etc
int vidx; //voice channel register index: 0x00 for voice 0, 0x10 for voice 1, etc
int kon_delay; //KON delay/current setup phase
env_mode_t env_mode;
int env; //current envelope level
int env; //current envelope level
int t_envx_out;
int hidden_env; //used by GAIN mode 7, very obscure quirk
int hidden_env; //used by GAIN mode 7, very obscure quirk
} voice[8];
//gaussian
@@ -150,8 +150,9 @@ private:
void voice_9 (voice_t &v);
//echo
void echo_read(bool channel);
int calc_fir(int i, bool channel);
int echo_output(bool channel);
void echo_read(bool channel);
void echo_write(bool channel);
void echo_22();
void echo_23();

View File

@@ -22,9 +22,11 @@ void sDSP::voice_1(voice_t &v) {
void sDSP::voice_2(voice_t &v) {
//read sample pointer (ignored if not needed)
const uint8 *entry = &ram[state.t_dir_addr];
if(!v.kon_delay) entry += 2;
state.t_brr_next_addr = (entry[1] << 8) + entry[0];
uint16 addr = state.t_dir_addr;
if(!v.kon_delay) addr += 2;
uint8 lo = memory::apuram[(uint16)(addr + 0)];
uint8 hi = memory::apuram[(uint16)(addr + 1)];
state.t_brr_next_addr = ((hi << 8) + lo);
state.t_adsr0 = VREG(adsr0);
@@ -43,8 +45,8 @@ void sDSP::voice_3a(voice_t &v) {
}
void sDSP::voice_3b(voice_t &v) {
state.t_brr_byte = ram[(uint16)(v.brr_addr + v.brr_offset)];
state.t_brr_header = ram[(uint16)(v.brr_addr)];
state.t_brr_byte = memory::apuram[(uint16)(v.brr_addr + v.brr_offset)];
state.t_brr_header = memory::apuram[(uint16)(v.brr_addr)];
}
void sDSP::voice_3c(voice_t &v) {

View File

@@ -19,11 +19,7 @@
#include "ppu/ppu.h"
#include "ppu/bppu/bppu.h"
#include "snes/snes.h"
#include "chip/chip.h"
#ifdef INTERFACE_MAIN
#include "config/config.cpp"
#define extern
#endif
@@ -34,3 +30,10 @@ extern DSPCORE dsp;
extern PPUCORE ppu;
#undef extern
#include "snes/snes.h"
#include "chip/chip.h"
#ifdef INTERFACE_MAIN
#include "config/config.cpp"
#endif

View File

@@ -1,5 +1,5 @@
/*
bbase : version 0.12 ~byuu (2007-12-12)
bbase : version 0.14 ~byuu (2008-04-16)
license: public domain
*/
@@ -55,7 +55,8 @@ using std::max;
#define mkdir _mkdir
#define putenv _putenv
#define rmdir _rmdir
#define vsnprintf _vsnprintf
#define vsnprintf _vsnprintf
#define usleep(n) Sleep(n / 1000)
static char *realpath(const char *file_name, char *resolved_name) {
return _fullpath(resolved_name, file_name, PATH_MAX);
@@ -98,37 +99,12 @@ static char *userpath(char *output) {
#else
static char *userpath(char *output) {
strcpy(output, "."); //failsafe
struct passwd *userinfo = getpwuid(getuid());
struct passwd *userinfo = getpwuid(getuid());
if(userinfo) { strcpy(output, userinfo->pw_dir); }
return output;
}
#endif
/*****
* template functions
*****/
template<typename T> inline void safe_free(T &handle) {
if(handle) {
free(handle);
handle = 0;
}
}
template<typename T> inline void safe_delete(T &handle) {
if(handle) {
delete handle;
handle = 0;
}
}
template<typename T> inline void safe_release(T &handle) {
if(handle) {
handle->Release();
handle = 0;
}
}
template<int min, int max, typename T> inline T minmax(const T x) {
return (x < (T)min) ? (T)min : (x > (T)max) ? (T)max : x;
}
@@ -176,47 +152,47 @@ template<int min, int max, typename T> inline T minmax(const T x) {
*****/
//pseudo-random number generator
static uint prng() {
static uint n = 0;
static unsigned prng() {
static unsigned n = 0;
return n = (n >> 1) ^ (((n & 1) - 1) & 0xedb88320);
}
static uint64 fget(FILE *fp, uint length = 1) {
uint64 data = 0;
for(uint i = 0; i < length; i++) {
static uint64 fget(FILE *fp, unsigned length = 1) {
uint64 data = 0;
for(unsigned i = 0; i < length; i++) {
data |= fgetc(fp) << (i << 3);
}
return data;
}
static void fput(FILE *fp, uint64 data, uint length = 1) {
for(uint i = 0; i < length; i++) {
static void fput(FILE *fp, uint64 data, unsigned length = 1) {
for(unsigned i = 0; i < length; i++) {
fputc(data >> (i << 3), fp);
}
}
static bool fexists(const char *fn) {
FILE *fp = fopen(fn, "rb");
if(!fp)return false;
FILE *fp = fopen(fn, "rb");
if(!fp) return false;
fclose(fp);
fp = 0;
return true;
}
static uint32 fsize(FILE *fp) {
if(!fp)return 0;
uint32 pos = ftell(fp);
static unsigned fsize(FILE *fp) {
if(!fp) return 0;
unsigned pos = ftell(fp);
fseek(fp, 0, SEEK_END);
uint32 size = ftell(fp);
unsigned size = ftell(fp);
fseek(fp, pos, SEEK_SET);
return size;
}
static uint32 fsize(const char *fn) {
FILE *fp = fopen(fn, "rb");
if(!fp)return 0;
static unsigned fsize(const char *fn) {
FILE *fp = fopen(fn, "rb");
if(!fp) return 0;
fseek(fp, 0, SEEK_END);
uint32 size = ftell(fp);
unsigned size = ftell(fp);
fclose(fp);
fp = 0;
return size;
@@ -226,66 +202,4 @@ static int fresize(FILE *fp, long size) {
return ftruncate(fileno(fp), size);
}
/*****
* crc32 calculation
*****/
const uint32 crc32_table[256] = {
0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
};
inline uint32 crc32_adjust(uint32 crc32, uint8 input) {
return ((crc32 >> 8) & 0x00ffffff) ^ crc32_table[(crc32 ^ input) & 0xff];
}
inline uint32 crc32_calculate(uint8 *data, uint length) {
uint32 crc32 = ~0;
for(uint i = 0; i < length; i++) {
crc32 = crc32_adjust(crc32, data[i]);
}
return ~crc32;
}
#endif //ifndef BBASE_H

6
src/lib/hiro/cc.bat Normal file
View File

@@ -0,0 +1,6 @@
mingw32-g++ -c test/test.cpp -I. -I../
mingw32-g++ -c hiro.cpp -I. -I../
mingw32-g++ -c ../nall/string.cpp -I. -I../
mingw32-g++ test.o hiro.o string.o -o test_app.exe -lkernel32 -luser32 -lgdi32 -ladvapi32 -lcomctl32 -lcomdlg32
@pause
@del *.o

6
src/lib/hiro/cc.sh Normal file
View File

@@ -0,0 +1,6 @@
clear
g++ -c test/test.cpp -I. -I../
g++ -c hiro.cpp `pkg-config --cflags gtk+-2.0` -I. -I../
g++ -c ../nall/string.cpp -I. -I../
g++ test.o hiro.o string.o -o test_app `pkg-config --libs gtk+-2.0` -lXtst
rm *.o

View File

@@ -1,9 +1,10 @@
void hiro_pbutton_tick(pButton *p) {
if(p->self.on_tick) p->self.on_tick(Event(Event::Tick, 0, &p->self));
if(p->self.on_tick) p->self.on_tick(event_t(event_t::Tick, 0, &p->self));
}
void pButton::create(uint style, uint width, uint height, const char *text) {
void pButton::create(unsigned style, unsigned width, unsigned height, const char *text) {
button = gtk_button_new_with_label(text ? text : "");
set_default_font(button);
gtk_widget_set_size_request(button, width, height);
gtk_widget_show(button);
g_signal_connect_swapped(G_OBJECT(button), "clicked", G_CALLBACK(hiro_pbutton_tick), (gpointer)this);

View File

@@ -1,7 +1,7 @@
class pButton : public pFormControl {
public:
Button &self;
void create(uint style, uint width, uint height, const char *text = "");
void create(unsigned style, unsigned width, unsigned height, const char *text = "");
void set_text(const char *text = "");
pButton(Button&);

View File

@@ -1,8 +1,8 @@
void hiro_pcanvas_expose(pCanvas *p) {
uint32_t *f = p->fbuffer;
uint32_t *r = p->rbuffer;
for(uint y = p->canvas->allocation.height; y; y--) {
for(uint x = p->canvas->allocation.width; x; x--) {
for(unsigned y = p->canvas->allocation.height; y; y--) {
for(unsigned x = p->canvas->allocation.width; x; x--) {
uint32_t p = *f++;
*r++ = ((p << 16) & 0xff0000) + (p & 0x00ff00) + ((p >> 16) & 0x0000ff);
}
@@ -14,7 +14,7 @@ void hiro_pcanvas_expose(pCanvas *p) {
GDK_RGB_DITHER_NONE, (guchar*)p->rbuffer, p->bpitch);
}
void pCanvas::create(uint style, uint width, uint height) {
void pCanvas::create(unsigned style, unsigned width, unsigned height) {
canvas = gtk_drawing_area_new();
resize(width, height);
GdkColor color;
@@ -54,7 +54,7 @@ pCanvas::~pCanvas() {
/* internal */
void pCanvas::resize(uint width, uint height) {
void pCanvas::resize(unsigned width, unsigned height) {
if(fbuffer) free(fbuffer);
if(rbuffer) free(rbuffer);

View File

@@ -1,6 +1,6 @@
class pCanvas : public pFormControl {
public:
void create(uint style, uint width, uint height);
void create(unsigned style, unsigned width, unsigned height);
void redraw();
uint32_t* buffer();
@@ -13,7 +13,7 @@ public:
//GTK+ RGB drawing function draws in xBGR format, so two buffers are needed ...
uint32_t *fbuffer; //one for the xRGB image
uint32_t *rbuffer; //one for the xBGR image
uint bpitch;
void resize(uint width, uint height);
unsigned bpitch;
void resize(unsigned width, unsigned height);
GtkWidget* gtk_handle();
};

View File

@@ -1,9 +1,10 @@
void hiro_pcheckbox_tick(pCheckbox *p) {
if(p->self.on_tick) p->self.on_tick(Event(Event::Tick, p->checked(), &p->self));
if(!p->locked && p->self.on_tick) p->self.on_tick(event_t(event_t::Tick, p->checked(), &p->self));
}
void pCheckbox::create(uint style, uint width, uint height, const char *text) {
void pCheckbox::create(unsigned style, unsigned width, unsigned height, const char *text) {
checkbox = gtk_check_button_new_with_label(text ? text : "");
set_default_font(checkbox);
gtk_widget_set_size_request(checkbox, width, height);
gtk_widget_show(checkbox);
g_signal_connect_swapped(G_OBJECT(checkbox), "toggled", G_CALLBACK(hiro_pcheckbox_tick), (gpointer)this);
@@ -15,7 +16,9 @@ void pCheckbox::set_text(const char *text) {
}
void pCheckbox::check(bool state) {
locked = true;
gtk_toggle_button_set_active(GTK_TOGGLE_BUTTON(checkbox), state ? TRUE : FALSE);
locked = false;
}
void pCheckbox::uncheck() {
@@ -28,6 +31,7 @@ bool pCheckbox::checked() {
pCheckbox::pCheckbox(Checkbox &self_) : pFormControl(self_), self(self_) {
checkbox = 0;
locked = false;
}
/* internal */

View File

@@ -1,6 +1,6 @@
class pCheckbox : public pFormControl {
public:
void create(uint style, uint width, uint height, const char *text = "");
void create(unsigned style, unsigned width, unsigned height, const char *text = "");
void set_text(const char *text = "");
void check(bool state = true);
void uncheck();
@@ -10,6 +10,7 @@ public:
pCheckbox(Checkbox&);
/* internal */
GtkWidget *checkbox;
GtkWidget* gtk_handle();
GtkWidget *checkbox;
bool locked;
};

View File

@@ -1,9 +1,10 @@
void hiro_pcombobox_change(pCombobox *p) {
if(p->self.on_change) p->self.on_change(Event(Event::Change, p->get_selection(), &p->self));
if(p->self.on_change) p->self.on_change(event_t(event_t::Change, p->get_selection(), &p->self));
}
void pCombobox::create(uint style, uint width, uint height, const char *text) {
void pCombobox::create(unsigned style, unsigned width, unsigned height, const char *text) {
combobox = gtk_combo_box_new_text();
set_default_font(combobox);
gtk_widget_set_size_request(combobox, width, height);
gtk_widget_show(combobox);

View File

@@ -1,6 +1,6 @@
class pCombobox : public pFormControl {
public:
void create(uint style, uint width, uint height, const char *text = "");
void create(unsigned style, unsigned width, unsigned height, const char *text = "");
void add_item(const char *text);
int get_selection();
void set_selection(int index);
@@ -11,6 +11,6 @@ public:
/* internal */
GtkWidget *combobox;
uint counter;
unsigned counter;
GtkWidget* gtk_handle();
};

View File

@@ -1,4 +1,4 @@
void pEditbox::create(uint style, uint width, uint height, const char *text) {
void pEditbox::create(unsigned style, unsigned width, unsigned height, const char *text) {
multiline = bool(style & Editbox::Multiline);
if(multiline == false) {
@@ -8,12 +8,12 @@ void pEditbox::create(uint style, uint width, uint height, const char *text) {
gtk_widget_set_size_request(editbox, width, height);
gtk_widget_show(editbox);
} else {
GtkPolicyType hscroll = (style & Editbox::HorizontalScrollAlways) ? GTK_POLICY_ALWAYS :
(style & Editbox::HorizontalScrollNever) ? GTK_POLICY_NEVER :
GTK_POLICY_AUTOMATIC;
GtkPolicyType vscroll = (style & Editbox::VerticalScrollAlways) ? GTK_POLICY_ALWAYS :
(style & Editbox::VerticalScrollNever) ? GTK_POLICY_NEVER :
GTK_POLICY_AUTOMATIC;
GtkPolicyType hscroll = (style & Editbox::HorizontalScrollAlways) ? GTK_POLICY_ALWAYS :
(style & Editbox::HorizontalScrollNever) ? GTK_POLICY_NEVER :
GTK_POLICY_AUTOMATIC;
GtkPolicyType vscroll = (style & Editbox::VerticalScrollAlways) ? GTK_POLICY_ALWAYS :
(style & Editbox::VerticalScrollNever) ? GTK_POLICY_NEVER :
GTK_POLICY_AUTOMATIC;
scrollbox = gtk_scrolled_window_new(0, 0);
gtk_scrolled_window_set_policy(GTK_SCROLLED_WINDOW(scrollbox), hscroll, vscroll);
gtk_scrolled_window_set_shadow_type(GTK_SCROLLED_WINDOW(scrollbox), GTK_SHADOW_ETCHED_IN);
@@ -26,6 +26,8 @@ void pEditbox::create(uint style, uint width, uint height, const char *text) {
gtk_widget_show(editbox);
gtk_widget_show(scrollbox);
}
set_default_font(editbox);
}
void pEditbox::set_text(const char *text) {
@@ -36,12 +38,12 @@ void pEditbox::set_text(const char *text) {
}
}
uint pEditbox::get_text(char *text, uint length) {
unsigned pEditbox::get_text(char *text, unsigned length) {
if(multiline == false) {
const char *temp = gtk_entry_get_text(GTK_ENTRY(editbox));
const char *temp = gtk_entry_get_text(GTK_ENTRY(editbox));
return strlcpy(text, temp ? temp : "", length);
} else {
GtkTextIter start, end;
GtkTextIter start, end;
gtk_text_buffer_get_start_iter(buffer, &start);
gtk_text_buffer_get_end_iter(buffer, &end);
return strlcpy(text, gtk_text_buffer_get_text(buffer, &start, &end, true), length);

View File

@@ -1,8 +1,8 @@
class pEditbox : public pFormControl {
public:
Editbox &self;
void create(uint style, uint width, uint height, const char *text = "");
uint get_text(char *text, uint length = -1U);
void create(unsigned style, unsigned width, unsigned height, const char *text = "");
unsigned get_text(char *text, unsigned length = -1U);
void set_text(const char *text = "");
pEditbox(Editbox&);

View File

@@ -1,4 +1,4 @@
void pFormControl::resize(uint width, uint height) {
void pFormControl::resize(unsigned width, unsigned height) {
gtk_widget_set_size_request(gtk_handle(), width, height);
}

View File

@@ -1,6 +1,6 @@
class pFormControl : public pWidget {
public:
virtual void resize(uint width, uint height);
virtual void resize(unsigned width, unsigned height);
void focus();
bool focused();
void enable(bool = true);

View File

@@ -1,5 +1,6 @@
void pFrame::create(uint style, uint width, uint height, const char *text) {
void pFrame::create(unsigned style, unsigned width, unsigned height, const char *text) {
frame = gtk_frame_new(text ? text : "");
set_default_font(frame);
gtk_widget_set_size_request(frame, width, height);
gtk_widget_show(frame);
}

View File

@@ -1,7 +1,7 @@
class pFrame : public pFormControl {
public:
Frame &self;
void create(uint style, uint width, uint height, const char *text = "");
void create(unsigned style, unsigned width, unsigned height, const char *text = "");
void set_text(const char *text = "");
pFrame(Frame&);

View File

@@ -6,6 +6,17 @@ using nall::max;
namespace libhiro {
static void set_font(GtkWidget *widget, gpointer font) {
gtk_widget_modify_font(widget, (PangoFontDescription*)font);
if(GTK_IS_CONTAINER(widget)) {
gtk_container_foreach(GTK_CONTAINER(widget), (GtkCallback)set_font, font);
}
}
static void set_default_font(GtkWidget *widget) {
set_font(widget, phiro().font);
}
#include "keymap.cpp"
#include "widget.cpp"
#include "window.cpp"
@@ -40,6 +51,7 @@ void pHiro::init() {
free(argv);
is_composited = false;
*default_path = 0;
screen = gdk_screen_get_default();
if(gdk_screen_is_composited(screen)) {
colormap = gdk_screen_get_rgba_colormap(screen);
@@ -48,9 +60,15 @@ void pHiro::init() {
} else {
colormap = gdk_screen_get_rgb_colormap(screen);
}
font = pango_font_description_new();
pango_font_description_set_family(font, "Sans");
pango_font_description_set_absolute_size(font, 11.0 * PANGO_SCALE);
pango_font_description_set_style(font, PANGO_STYLE_NORMAL);
}
void pHiro::term() {
pango_font_description_free(font);
enable_screensaver();
}
@@ -76,10 +94,12 @@ bool pHiro::folder_select(Window *focus, char *filename, const char *path) {
(const gchar*)0);
if(path && *path) gtk_file_chooser_set_current_folder(GTK_FILE_CHOOSER(dialog), path);
else if(*default_path) gtk_file_chooser_set_current_folder(GTK_FILE_CHOOSER(dialog), default_path);
if(gtk_dialog_run(GTK_DIALOG(dialog)) == GTK_RESPONSE_ACCEPT) {
char *fn = gtk_file_chooser_get_filename(GTK_FILE_CHOOSER(dialog));
strcpy(filename, fn);
set_default_path(fn);
g_free(fn);
}
@@ -99,10 +119,12 @@ bool pHiro::file_open(Window *focus, char *filename, const char *path, const cha
(const gchar*)0);
if(path && *path) gtk_file_chooser_set_current_folder(GTK_FILE_CHOOSER(dialog), path);
else if(*default_path) gtk_file_chooser_set_current_folder(GTK_FILE_CHOOSER(dialog), default_path);
if(gtk_dialog_run(GTK_DIALOG(dialog)) == GTK_RESPONSE_ACCEPT) {
char *fn = gtk_file_chooser_get_filename(GTK_FILE_CHOOSER(dialog));
strcpy(filename, fn);
set_default_path(fn);
g_free(fn);
}
@@ -122,11 +144,13 @@ bool pHiro::file_save(Window *focus, char *filename, const char *path, const cha
(const gchar*)0);
if(path && *path) gtk_file_chooser_set_current_folder(GTK_FILE_CHOOSER(dialog), path);
else if(*default_path) gtk_file_chooser_set_current_folder(GTK_FILE_CHOOSER(dialog), default_path);
gtk_file_chooser_set_do_overwrite_confirmation(GTK_FILE_CHOOSER(dialog), TRUE);
if(gtk_dialog_run(GTK_DIALOG(dialog)) == GTK_RESPONSE_ACCEPT) {
char *fn = gtk_file_chooser_get_filename(GTK_FILE_CHOOSER(dialog));
strcpy(filename, fn);
set_default_path(fn);
g_free(fn);
}
@@ -134,11 +158,11 @@ bool pHiro::file_save(Window *focus, char *filename, const char *path, const cha
return strcmp(filename, ""); //return true if filename exists
}
uint pHiro::screen_width() {
unsigned pHiro::screen_width() {
return gdk_screen_width();
}
uint pHiro::screen_height() {
unsigned pHiro::screen_height() {
return gdk_screen_height();
}
@@ -168,6 +192,19 @@ pHiro& phiro() {
/* internal */
//GTK+ does not save the most recent path to a file.
//Strip trailing filename / folder to save path for next file dialog request.
//This is only called when file dialog filename / folder is accepted, not when dialog cancelled.
void pHiro::set_default_path(const char *p) {
strcpy(default_path, p);
for(int i = strlen(default_path) - 1; i >= 0; i--) {
if(default_path[i] == '/' || default_path[i] == '\\') {
default_path[i] = 0;
break;
}
}
}
void pHiro::screensaver_tick() {
static clock_t delta_x = 0, delta_y = 0;

View File

@@ -43,8 +43,8 @@ public:
bool file_open(Window *focus, char *filename, const char *path = "", const char *filter = "");
bool file_save(Window *focus, char *filename, const char *path = "", const char *filter = "");
uint screen_width();
uint screen_height();
unsigned screen_width();
unsigned screen_height();
void enable_screensaver();
void disable_screensaver();
@@ -55,11 +55,14 @@ public:
/* internal */
GdkScreen *screen;
GdkColormap *colormap;
PangoFontDescription *font;
bool is_composited;
char default_path[PATH_MAX];
void set_default_path(const char*);
bool is_screensaver_enabled;
void screensaver_tick();
uint16_t translate_key(uint key);
uint16_t translate_key(unsigned key);
};
pHiro& phiro();

View File

@@ -1,4 +1,4 @@
uint16_t pHiro::translate_key(uint key) {
uint16_t pHiro::translate_key(unsigned key) {
switch(key) {
case GDK_Escape: return keyboard::escape;

View File

@@ -1,5 +1,6 @@
void pLabel::create(uint style, uint width, uint height, const char *text) {
void pLabel::create(unsigned style, unsigned width, unsigned height, const char *text) {
label = gtk_label_new(text ? text : "");
set_default_font(label);
gtk_misc_set_alignment(GTK_MISC(label), 0.0, 0.0);
gtk_widget_set_size_request(label, width, height);
gtk_widget_show(label);

View File

@@ -1,7 +1,7 @@
class pLabel : public pFormControl {
public:
Label &self;
void create(uint style, uint width, uint height, const char *text = "");
void create(unsigned style, unsigned width, unsigned height, const char *text = "");
void set_text(const char *text = "");
pLabel(Label&);

View File

@@ -1,30 +1,30 @@
void hiro_plistbox_change(pListbox *p) {
if(p->listbox_selection == p->get_selection()) return;
if(p->self.on_change) p->self.on_change(Event(Event::Change, p->listbox_selection = p->get_selection(), &p->self));
if(p->self.on_change) p->self.on_change(event_t(event_t::Change, p->listbox_selection = p->get_selection(), &p->self));
}
void hiro_plistbox_activate(pListbox *p) {
if(p->self.on_activate) p->self.on_activate(Event(Event::Activate, p->listbox_selection = p->get_selection(), &p->self));
if(p->self.on_activate) p->self.on_activate(event_t(event_t::Activate, p->listbox_selection = p->get_selection(), &p->self));
}
void pListbox::create(uint style, uint width, uint height, const char *columns, const char *text) {
bool header = style & Listbox::Header;
GtkPolicyType hscroll = (style & Listbox::HorizontalScrollAlways) ? GTK_POLICY_ALWAYS :
(style & Listbox::HorizontalScrollNever) ? GTK_POLICY_NEVER :
GTK_POLICY_AUTOMATIC;
GtkPolicyType vscroll = (style & Listbox::VerticalScrollAlways) ? GTK_POLICY_ALWAYS :
(style & Listbox::VerticalScrollNever) ? GTK_POLICY_NEVER :
GTK_POLICY_AUTOMATIC;
void pListbox::create(unsigned style, unsigned width, unsigned height, const char *columns, const char *text) {
bool header = style & Listbox::Header;
GtkPolicyType hscroll = (style & Listbox::HorizontalScrollAlways) ? GTK_POLICY_ALWAYS :
(style & Listbox::HorizontalScrollNever) ? GTK_POLICY_NEVER :
GTK_POLICY_AUTOMATIC;
GtkPolicyType vscroll = (style & Listbox::VerticalScrollAlways) ? GTK_POLICY_ALWAYS :
(style & Listbox::VerticalScrollNever) ? GTK_POLICY_NEVER :
GTK_POLICY_AUTOMATIC;
scrollbox = gtk_scrolled_window_new(0, 0);
gtk_scrolled_window_set_policy(GTK_SCROLLED_WINDOW(scrollbox), hscroll, vscroll);
gtk_scrolled_window_set_shadow_type(GTK_SCROLLED_WINDOW(scrollbox), GTK_SHADOW_ETCHED_IN);
lstring list;
lstring list;
split(list, "\t", columns);
GType *v = (GType*)malloc(count(list) * sizeof(GType));
for(uint i = 0; i < count(list); i++) v[i] = G_TYPE_STRING;
GType *v = (GType*)malloc(count(list) * sizeof(GType));
for(unsigned i = 0; i < count(list); i++) v[i] = G_TYPE_STRING;
store = gtk_list_store_newv(count(list), v);
free(v);
@@ -35,9 +35,9 @@ GType *v = (GType*)malloc(count(list) * sizeof(GType));
gtk_widget_show(listbox);
gtk_widget_show(scrollbox);
//alternate colors for each listbox entry if there are multiple columns ...
//alternate colors for each listbox entry if there are multiple columns ...
gtk_tree_view_set_rules_hint(GTK_TREE_VIEW(listbox), count(list) >= 2 ? true : false);
for(uint i = 0; i < count(list); i++) {
for(unsigned i = 0; i < count(list); i++) {
renderer = gtk_cell_renderer_text_new();
column = gtk_tree_view_column_new_with_attributes(list[i], renderer, "text", i, (void*)0);
column_list[column_list.size()] = column;
@@ -46,7 +46,7 @@ GType *v = (GType*)malloc(count(list) * sizeof(GType));
if(text && *text) {
split(list, "\n", text);
for(uint i = 0; i < count(list); i++) add_item(list[i]);
for(unsigned i = 0; i < count(list); i++) add_item(list[i]);
}
gtk_tree_view_set_headers_visible(GTK_TREE_VIEW(listbox), header);
@@ -54,13 +54,15 @@ GType *v = (GType*)malloc(count(list) * sizeof(GType));
g_signal_connect_swapped(G_OBJECT(listbox), "cursor-changed", G_CALLBACK(hiro_plistbox_change), (gpointer)this);
g_signal_connect_swapped(G_OBJECT(listbox), "row-activated", G_CALLBACK(hiro_plistbox_activate), (gpointer)this);
set_default_font(listbox);
}
void pListbox::autosize_columns() {
gtk_tree_view_columns_autosize(GTK_TREE_VIEW(listbox));
}
void pListbox::set_column_width(uint column, uint width) {
void pListbox::set_column_width(unsigned column, unsigned width) {
gtk_tree_view_column_set_min_width(column_list[column], width);
gtk_tree_view_column_set_max_width(column_list[column], width);
}
@@ -69,14 +71,14 @@ void pListbox::add_item(const char *text) {
lstring list;
split(list, "\t", text);
gtk_list_store_append(store, &iter);
for(uint i = 0; i < count(list); i++) {
for(unsigned i = 0; i < count(list); i++) {
gtk_list_store_set(store, &iter, i, list[i](), -1);
}
}
void pListbox::set_item(uint index, const char *text) {
void pListbox::set_item(unsigned index, const char *text) {
GtkTreeModel *model = gtk_tree_view_get_model(GTK_TREE_VIEW(listbox));
for(uint i = 0; i <= index; i++) {
for(unsigned i = 0; i <= index; i++) {
i == 0 ?
gtk_tree_model_get_iter_first(model, &iter) :
gtk_tree_model_iter_next(model, &iter);
@@ -84,7 +86,7 @@ GtkTreeModel *model = gtk_tree_view_get_model(GTK_TREE_VIEW(listbox));
lstring list;
split(list, "\t", text);
for(uint i = 0; i < count(list); i++) {
for(unsigned i = 0; i < count(list); i++) {
gtk_list_store_set(store, &iter, i, list[i](), -1);
}
}
@@ -94,7 +96,7 @@ GtkTreeSelection *selection = gtk_tree_view_get_selection(GTK_TREE_VIEW(listbox)
GtkTreeModel *model = gtk_tree_view_get_model(GTK_TREE_VIEW(listbox));
if(gtk_tree_model_get_iter_first(model, &iter) == false) { return -1; }
if(gtk_tree_selection_iter_is_selected(selection, &iter) == true) { return 0; }
for(uint i = 1; i < 100000; i++) {
for(unsigned i = 1; i < 100000; i++) {
if(gtk_tree_model_iter_next(model, &iter) == false) { return -1; }
if(gtk_tree_selection_iter_is_selected(selection, &iter) == true) { return i; }
}
@@ -109,12 +111,12 @@ GtkTreeModel *model = gtk_tree_view_get_model(GTK_TREE_VIEW(listbox));
if(index < 0) { goto end; }
if(gtk_tree_model_get_iter_first(model, &iter) == false) { goto end; }
if(index == 0) { gtk_tree_selection_select_iter(selection, &iter); goto end; }
for(uint i = 1; i < 100000; i++) {
for(unsigned i = 1; i < 100000; i++) {
if(gtk_tree_model_iter_next(model, &iter) == false) { goto end; }
if(index == i) { gtk_tree_selection_select_iter(selection, &iter); goto end; }
}
end:
if(current != index) ;//{ owner->message(Message::Changed, (uintptr_t)this); }
if(current != index); //{ owner->message(Message::Changed, (uintptr_t)this); }
}
void pListbox::reset() {

View File

@@ -1,10 +1,10 @@
class pListbox : public pFormControl {
public:
void create(uint style, uint width, uint height, const char *columns = "", const char *text = "");
void create(unsigned style, unsigned width, unsigned height, const char *columns = "", const char *text = "");
void autosize_columns();
void set_column_width(uint column, uint width);
void set_column_width(unsigned column, unsigned width);
void add_item(const char *text);
void set_item(uint index, const char *text);
void set_item(unsigned index, const char *text);
int get_selection();
void set_selection(int index);
void reset();

View File

@@ -1,15 +1,18 @@
void hiro_pmenucheckitem_tick(pMenuCheckItem *p) {
if(p->self.on_tick) p->self.on_tick(Event(Event::Tick, p->checked(), &p->self));
if(!p->locked && p->self.on_tick) p->self.on_tick(event_t(event_t::Tick, p->checked(), &p->self));
}
void pMenuCheckItem::create(const char *text) {
item = gtk_check_menu_item_new_with_label(text ? text : "?");
set_default_font(item);
gtk_widget_show(item);
g_signal_connect_swapped(G_OBJECT(item), "toggled", G_CALLBACK(hiro_pmenucheckitem_tick), (gpointer)this);
}
void pMenuCheckItem::check(bool state) {
locked = true;
gtk_check_menu_item_set_active(GTK_CHECK_MENU_ITEM(item), state ? TRUE : FALSE);
locked = false;
}
void pMenuCheckItem::uncheck() {
@@ -22,6 +25,7 @@ bool pMenuCheckItem::checked() {
pMenuCheckItem::pMenuCheckItem(MenuCheckItem &self_) : pMenuControl(self_), self(self_) {
item = 0;
locked = true;
}
/* internal */

View File

@@ -9,6 +9,7 @@ public:
pMenuCheckItem(MenuCheckItem&);
/* internal */
GtkWidget *item;
GtkWidget* gtk_handle();
GtkWidget *item;
bool locked;
};

View File

@@ -1,6 +1,7 @@
void pMenuGroup::create(const char *text) {
group = gtk_menu_new();
item = gtk_menu_item_new_with_label(text ? text : "");
set_default_font(item);
gtk_menu_item_set_submenu(GTK_MENU_ITEM(item), group);
gtk_widget_show(item);
}

View File

@@ -1,9 +1,10 @@
void hiro_pmenuitem_tick(pMenuItem *p) {
if(p->self.on_tick) p->self.on_tick(Event(Event::Tick, 0, &p->self));
if(p->self.on_tick) p->self.on_tick(event_t(event_t::Tick, 0, &p->self));
}
void pMenuItem::create(const char *text) {
item = gtk_menu_item_new_with_label(text ? text : "");
set_default_font(item);
g_signal_connect_swapped(G_OBJECT(item), "activate", G_CALLBACK(hiro_pmenuitem_tick), (gpointer)this);
gtk_widget_show(item);
}

View File

@@ -1,7 +1,7 @@
void hiro_pmenuradioitem_tick(pMenuRadioItem *p) {
//GTK+ sends two messages: one for the activated radio item,
//and one for the deactivated radio item. ignore the latter.
if(p->checked() && p->self.on_tick) p->self.on_tick(Event(Event::Tick, 0, &p->self));
//GTK+ sends two messages: one for the activated radio item,
//and one for the deactivated radio item. ignore the latter.
if(!p->locked && p->checked() && p->self.on_tick) p->self.on_tick(event_t(event_t::Tick, 0, &p->self));
}
void pMenuRadioItem::create(MenuRadioItemGroup &group, const char *text) {
@@ -10,12 +10,15 @@ void pMenuRadioItem::create(MenuRadioItemGroup &group, const char *text) {
} else {
item = gtk_radio_menu_item_new_with_label_from_widget(GTK_RADIO_MENU_ITEM(group[0]->p.gtk_handle()), text ? text : "");
}
set_default_font(item);
gtk_widget_show(item);
g_signal_connect_swapped(G_OBJECT(item), "toggled", G_CALLBACK(hiro_pmenuradioitem_tick), (gpointer)this);
}
void pMenuRadioItem::check() {
locked = true;
gtk_check_menu_item_set_active(GTK_CHECK_MENU_ITEM(item), TRUE);
locked = false;
}
bool pMenuRadioItem::checked() {
@@ -24,6 +27,7 @@ bool pMenuRadioItem::checked() {
pMenuRadioItem::pMenuRadioItem(MenuRadioItem &self_) : pMenuControl(self_), self(self_) {
item = 0;
locked = false;
}
/* internal */

View File

@@ -8,6 +8,7 @@ public:
pMenuRadioItem(MenuRadioItem&);
/* internal */
GtkWidget *item;
GtkWidget* gtk_handle();
GtkWidget *item;
bool locked;
};

View File

@@ -1,15 +1,15 @@
void pProgressbar::create(uint style, uint width, uint height) {
void pProgressbar::create(unsigned style, unsigned width, unsigned height) {
progressbar = gtk_progress_bar_new();
gtk_widget_set_size_request(progressbar, width, height);
gtk_widget_show(progressbar);
}
uint pProgressbar::get_progress() {
uint progress = (uint)(gtk_progress_bar_get_fraction(GTK_PROGRESS_BAR(progressbar)) * 100.0);
unsigned pProgressbar::get_progress() {
unsigned progress = (unsigned)(gtk_progress_bar_get_fraction(GTK_PROGRESS_BAR(progressbar)) * 100.0);
return max(0U, min(progress, 100U));
}
void pProgressbar::set_progress(uint progress) {
void pProgressbar::set_progress(unsigned progress) {
progress = max(0U, min(progress, 100U));
gtk_progress_bar_set_fraction(GTK_PROGRESS_BAR(progressbar), (double)progress / 100.0);
}

View File

@@ -1,9 +1,9 @@
class pProgressbar : public pFormControl {
public:
Progressbar &self;
void create(uint style, uint width, uint height);
uint get_progress();
void set_progress(uint progress);
void create(unsigned style, unsigned width, unsigned height);
unsigned get_progress();
void set_progress(unsigned progress);
pProgressbar(Progressbar&);

View File

@@ -1,15 +1,16 @@
void hiro_pradiobox_tick(pRadiobox *p) {
//GTK+ sends two messages: one for the activated radiobox,
//and one for the deactivated radiobox. ignore the latter.
if(p->checked() && p->self.on_tick) p->self.on_tick(Event(Event::Tick, 0, &p->self));
//GTK+ sends two messages: one for the activated radiobox,
//and one for the deactivated radiobox. ignore the latter.
if(!p->locked && p->checked() && p->self.on_tick) p->self.on_tick(event_t(event_t::Tick, 0, &p->self));
}
void pRadiobox::create(RadioboxGroup &group, uint style, uint width, uint height, const char *text) {
void pRadiobox::create(RadioboxGroup &group, unsigned style, unsigned width, unsigned height, const char *text) {
if(group.size() == 0 || group[0] == &self) {
radiobox = gtk_radio_button_new_with_label(0, text ? text : "");
} else {
radiobox = gtk_radio_button_new_with_label_from_widget(GTK_RADIO_BUTTON(group[0]->p.gtk_handle()), text ? text : "");
}
set_default_font(radiobox);
gtk_widget_set_size_request(radiobox, width, height);
gtk_widget_show(radiobox);
g_signal_connect_swapped(G_OBJECT(radiobox), "toggled", G_CALLBACK(hiro_pradiobox_tick), (gpointer)this);
@@ -21,7 +22,9 @@ void pRadiobox::set_text(const char *text) {
}
void pRadiobox::check() {
locked = true;
gtk_toggle_button_set_active(GTK_TOGGLE_BUTTON(radiobox), TRUE);
locked = false;
}
bool pRadiobox::checked() {
@@ -30,6 +33,7 @@ bool pRadiobox::checked() {
pRadiobox::pRadiobox(Radiobox &self_) : pFormControl(self), self(self_) {
radiobox = 0;
locked = false;
}
/* internal */

View File

@@ -1,6 +1,6 @@
class pRadiobox : public pFormControl {
public:
void create(RadioboxGroup &group, uint style, uint width, uint height, const char *text = "");
void create(RadioboxGroup &group, unsigned style, unsigned width, unsigned height, const char *text = "");
void set_text(const char *text = "");
void check();
bool checked();
@@ -9,6 +9,7 @@ public:
pRadiobox(Radiobox&);
/* internal */
GtkWidget *radiobox;
GtkWidget* gtk_handle();
GtkWidget *radiobox;
bool locked;
};

View File

@@ -1,9 +1,9 @@
void hiro_pslider_change(pSlider *p) {
if(p->slider_position == p->get_position()) return;
if(p->self.on_change) p->self.on_change(Event(Event::Change, p->slider_position = p->get_position(), &p->self));
if(p->self.on_change) p->self.on_change(event_t(event_t::Change, p->slider_position = p->get_position(), &p->self));
}
void pSlider::create(uint style, uint width, uint height, uint length) {
void pSlider::create(unsigned style, unsigned width, unsigned height, unsigned length) {
if(length < 1) length = 1;
if(style & Slider::Vertical) {
slider = gtk_vscale_new_with_range(0, length - 1, 1);
@@ -16,11 +16,11 @@ void pSlider::create(uint style, uint width, uint height, uint length) {
g_signal_connect_swapped(G_OBJECT(slider), "value-changed", G_CALLBACK(hiro_pslider_change), (gpointer)this);
}
uint pSlider::get_position() {
return (uint)gtk_range_get_value(GTK_RANGE(slider));
unsigned pSlider::get_position() {
return (unsigned)gtk_range_get_value(GTK_RANGE(slider));
}
void pSlider::set_position(uint position) {
void pSlider::set_position(unsigned position) {
gtk_range_set_value(GTK_RANGE(slider), position);
}

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