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mirror of https://github.com/XProger/OpenLara.git synced 2025-08-10 23:24:06 +02:00

#368 GBA use fixed address for lightmap and div tables

This commit is contained in:
XProger
2021-08-01 04:29:50 +03:00
parent 1d789d0d39
commit e9ba3a2784
11 changed files with 53 additions and 49 deletions

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@@ -45,7 +45,7 @@ int32 rand_draw()
return X_RAND(rand_seed_draw);
}
const uint16 divTable[DIV_TABLE_SIZE] = { // ROM, not a big difference with IWRAM
EWRAM_DATA uint16 divTable[DIV_TABLE_SIZE] = { // must be at EWRAM start
0xFFFF, 0xFFFF, 0x8000, 0x5555, 0x4000, 0x3333, 0x2AAA, 0x2492,
0x2000, 0x1C71, 0x1999, 0x1745, 0x1555, 0x13B1, 0x1249, 0x1111,
0x1000, 0x0F0F, 0x0E38, 0x0D79, 0x0CCC, 0x0C30, 0x0BA2, 0x0B21,

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@@ -3,9 +3,9 @@
//#define PROFILING
#ifdef PROFILING
// #define STATIC_ITEMS
#define STATIC_ITEMS
// #define PROFILE_FRAMETIME
#define PROFILE_SOUNDTIME
// #define PROFILE_SOUNDTIME
#endif
#define IWRAM_MATRIX_LERP
@@ -1646,7 +1646,7 @@ struct IMA_STATE {
}
#endif
extern const uint16 divTable[DIV_TABLE_SIZE];
extern uint16 divTable[DIV_TABLE_SIZE];
// renderer internal
extern uint32 keys;

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@@ -511,6 +511,9 @@ int main(void) {
} while (msg.message != WM_QUIT);
#elif defined(__GBA__)
if (intptr_t(divTable) != MEM_EWRAM) return 0;
if (intptr_t(lightmap) != MEM_IWRAM) return 0;
irq_init(NULL);
irq_add(II_VBLANK, vblank);
irq_enable(II_VBLANK);

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@@ -81,7 +81,7 @@ rasterizeFTA_mode4_asm:
stmfd sp!, {r4,r5,r6,r7,r8,r9,r10,r11,lr}
sub sp, #16 // reserve stack space for [Ldx, Ldt, Rdx, Rdt]
ldr LMAP, =lightmap
mov LMAP, #LMAP_ADDR
ldrb tmp, [L, #VERTEX_G]
add LMAP, tmp, lsl #8 // tmp = (L->v.g << 8)
@@ -108,7 +108,7 @@ rasterizeFTA_mode4_asm:
ble .skip_left_dx
lsl tmp, Lh, #1
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
ldrh tmp, [DIVLUT, tmp] // tmp = FixedInvU(Lh)
ldrsh Ldx, [L, #VERTEX_X]
@@ -148,7 +148,7 @@ rasterizeFTA_mode4_asm:
ble .skip_right_dx
lsl tmp, Rh, #1
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
ldrh tmp, [DIVLUT, tmp] // tmp = FixedInvU(Rh)
ldrsh Rdx, [R, #VERTEX_X]
@@ -188,7 +188,7 @@ rasterizeFTA_mode4_asm:
add tmp, pixel, tmp // tmp = pixel + x1
ldr DIVLUTi, =divTable
mov DIVLUTi, #DIVLUT_ADDR
lsl inv, width, #1
ldrh inv, [DIVLUTi, inv] // inv = FixedInvU(width)
@@ -255,7 +255,7 @@ rasterizeFTA_mode4_asm:
.align_block_8px:
tst width, #4
beq .scanlin_block_8px
beq .scanline_block_8px
PUT_PIXELS
PUT_PIXELS
@@ -263,14 +263,14 @@ rasterizeFTA_mode4_asm:
subs width, #4
beq .scanline_end
.scanlin_block_8px:
.scanline_block_8px:
PUT_PIXELS
PUT_PIXELS
PUT_PIXELS
PUT_PIXELS
subs width, #8
bne .scanlin_block_8px
bne .scanline_block_8px
.scanline_end:
ldr tmp, [sp, #(SP_LDX + 16)]

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@@ -84,7 +84,7 @@ rasterizeFT_mode4_asm:
stmfd sp!, {r4,r5,r6,r7,r8,r9,r10,r11,lr}
sub sp, #16 // reserve stack space for [Ldx, Ldt, Rdx, Rdt]
ldr LMAP, =lightmap
mov LMAP, #LMAP_ADDR
ldrb tmp, [L, #VERTEX_G]
add LMAP, tmp, lsl #8 // tmp = (L->v.g << 8)
@@ -111,7 +111,7 @@ rasterizeFT_mode4_asm:
ble .skip_left_dx
lsl tmp, Lh, #1
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
ldrh tmp, [DIVLUT, tmp] // tmp = FixedInvU(Lh)
ldrsh Ldx, [L, #VERTEX_X]
@@ -151,7 +151,7 @@ rasterizeFT_mode4_asm:
ble .skip_right_dx
lsl tmp, Rh, #1
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
ldrh tmp, [DIVLUT, tmp] // tmp = FixedInvU(Rh)
ldrsh Rdx, [R, #VERTEX_X]
@@ -191,7 +191,7 @@ rasterizeFT_mode4_asm:
add tmp, pixel, tmp // tmp = pixel + x1
ldr DIVLUTi, =divTable
mov DIVLUTi, #DIVLUT_ADDR
lsl inv, width, #1
ldrh inv, [DIVLUTi, inv] // inv = FixedInvU(width)
@@ -255,7 +255,7 @@ rasterizeFT_mode4_asm:
.align_block_8px:
tst width, #4
beq .scanlin_block_8px
beq .scanline_block_8px
PUT_PIXELS
PUT_PIXELS
@@ -263,14 +263,14 @@ rasterizeFT_mode4_asm:
subs width, #4
beq .scanline_end
.scanlin_block_8px:
.scanline_block_8px:
PUT_PIXELS
PUT_PIXELS
PUT_PIXELS
PUT_PIXELS
subs width, #8
bne .scanlin_block_8px
bne .scanline_block_8px
.scanline_end:
ldr tmp, [sp, #(SP_LDX + 16)]

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@@ -27,7 +27,7 @@ blocks .req DIVLUT
rasterizeF_mode4_asm:
stmfd sp!, {r4,r5,r6,r7,r8,r9,r10,r11,lr}
ldr LMAP, =lightmap
mov LMAP, #LMAP_ADDR
ldrb tmp, [L, #VERTEX_G]
orr tmp, index, tmp, lsl #8 // tmp = index | (L->v.g << 8)
@@ -38,7 +38,7 @@ rasterizeF_mode4_asm:
mov Rh, #0 // Rh = 0
.loop:
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
.calc_left_start:
cmp Lh, #0

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@@ -128,7 +128,7 @@ rasterizeGTA_mode4_asm:
ble .skip_left_dx
lsl tmp, Lh, #1
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
ldrh tmp, [DIVLUT, tmp] // tmp = FixedInvU(Lh)
ldrsh Ldx, [L, #VERTEX_X]
@@ -156,9 +156,8 @@ rasterizeGTA_mode4_asm:
.skip_left_dx:
lsl Lx, #16 // Lx <<= 16
ldr LMAP, =lightmap // !!! lightmap should be 64k aligned
add Lg, LMAP, Lg, lsl #8 // Lg is address in lightmap array
lsl Lg, #8 // Lg <= 8
add Lg, #LMAP_ADDR // Lg += lightmap
b .calc_left_start
.calc_left_end:
@@ -179,7 +178,7 @@ rasterizeGTA_mode4_asm:
ble .skip_right_dx
lsl tmp, Rh, #1
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
ldrh tmp, [DIVLUT, tmp] // tmp = FixedInvU(Rh)
ldrsh Rdx, [R, #VERTEX_X]
@@ -207,9 +206,8 @@ rasterizeGTA_mode4_asm:
.skip_right_dx:
lsl Rx, #16 // Rx <<= 16
ldr LMAP, =lightmap // !!! lightmap should be 64k aligned
add Rg, LMAP, Rg, lsl #8 // Rg is address in lightmap array
lsl Rg, #8 // Rg <= 8
add Rg, #LMAP_ADDR // Rg += lightmap
b .calc_right_start
.calc_right_end:
@@ -234,7 +232,7 @@ rasterizeGTA_mode4_asm:
add ptr, pixel, tmp // ptr = pixel + x1
ldr DIVLUTi, =divTable
mov DIVLUTi, #DIVLUT_ADDR
lsl inv, width, #1
ldrh inv, [DIVLUTi, inv] // inv = FixedInvU(width)
@@ -321,7 +319,7 @@ rasterizeGTA_mode4_asm:
.align_block_8px:
tst width, #4
beq .scanlin_block_8px
beq .scanline_block_8px
PUT_PIXELS
PUT_PIXELS
@@ -329,14 +327,14 @@ rasterizeGTA_mode4_asm:
subs width, #4
beq .scanline_end
.scanlin_block_8px:
.scanline_block_8px:
PUT_PIXELS
PUT_PIXELS
PUT_PIXELS
PUT_PIXELS
subs width, #8
bne .scanlin_block_8px
bne .scanline_block_8px
.scanline_end:
ldmfd sp!, {Lx,Rx,Lg,Rg,Lt,Rt} // sp+24

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@@ -131,7 +131,7 @@ rasterizeGT_mode4_asm:
ble .skip_left_dx
lsl tmp, Lh, #1
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
ldrh tmp, [DIVLUT, tmp] // tmp = FixedInvU(Lh)
ldrsh Ldx, [L, #VERTEX_X]
@@ -159,9 +159,8 @@ rasterizeGT_mode4_asm:
.skip_left_dx:
lsl Lx, #16 // Lx <<= 16
ldr LMAP, =lightmap // !!! lightmap should be 64k aligned
add Lg, LMAP, Lg, lsl #8 // Lg is address in lightmap array
lsl Lg, #8 // Lg <= 8
add Lg, #LMAP_ADDR // Lg += lightmap
b .calc_left_start
.calc_left_end:
@@ -182,7 +181,7 @@ rasterizeGT_mode4_asm:
ble .skip_right_dx
lsl tmp, Rh, #1
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
ldrh tmp, [DIVLUT, tmp] // tmp = FixedInvU(Rh)
ldrsh Rdx, [R, #VERTEX_X]
@@ -210,9 +209,8 @@ rasterizeGT_mode4_asm:
.skip_right_dx:
lsl Rx, #16 // Rx <<= 16
ldr LMAP, =lightmap // !!! lightmap should be 64k aligned
add Rg, LMAP, Rg, lsl #8 // Rg is address in lightmap array
lsl Rg, #8 // Rg <= 8
add Rg, #LMAP_ADDR // Rg += lightmap
b .calc_right_start
.calc_right_end:
@@ -237,7 +235,7 @@ rasterizeGT_mode4_asm:
add ptr, pixel, tmp // ptr = pixel + x1
ldr DIVLUTi, =divTable
mov DIVLUTi, #DIVLUT_ADDR
lsl inv, width, #1
ldrh inv, [DIVLUTi, inv] // inv = FixedInvU(width)
@@ -312,7 +310,7 @@ rasterizeGT_mode4_asm:
.align_block_8px:
tst width, #4
beq .scanlin_block_8px
beq .scanline_block_8px
PUT_PIXELS
PUT_PIXELS
@@ -320,14 +318,14 @@ rasterizeGT_mode4_asm:
subs width, #4
beq .scanline_end
.scanlin_block_8px:
.scanline_block_8px:
PUT_PIXELS
PUT_PIXELS
PUT_PIXELS
PUT_PIXELS
subs width, #8
bne .scanlin_block_8px
bne .scanline_block_8px
.scanline_end:
ldmfd sp!, {Lx,Rx,Lg,Rg,Lt,Rt} // sp+24

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@@ -47,9 +47,9 @@ rasterizeG_mode4_asm:
stmfd sp!, {r4,r5,r6,r7,r8,r9,r10,r11,lr}
sub sp, #16 // reserve stack space for [Ldx, Ldg, Rdx, Rdg]
ldr tmp, =lightmap
mov tmp, #LMAP_ADDR
add LMAP, index, tmp // LMAP = lightmap + index
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
mov Lh, #0 // Lh = 0
mov Rh, #0 // Rh = 0

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@@ -36,7 +36,7 @@ rasterizeS_mode4_asm:
mov Rh, #0 // Rh = 0
.loop:
ldr DIVLUT, =divTable
mov DIVLUT, #DIVLUT_ADDR
.calc_left_start:
cmp Lh, #0

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@@ -9,11 +9,16 @@
.equ VERTEX_T, 8
.equ VERTEX_PREV, 12
.equ VERTEX_NEXT, 16
.equ EWRAM_START, 0x2000000
.equ IWRAM_START, 0x3000000
.equ DIVLUT_ADDR, EWRAM_START
.equ LMAP_ADDR, IWRAM_START
#ifdef __TNS__
.equ VRAM_STRIDE, 320
.equ VRAM_STRIDE, 320
#else
.equ VRAM_STRIDE, 240
.equ VRAM_STRIDE, 240
#endif
#define TEX_2PX